Fixed nest level when saving to not get giant diffs with version control software such as git
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@ -764,9 +764,9 @@ void PCB_IO::formatNetInformation( BOARD* aBoard, int aNestLevel ) const
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void PCB_IO::formatHeader( BOARD* aBoard, int aNestLevel ) const
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void PCB_IO::formatHeader( BOARD* aBoard, int aNestLevel ) const
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{
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{
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formatGeneral( aBoard );
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formatGeneral( aBoard ,aNestLevel );
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// Layers.
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// Layers.
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formatBoardLayers( aBoard );
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formatBoardLayers( aBoard ,aNestLevel );
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// Setup
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// Setup
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formatSetup( aBoard, aNestLevel );
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formatSetup( aBoard, aNestLevel );
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// Save net codes and names
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// Save net codes and names
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@ -775,7 +775,7 @@ void PCB_IO::formatHeader( BOARD* aBoard, int aNestLevel ) const
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void PCB_IO::format( BOARD* aBoard, int aNestLevel ) const
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void PCB_IO::format( BOARD* aBoard, int aNestLevel ) const
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{
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{
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formatHeader( aBoard );
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formatHeader( aBoard , aNestLevel);
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// Save the modules.
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// Save the modules.
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for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
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for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
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