beautification
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dickelbeck
parent
40efaf419f
commit
3312da3152
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@ -35,9 +35,10 @@ void SetDir( int, int, int, int );
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/*****************************************************************/
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bool ComputeMatriceSize( WinEDA_BasePcbFrame* frame, int g_GridRoutingSize )
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/*****************************************************************/
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/*
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Calcule Nrows et Ncols, dimensions de la matrice de representation du BOARD
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pour les routages automatiques et calculs de zone
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* Calcule Nrows et Ncols, dimensions de la matrice de representation du BOARD
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* pour les routages automatiques et calculs de zone
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*/
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{
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BOARD* pcb = frame->m_Pcb;
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@ -61,6 +62,7 @@ BOARD * pcb = frame->m_Pcb;
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return TRUE;
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}
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/*******************/
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/* class BOARDHEAD */
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/*******************/
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@ -76,20 +78,24 @@ BOARDHEAD::BOARDHEAD(void)
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m_MemSize = 0;
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}
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BOARDHEAD::~BOARDHEAD( void )
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{
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}
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/******************************/
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int BOARDHEAD::InitBoard( void )
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/*****************************/
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/* initialize the data structures
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retourne la taille RAM utilisee, ou -1 si defaut
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* retourne la taille RAM utilisee, ou -1 si defaut
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*/
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{
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int ii, kk;
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if (Nrows <= 0 || Ncols <= 0) return(0);
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if( Nrows <= 0 || Ncols <= 0 )
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return 0;
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m_Nrows = Nrows;
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m_Ncols = Ncols;
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@ -105,22 +111,26 @@ int ii, kk;
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/* allocate Board & initialize everything to empty */
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m_BoardSide[kk] = (BoardCell*) MyZMalloc( ii * sizeof(BoardCell) );
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if( m_BoardSide[kk] == NULL) return(-1);
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if( m_BoardSide[kk] == NULL )
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return -1;
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/***** allocate Distances *****/
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m_DistSide[kk] = (DistCell*) MyZMalloc( ii * sizeof(DistCell) );
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if (m_DistSide[kk] == NULL) return(-1);
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if( m_DistSide[kk] == NULL )
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return -1;
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/***** allocate Dir (chars) *****/
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m_DirSide[kk] = (char*) MyZMalloc( ii );
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if (m_DirSide[kk] == NULL) return( -1 );
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if( m_DirSide[kk] == NULL )
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return -1;
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}
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m_MemSize = m_Layers * ii * ( sizeof(BoardCell) + sizeof(DistCell) + sizeof(char) );
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return(m_MemSize);
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return m_MemSize;
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}
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/*********************************/
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void BOARDHEAD::UnInitBoard( void )
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/*********************************/
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@ -155,20 +165,20 @@ int ii;
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}
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/*****************************************************/
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void PlaceCells( BOARD* Pcb, int net_code, int flag )
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/*****************************************************/
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/* Initialise les cellules du board a la valeur HOLE et VIA_IMPOSSIBLE
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selon les marges d'isolement
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les elements de net_code = net_code ne seront pas places comme occupe
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mais en VIA_IMPOSSIBLE uniquement
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Pour Routage 1 seule face:
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le plan BOTTOM est utilise
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et Route_Layer_BOTTOM = Route_Layer_TOP
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Selon les bits = 1 du parametre flag:
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si FORCE_PADS : tous les pads seront places meme ceux de meme net_code
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/* Initialise les cellules du board a la valeur HOLE et VIA_IMPOSSIBLE
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* selon les marges d'isolement
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* les elements de net_code = net_code ne seront pas places comme occupe
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* mais en VIA_IMPOSSIBLE uniquement
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* Pour Routage 1 seule face:
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* le plan BOTTOM est utilise
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* et Route_Layer_BOTTOM = Route_Layer_TOP
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*
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* Selon les bits = 1 du parametre flag:
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* si FORCE_PADS : tous les pads seront places meme ceux de meme net_code
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*/
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{
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int ii;
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@ -212,7 +222,8 @@ int masque_layer;
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{
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TRACK* TmpSegm = new TRACK( NULL );
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TmpSegm->m_Layer = ( (EDGE_MODULE*) PtModStruct )->m_Layer;
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if(TmpSegm->m_Layer == EDGE_N) TmpSegm->m_Layer = -1;
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if( TmpSegm->m_Layer == EDGE_N )
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TmpSegm->m_Layer = -1;
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TmpSegm->m_Start = ( (EDGE_MODULE*) PtModStruct )->m_Start;
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TmpSegm->m_End = ( (EDGE_MODULE*) PtModStruct )->m_End;
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@ -228,7 +239,8 @@ int masque_layer;
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break;
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}
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default: break;
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default:
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break;
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}
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}
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}
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@ -261,6 +273,7 @@ int masque_layer;
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TmpSegm->m_NetCode = -1;
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TraceSegmentPcb( Pcb, TmpSegm, type_cell, marge, WRITE_CELL );
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// TraceSegmentPcb(Pcb, TmpSegm, VIA_IMPOSSIBLE, via_marge,WRITE_OR_CELL );
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delete TmpSegm;
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break;
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@ -268,7 +281,8 @@ int masque_layer;
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case TYPETEXTE:
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PtText = (TEXTE_PCB*) PtStruct;
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if(PtText->GetLength() == 0 ) break;
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if( PtText->GetLength() == 0 )
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break;
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ux0 = PtText->m_Pos.x; uy0 = PtText->m_Pos.y;
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dx = PtText->Pitch() * PtText->GetLength();
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@ -290,7 +304,8 @@ int masque_layer;
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masque_layer, VIA_IMPOSSIBLE, WRITE_OR_CELL );
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break;
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default: break;
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default:
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break;
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}
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}
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@ -298,7 +313,8 @@ int masque_layer;
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pt_segm = Pcb->m_Track;
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for( ; pt_segm != NULL; pt_segm = (TRACK*) pt_segm->Pnext )
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{
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if(net_code == pt_segm->m_NetCode) continue;
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if( net_code == pt_segm->m_NetCode )
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continue;
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TraceSegmentPcb( Pcb, pt_segm, HOLE, marge, WRITE_CELL );
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TraceSegmentPcb( Pcb, pt_segm, VIA_IMPOSSIBLE, via_marge, WRITE_OR_CELL );
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}
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@ -307,12 +323,14 @@ int masque_layer;
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pt_segm = (TRACK*) Pcb->m_Zone;
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for( ; pt_segm != NULL; pt_segm = (TRACK*) pt_segm->Pnext )
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{
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if(net_code == pt_segm->m_NetCode) continue;
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if( net_code == pt_segm->m_NetCode )
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continue;
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TraceSegmentPcb( Pcb, pt_segm, HOLE, marge, WRITE_CELL );
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TraceSegmentPcb( Pcb, pt_segm, VIA_IMPOSSIBLE, via_marge, WRITE_OR_CELL );
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}
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}
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/******************************************************/
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int Build_Work( BOARD* Pcb, CHEVELU* pt_base_chevelu )
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/*****************************************************/
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@ -331,9 +349,12 @@ wxString msg;
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for( ii = Pcb->GetNumRatsnests(); ii > 0; ii--, pt_rats++ )
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{
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/* On ne route que les chevelus actifs et routables */
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if( (pt_rats->status & CH_ACTIF) == 0) continue;
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if( pt_rats->status & CH_UNROUTABLE) continue;
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if( (pt_rats->status & CH_ROUTE_REQ) == 0 ) continue;
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if( (pt_rats->status & CH_ACTIF) == 0 )
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continue;
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if( pt_rats->status & CH_UNROUTABLE )
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continue;
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if( (pt_rats->status & CH_ROUTE_REQ) == 0 )
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continue;
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pt_pad = pt_rats->pad_start;
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current_net_code = pt_pad->m_NetCode;
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@ -345,7 +366,7 @@ wxString msg;
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msg.Printf( wxT( "erreur : row = %d ( padY %d pcbY %d) " ), r1,
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pt_pad->m_Pos.y, Pcb->m_BoundaryBox.m_Pos.y );
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DisplayError( NULL, msg );
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return(0);
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return 0;
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}
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c1 = (pt_pad->m_Pos.x - Pcb->m_BoundaryBox.m_Pos.x + demi_pas ) / g_GridRoutingSize;
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if( c1 < 0 || c1 >= Ncols )
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@ -353,7 +374,7 @@ wxString msg;
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msg.Printf( wxT( "erreur : col = %d ( padX %d pcbX %d) " ), c1,
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pt_pad->m_Pos.x, Pcb->m_BoundaryBox.m_Pos.x );
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DisplayError( NULL, msg );
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return(0);
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return 0;
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}
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pt_pad = pt_rats->pad_end;
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@ -364,7 +385,7 @@ wxString msg;
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msg.Printf( wxT( "erreur : row = %d ( padY %d pcbY %d) " ), r2,
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pt_pad->m_Pos.y, Pcb->m_BoundaryBox.m_Pos.y );
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DisplayError( NULL, msg );
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return(0);
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return 0;
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}
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c2 = (pt_pad->m_Pos.x - Pcb->m_BoundaryBox.m_Pos.x + demi_pas ) / g_GridRoutingSize;
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if( c2 < 0 || c2 >= Ncols )
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@ -372,28 +393,28 @@ wxString msg;
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msg.Printf( wxT( "erreur : col = %d ( padX %d pcbX %d) " ), c2,
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pt_pad->m_Pos.x, Pcb->m_BoundaryBox.m_Pos.x );
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DisplayError( NULL, msg );
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return(0);
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return 0;
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}
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SetWork( r1, c1, current_net_code, r2, c2, pt_ch, 0 ); Ntotal++;
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}
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SortWork();
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return(Ntotal);
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return Ntotal;
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}
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/*******************************************/
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BoardCell GetCell( int row, int col, int side )
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/*******************************************/
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/* fetch board cell :
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*/
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{
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BoardCell* p;
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p = Board.m_BoardSide[side];
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return( p[row*Ncols +col] );
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return p[row * Ncols + col];
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}
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@ -423,6 +444,7 @@ BoardCell *p;
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p[r * Ncols + c] |= x;
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}
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/******************************************/
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/* void XorCell(int r,int c,int s,BoardCell x ) */
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/******************************************/
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@ -448,6 +470,7 @@ BoardCell *p;
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p[r * Ncols + c] &= x;
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}
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/************************************************/
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/* void AddCell(int r,int c,int s,BoardCell x ) */
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/************************************************/
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@ -461,7 +484,6 @@ BoardCell *p;
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}
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/****************************************/
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/* DistCell GetDist(int r,int c,int s ) */
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/****************************************/
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@ -472,7 +494,7 @@ DistCell GetDist(int r,int c,int s ) /* fetch distance cell */
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DistCell* p;
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p = Board.m_DistSide[s];
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return( p[r*Ncols+c] );
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return p[r * Ncols + c];
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}
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@ -500,7 +522,7 @@ int GetDir(int r,int c,int s )
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char* p;
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p = Board.m_DirSide[s];
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return( (int)(p[r*Ncols+c]) );
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return (int) (p[r * Ncols + c]);
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}
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@ -509,7 +531,6 @@ char *p;
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/*****************************************/
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/* store direction cell */
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void SetDir( int r, int c, int s, int x )
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{
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char* p;
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@ -517,4 +538,3 @@ char *p;
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p = Board.m_DirSide[s];
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p[r * Ncols + c] = (char) x;
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}
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