Fix invalid string compare in IBIS parser

strcmp returns 0 if strings are the same but compareIbisWord returns
True (1).

Adds an IBIS simulation QA test case to catch this in the future

Fixes https://gitlab.com/kicad/code/kicad/-/issues/16223

(cherry picked from commit ef8b6bf9e1)
This commit is contained in:
Seth Hillbrand 2023-11-30 09:12:36 -08:00
parent 23175c163f
commit 343828c552
4 changed files with 2165 additions and 17 deletions

View File

@ -1946,39 +1946,39 @@ bool IbisParser::readModel()
{
if( readWord( subparam ) )
{
if( !compareIbisWord( subparam.c_str(), "Input" ) )
if( compareIbisWord( subparam.c_str(), "Input" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::INPUT_STD;
else if( !compareIbisWord( subparam.c_str(), "Output" ) )
else if( compareIbisWord( subparam.c_str(), "Output" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::OUTPUT;
else if( !compareIbisWord( subparam.c_str(), "I/O" ) )
else if( compareIbisWord( subparam.c_str(), "I/O" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::IO;
else if( !compareIbisWord( subparam.c_str(), "3-state" ) )
else if( compareIbisWord( subparam.c_str(), "3-state" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::THREE_STATE;
else if( !compareIbisWord( subparam.c_str(), "Open_drain" ) )
else if( compareIbisWord( subparam.c_str(), "Open_drain" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::OPEN_DRAIN;
else if( !compareIbisWord( subparam.c_str(), "I/O_Open_drain" ) )
else if( compareIbisWord( subparam.c_str(), "I/O_Open_drain" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::IO_OPEN_DRAIN;
else if( !compareIbisWord( subparam.c_str(), "Open_sink" ) )
else if( compareIbisWord( subparam.c_str(), "Open_sink" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::OPEN_SINK;
else if( !compareIbisWord( subparam.c_str(), "I/O_open_sink" ) )
else if( compareIbisWord( subparam.c_str(), "I/O_open_sink" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::IO_OPEN_SINK;
else if( !compareIbisWord( subparam.c_str(), "Open_source" ) )
else if( compareIbisWord( subparam.c_str(), "Open_source" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::OPEN_SOURCE;
else if( !compareIbisWord( subparam.c_str(), "I/O_open_source" ) )
else if( compareIbisWord( subparam.c_str(), "I/O_open_source" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::IO_OPEN_SOURCE;
else if( !compareIbisWord( subparam.c_str(), "Input_ECL" ) )
else if( compareIbisWord( subparam.c_str(), "Input_ECL" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::INPUT_ECL;
else if( !compareIbisWord( subparam.c_str(), "Output_ECL" ) )
else if( compareIbisWord( subparam.c_str(), "Output_ECL" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::OUTPUT_ECL;
else if( !compareIbisWord( subparam.c_str(), "I/O_ECL" ) )
else if( compareIbisWord( subparam.c_str(), "I/O_ECL" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::IO_ECL;
else if( !compareIbisWord( subparam.c_str(), "3-state_ECL" ) )
else if( compareIbisWord( subparam.c_str(), "3-state_ECL" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::THREE_STATE_ECL;
else if( !compareIbisWord( subparam.c_str(), "Terminator" ) )
else if( compareIbisWord( subparam.c_str(), "Terminator" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::TERMINATOR;
else if( !compareIbisWord( subparam.c_str(), "Series" ) )
else if( compareIbisWord( subparam.c_str(), "Series" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::SERIES;
else if( !compareIbisWord( subparam.c_str(), "Series_switch" ) )
else if( compareIbisWord( subparam.c_str(), "Series_switch" ) )
m_currentModel->m_type = IBIS_MODEL_TYPE::SERIES_SWITCH;
else
{

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@ -0,0 +1,93 @@
[IBIS Ver] 1.1 |Let's test a comment
[Comment char] #_char
[File name] ibis_v1_1.ibs
[File Rev] 1.0 #Let's test a comment
[Date] 26/08/2021
[Source] This is the
source for the files
[Notes] We can have some
Notes
[Disclaimer] This is NOT a valid component.
[Component] Virtual
[Manufacturer] KiCad
[Package]
R_pkg 50m 40m 60m
L_pkg 2n NA NA
C_pkg 10p NA NA
[Pin] signal_name model_name R_pin L_pin C_pin
1 VCC POWER 5mm 2n NA
2 GND GND 55m NA NA
3 X Input 55m NA 0.2p
4 Y Output 55m 2n 0.2p
[Model] Input
Model_type Input
Polarity Non-Inverting
Enable Active-High
Vinl = 0.8V
Vinh = 2.0V
C_comp 1.0pF 0.5pF 2.0pF
[Voltage range] 5.0V 4.5V 5.5V
[GND_clamp]
#
# Voltage I(typ) I(min) I(max)
#
-5.0V -50.0m NA NA
0.0V 0 NA NA
5.0V 0 NA NA
[POWER_clamp]
#
# Voltage I(typ) I(min) I(max)
#
-5.0V 50.0m NA NA
0.0V 0 NA NA
5.0V 0 NA NA
[Model] Output
Model_type Output
Polarity Non-Inverting
Enable Active-High
C_comp 10.0pF 8.0pF 15.0pF
[Voltage range] 5.0V 4.5V 5.5V
[Pulldown]
# Voltage I(typ) I(min) I(max)
#
-5.0V -50.0m -40.0m -60.0m
0.0V 0 0 0
5.0V 500.0m 400.0m 600.0m
10.0V 550.0m 440.0m 660.0m
[Pullup]
#
# Voltage I(typ) I(min) I(max)
#
-5.0V 50.0m 40.0m 60.0m
0.0V 0 0 0
5.0V -500.0m -400.0m -600.0m
10.0V -550.0m -440.0m -660.0m
[GND_clamp]
#
# Voltage I(typ) I(min) I(max)
#
-5.0V -500.0m NA NA
-0.7V 0 NA NA
5.0V 0 NA NA
[POWER_clamp]
#
# Voltage I(typ) I(min) I(max)
#
-5.0V 500.0m NA NA
-0.7V 0 NA NA
5.0V 0 NA NA
[Ramp]
# variable typ min max
dV/dt_r 3.0/30n 2.8/30n NA
dV/dt_f 3.0/20n 2.8/20n 3.2/20n
[END]

File diff suppressed because it is too large Load Diff

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@ -148,3 +148,17 @@ BOOST_FIXTURE_TEST_CASE( VariableSubstitutions, TEST_SIM_REGRESSIONS_FIXTURE )
TestTranPoint( 0.015, { { "V(Net-_R1-Pad2_)", -311 } } );
TestTranPoint( 0.025, { { "V(Net-_R1-Pad2_)", 311 } } );
}
BOOST_FIXTURE_TEST_CASE( IBISSim, TEST_SIM_REGRESSIONS_FIXTURE )
{
LOCALE_IO dummy;
const MOCK_PGM_BASE& program = static_cast<MOCK_PGM_BASE&>( Pgm() );
MOCK_EXPECT( program.GetLocalEnvVariables ).returns( ENV_VAR_MAP() );
TestNetlist( "issue16223" );
TestTranPoint( 0.0, { { "V(PRBS_OUTPUT)", 5.114 } } );
TestTranPoint( 1e-6, { { "V(PRBS_OUTPUT)", -0.1144 } } );
}