on export, test via for netcode == 0
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@ -2413,20 +2413,17 @@ public:
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* Class PIN_REF
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* Class PIN_REF
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* corresponds to the <pin_reference> definition in the specctra dsn spec.
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* corresponds to the <pin_reference> definition in the specctra dsn spec.
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*/
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*/
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class PIN_REF : public ELEM
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struct PIN_REF : public ELEM
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{
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{
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friend class SPECCTRA_DB;
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std::string component_id;
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std::string component_id;
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std::string pin_id;
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std::string pin_id;
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public:
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PIN_REF( ELEM* aParent ) :
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PIN_REF( ELEM* aParent ) :
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ELEM( T_pin, aParent )
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ELEM( T_pin, aParent )
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{
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{
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}
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}
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/**
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/**
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* Function FormatIt
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* Function FormatIt
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* is like Format() but is not virual and returns the number of characters
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* is like Format() but is not virual and returns the number of characters
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@ -2607,6 +2604,18 @@ public:
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delete comp_order;
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delete comp_order;
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}
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}
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int FindPIN_REF( const std::string& aComponent )
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{
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for( unsigned i=0; i<pins.size(); ++i )
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{
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if( 0 == aComponent.compare( pins[i].component_id ) )
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return int(i);
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}
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return -1;
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}
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void Format( OUTPUTFORMATTER* out, int nestLevel ) throw( IOError )
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void Format( OUTPUTFORMATTER* out, int nestLevel ) throw( IOError )
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{
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{
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const char* quote = out->GetQuoteChar( net_id.c_str() );
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const char* quote = out->GetQuoteChar( net_id.c_str() );
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@ -1054,11 +1054,21 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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pcb->library->AddPadstack( padstack );
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pcb->library->AddPadstack( padstack );
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}
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}
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D(std::string component = "U1";)
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// copy our SPECCTRA_DB::nets to the pcb->network
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// copy our SPECCTRA_DB::nets to the pcb->network
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for( unsigned n=1; n<nets.size(); ++n )
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for( unsigned n=1; n<nets.size(); ++n )
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{
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{
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NET* net = nets[n];
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NET* net = nets[n];
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if( net->pins.size() )
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if( net->pins.size()
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#if defined(DEBUG)
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// experimenting with exporting a subset of all the nets
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// and with incremental, iterative autorouting.
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&& net->FindPIN_REF( component ) >= 0
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#endif
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)
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{
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{
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// give ownership to pcb->network
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// give ownership to pcb->network
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pcb->network->nets.push_back( net );
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pcb->network->nets.push_back( net );
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@ -1149,7 +1159,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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wiring->wires.push_back( wire );
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wiring->wires.push_back( wire );
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wire->net_id = netname;
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wire->net_id = netname;
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wire->wire_type = T_normal; // @todo, this should be configurable
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wire->wire_type = T_protect; // @todo, this should be configurable
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int kiLayer = track->GetLayer();
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int kiLayer = track->GetLayer();
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int pcbLayer = kicadLayer2pcb[kiLayer];
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int pcbLayer = kicadLayer2pcb[kiLayer];
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@ -1181,6 +1191,10 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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SEGVIA* via = (SEGVIA*) items[i];
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SEGVIA* via = (SEGVIA*) items[i];
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wxASSERT( via->Type() == TYPEVIA );
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wxASSERT( via->Type() == TYPEVIA );
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int netcode = via->GetNet();
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if( netcode == 0 )
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continue;
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PADSTACK* padstack = makeVia( via );
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PADSTACK* padstack = makeVia( via );
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PADSTACK* registered = pcb->library->LookupVia( padstack );
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PADSTACK* registered = pcb->library->LookupVia( padstack );
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if( padstack != registered )
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if( padstack != registered )
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@ -1194,13 +1208,12 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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dsnVia->padstack_id = registered->padstack_id;
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dsnVia->padstack_id = registered->padstack_id;
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dsnVia->vertexes.push_back( mapPt( via->GetPosition() ) );
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dsnVia->vertexes.push_back( mapPt( via->GetPosition() ) );
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int netcode = via->GetNet();
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EQUIPOT* equipot = aBoard->FindNet( netcode );
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EQUIPOT* equipot = aBoard->FindNet( netcode );
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wxASSERT( equipot );
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wxASSERT( equipot );
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dsnVia->net_id = CONV_TO_UTF8( equipot->m_Netname );
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dsnVia->net_id = CONV_TO_UTF8( equipot->m_Netname );
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dsnVia->via_type = T_normal; // @todo, this should be configurable
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dsnVia->via_type = T_protect; // @todo, this should be configurable
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}
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}
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}
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}
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