Re-add netlisting logic inadvertently removed during refactor
Fixes https://gitlab.com/kicad/code/kicad/-/issues/4692
This commit is contained in:
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202b55f4d2
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40e0a4295d
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@ -111,3 +111,145 @@ SCH_COMPONENT* NETLIST_EXPORTER::findNextComponent( EDA_ITEM* aItem, SCH_SHEET_P
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return comp;
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return comp;
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}
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}
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/// Comparison routine for sorting by pin numbers.
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static bool sortPinsByNum( PIN_INFO& aPin1, PIN_INFO& aPin2 )
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{
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// return "lhs < rhs"
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return UTIL::RefDesStringCompare( aPin1.num, aPin2.num ) < 0;
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}
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void NETLIST_EXPORTER::CreatePinList( SCH_COMPONENT* comp, SCH_SHEET_PATH* aSheetPath )
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{
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wxString ref( comp->GetRef( aSheetPath ) );
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// Power symbols and other components which have the reference starting
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// with "#" are not included in netlist (pseudo or virtual components)
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if( ref[0] == wxChar( '#' ) )
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return;
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// if( Component->m_FlagControlMulti == 1 )
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// continue; /* yes */
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// removed because with multiple instances of one schematic
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// (several sheets pointing to 1 screen), this will be erroneously be
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// toggled.
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if( !comp->GetPartRef() )
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return;
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m_SortedComponentPinList.clear();
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// If component is a "multi parts per package" type
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if( comp->GetPartRef()->GetUnitCount() > 1 )
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{
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// Collect all pins for this reference designator by searching
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// the entire design for other parts with the same reference designator.
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// This is only done once, it would be too expensive otherwise.
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findAllUnitsOfComponent( comp, comp->GetPartRef().get(), aSheetPath );
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}
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else // entry->GetUnitCount() <= 1 means one part per package
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{
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for( const auto& pin : comp->GetSchPins( aSheetPath ) )
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{
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if( auto conn = pin->Connection( *aSheetPath ) )
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{
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const wxString& netName = conn->Name();
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// Skip unconnected pins
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CONNECTION_SUBGRAPH* sg =
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m_schematic->ConnectionGraph()->FindSubgraphByName( netName, *aSheetPath );
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if( !sg || sg->m_no_connect || sg->m_items.size() < 2 )
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continue;
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m_SortedComponentPinList.emplace_back( pin->GetNumber(), netName );
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}
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}
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}
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// Sort pins in m_SortedComponentPinList by pin number
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sort( m_SortedComponentPinList.begin(), m_SortedComponentPinList.end(), sortPinsByNum );
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// Remove duplicate Pins in m_SortedComponentPinList
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eraseDuplicatePins();
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// record the usage of this library component entry.
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m_LibParts.insert( comp->GetPartRef().get() ); // rejects non-unique pointers
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}
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void NETLIST_EXPORTER::eraseDuplicatePins()
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{
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for( unsigned ii = 0; ii < m_SortedComponentPinList.size(); ii++ )
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{
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if( m_SortedComponentPinList[ii].num.empty() ) /* already deleted */
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continue;
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/* Search for duplicated pins
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* If found, remove duplicates. The priority is to keep connected pins
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* and remove unconnected
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* - So this allows (for instance when using multi op amps per package
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* - to connect only one op amp to power
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* Because the pin list is sorted by m_PinNum value, duplicated pins
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* are necessary successive in list
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*/
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int idxref = ii;
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for( unsigned jj = ii + 1; jj < m_SortedComponentPinList.size(); jj++ )
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{
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if( m_SortedComponentPinList[jj].num.empty() ) // Already removed
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continue;
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// if other pin num, stop search,
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// because all pins having the same number are consecutive in list.
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if( m_SortedComponentPinList[idxref].num != m_SortedComponentPinList[jj].num )
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break;
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m_SortedComponentPinList[jj].num.clear();
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}
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}
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}
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void NETLIST_EXPORTER::findAllUnitsOfComponent( SCH_COMPONENT* aComponent,
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LIB_PART* aEntry, SCH_SHEET_PATH* aSheetPath )
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{
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wxString ref = aComponent->GetRef( aSheetPath );
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wxString ref2;
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SCH_SHEET_LIST sheetList = m_schematic->GetSheets();
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for( unsigned i = 0; i < sheetList.size(); i++ )
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{
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for( auto item : sheetList[i].LastScreen()->Items().OfType( SCH_COMPONENT_T ) )
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{
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SCH_COMPONENT* comp2 = static_cast<SCH_COMPONENT*>( item );
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ref2 = comp2->GetRef( &sheetList[i] );
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if( ref2.CmpNoCase( ref ) != 0 )
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continue;
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for( const auto& pin : comp2->GetSchPins( aSheetPath ) )
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{
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if( auto conn = pin->Connection( *aSheetPath ) )
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{
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const wxString& netName = conn->Name();
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// Skip unconnected pins
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CONNECTION_SUBGRAPH* sg = m_schematic->ConnectionGraph()->FindSubgraphByName(
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netName, *aSheetPath );
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if( !sg || sg->m_no_connect || sg->m_items.size() < 2 )
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continue;
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m_SortedComponentPinList.emplace_back( pin->GetNumber(), netName );
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}
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}
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}
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}
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}
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@ -81,6 +81,17 @@ struct LIB_PART_LESS_THAN
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}
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}
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};
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};
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struct PIN_INFO
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{
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PIN_INFO( const wxString& aPinNumber, const wxString& aNetName ) :
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num( aPinNumber ),
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netName( aNetName )
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{}
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wxString num;
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wxString netName;
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};
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/**
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/**
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* NETLIST_EXPORTER
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* NETLIST_EXPORTER
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* is a abstract class used for the netlist exporters that eeschema supports.
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* is a abstract class used for the netlist exporters that eeschema supports.
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@ -88,16 +99,32 @@ struct LIB_PART_LESS_THAN
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class NETLIST_EXPORTER
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class NETLIST_EXPORTER
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{
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{
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protected:
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protected:
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/// Used to temporarily store and filter the list of pins of a schematic component
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/// when generating schematic component data in netlist (comp section). No ownership
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/// of members.
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/// TODO(snh): Descope this object
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std::vector<PIN_INFO> m_SortedComponentPinList;
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/// Used for "multi parts per package" components,
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/// Used for "multi parts per package" components,
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/// avoids processing a lib component more than once.
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/// avoids processing a lib component more than once.
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UNIQUE_STRINGS m_ReferencesAlreadyFound;
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UNIQUE_STRINGS m_ReferencesAlreadyFound;
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/// unique library parts used. LIB_PART items are sorted by names
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/// unique library parts used. LIB_PART items are s
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/// orted by names
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std::set<LIB_PART*, LIB_PART_LESS_THAN> m_LibParts;
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std::set<LIB_PART*, LIB_PART_LESS_THAN> m_LibParts;
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/// The schematic we're generating a netlist for
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/// The schematic we're generating a netlist for
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SCHEMATIC* m_schematic;
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SCHEMATIC* m_schematic;
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/**
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* Function findNextComponentAndCreatePinList
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* finds a component from the DrawList and builds
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* its pin list in m_SortedComponentPinList. This list is sorted by pin num.
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* the component is the next actual component after aItem
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* (power symbols and virtual components that have their reference starting by '#'are skipped).
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*/
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void CreatePinList( SCH_COMPONENT* aItem, SCH_SHEET_PATH* aSheetPath );
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/**
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/**
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* Checks if the given component should be processed for netlisting.
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* Checks if the given component should be processed for netlisting.
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* Prevents processing multi-unit components more than once, etc.
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* Prevents processing multi-unit components more than once, etc.
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@ -107,6 +134,32 @@ protected:
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*/
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*/
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SCH_COMPONENT* findNextComponent( EDA_ITEM* aItem, SCH_SHEET_PATH* aSheetPath );
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SCH_COMPONENT* findNextComponent( EDA_ITEM* aItem, SCH_SHEET_PATH* aSheetPath );
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/**
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* Function eraseDuplicatePins
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* erase duplicate Pins from m_SortedComponentPinList (i.e. set pointer in this list to NULL).
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* (This is a list of pins found in the whole schematic, for a single
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* component.) These duplicate pins were put in list because some pins (powers... )
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* are found more than one time when we have a multiple parts per package
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* component. For instance, a 74ls00 has 4 parts, and therefore the VCC pin
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* and GND pin appears 4 times in the list.
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* Note: this list *MUST* be sorted by pin number (.m_PinNum member value)
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* Also set the m_Flag member of "removed" NETLIST_OBJECT pin item to 1
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*/
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void eraseDuplicatePins();
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/**
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* Function findAllUnitsOfComponent
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* is used for "multiple parts per package" components.
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* <p>
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* Search the entire design for all units of \a aComponent based on
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* matching reference designator, and for each unit, add all its pins
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* to the temporary sorted pin list, m_SortedComponentPinList.
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*/
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void findAllUnitsOfComponent( SCH_COMPONENT* aComponent,
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LIB_PART* aEntry,
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SCH_SHEET_PATH* aSheetPath );
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public:
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public:
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/**
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/**
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@ -163,6 +163,8 @@ bool NETLIST_EXPORTER_CADSTAR::writeListOfNets( FILE* f )
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} ),
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} ),
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sorted_items.end() );
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sorted_items.end() );
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print_ter = 0;
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for( const auto& pair : sorted_items )
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for( const auto& pair : sorted_items )
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{
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{
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SCH_PIN* pin = pair.first;
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SCH_PIN* pin = pair.first;
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@ -78,6 +78,8 @@ bool NETLIST_EXPORTER_ORCADPCB2::WriteNetlist( const wxString& aOutFileName,
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if( !comp )
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if( !comp )
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continue;
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continue;
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CreatePinList( comp, &sheet );
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if( comp->GetPartRef() && comp->GetPartRef()->GetFootprints().GetCount() != 0 )
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if( comp->GetPartRef() && comp->GetPartRef()->GetFootprints().GetCount() != 0 )
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cmpList.push_back( SCH_REFERENCE( comp, comp->GetPartRef().get(), sheet ) );
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cmpList.push_back( SCH_REFERENCE( comp, comp->GetPartRef().get(), sheet ) );
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@ -106,28 +108,12 @@ bool NETLIST_EXPORTER_ORCADPCB2::WriteNetlist( const wxString& aOutFileName,
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ret |= fprintf( f, "\n" );
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ret |= fprintf( f, "\n" );
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// Write pin list:
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// Write pin list:
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std::vector<SCH_PIN*> pins;
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for( const PIN_INFO& pin : m_SortedComponentPinList )
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for( const auto& pin : comp->GetSchPins( &sheet ) )
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pins.emplace_back( pin );
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std::sort( pins.begin(), pins.end(),
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[]( const SCH_PIN* a, const SCH_PIN* b )
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{
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return UTIL::RefDesStringCompare( a->GetNumber(), b->GetNumber() ) < 0;
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} );
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for( const auto* pin : pins )
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{
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{
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if( auto conn = pin->Connection( sheet ) )
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netName = pin.netName;
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netName = conn->Name();
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else
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netName = wxT( "?" );
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netName.Replace( wxT( " " ), wxT( "_" ) );
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netName.Replace( wxT( " " ), wxT( "_" ) );
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ret |= fprintf( f, " ( %4.4s %s )\n", TO_UTF8( pin->GetNumber() ),
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ret |= fprintf( f, " ( %4.4s %s )\n", TO_UTF8( pin.num ), TO_UTF8( netName ) );
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TO_UTF8( netName ) );
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}
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}
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ret |= fprintf( f, " )\n" );
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ret |= fprintf( f, " )\n" );
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@ -291,6 +291,7 @@ bool NETLIST_EXPORTER_PSPICE::ProcessNetlist( unsigned aCtl )
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if( !comp )
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if( !comp )
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continue;
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continue;
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CreatePinList( comp, &sheet );
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SPICE_ITEM spiceItem;
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SPICE_ITEM spiceItem;
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spiceItem.m_parent = comp;
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spiceItem.m_parent = comp;
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@ -321,26 +322,14 @@ bool NETLIST_EXPORTER_PSPICE::ProcessNetlist( unsigned aCtl )
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wxArrayString pinNames;
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wxArrayString pinNames;
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// Store pin information
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// Store pin information
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for( const auto& pin : comp->GetSchPins( &sheet ) )
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for( const PIN_INFO& pin : m_SortedComponentPinList )
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{
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{
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if( auto conn = pin->Connection( sheet ) )
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{
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const wxString& netName = conn->Name();
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// Skip unconnected pins
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CONNECTION_SUBGRAPH* sg =
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m_schematic->ConnectionGraph()->FindSubgraphByName( netName, sheet );
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if( !sg || sg->m_no_connect || sg->m_items.size() < 2 )
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continue;
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// Create net mapping
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// Create net mapping
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spiceItem.m_pins.push_back( netName );
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spiceItem.m_pins.push_back( pin.netName );
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pinNames.Add( pin->GetName() );
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pinNames.Add( pin.num );
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if( m_netMap.count( netName ) == 0 )
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if( m_netMap.count( pin.netName ) == 0 )
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m_netMap[netName] = netIdx++;
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m_netMap[pin.netName] = netIdx++;
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}
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}
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}
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// Check if an alternative pin sequence is available:
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// Check if an alternative pin sequence is available:
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