remove global g_UserLibDirBuffer which was a project specific global, and no longer used with FP_LIB_TABLE support.

This commit is contained in:
Dick Hollenbeck 2014-06-03 10:59:52 -05:00
parent 093f810df3
commit 431675933a
15 changed files with 6 additions and 41 deletions

View File

@ -212,6 +212,7 @@ if( CMAKE_COMPILER_IS_GNUCXX OR CMAKE_CXX_COMPILER_ID MATCHES "Clang" )
# Defeat ELF's ability to use the GOT to replace locally implemented functions
# with ones from another module.
# https://bugs.launchpad.net/kicad/+bug/1322354
set( CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} ${TO_LINKER},-Bsymbolic" )
set( CMAKE_MODULE_LINKER_FLAGS "${CMAKE_MODULE_LINKER_FLAGS} ${TO_LINKER},-Bsymbolic" )
endif()

View File

@ -69,4 +69,6 @@ Dick's Final TODO List:
https://blueprints.launchpad.net/kicad/+spec/modular-kicad
Issues as a result of minimal testing:
Kicad project manager will crash when requesting help file.
If eeschema launched from C++ project manager does not find all libraries,
then the dialog showing the names of missing libraries is not visible,
probably because the wxFrame parent is not yet visible.

View File

@ -59,7 +59,6 @@
*/
bool g_ShowPageLimits = true;
wxString g_UserLibDirBuffer;
EDA_UNITS_T g_UserUnit;
EDA_COLOR_T g_GhostColor;

View File

@ -21,11 +21,6 @@ include_directories(
set( CVPCB_DIALOGS
# These 2 still use search paths, which don't exist in footprint land.
# dialogs/dialog_cvpcb_config.cpp
# dialogs/dialog_cvpcb_config_fbp.cpp
dialogs/dialog_display_options.cpp
dialogs/dialog_display_options_base.cpp
../pcbnew/dialogs/dialog_fp_lib_table.cpp

View File

@ -49,18 +49,12 @@ PARAM_CFG_ARRAY& CVPCB_MAINFRAME::GetProjectFileParameters()
m_projectFileParams.push_back( new PARAM_CFG_BASE( GROUP_PCB_LIBS, PARAM_COMMAND_ERASE ) );
m_projectFileParams.push_back( new PARAM_CFG_LIBNAME_LIST(
wxT( "LibName" ), &m_ModuleLibNames, GROUP_PCB_LIBS ) );
m_projectFileParams.push_back( new PARAM_CFG_LIBNAME_LIST(
wxT( "EquName" ), &m_AliasLibNames, GROUP_CVP_EQU ) );
m_projectFileParams.push_back( new PARAM_CFG_WXSTRING(
wxT( "NetIExt" ), &m_NetlistFileExtension ) );
m_projectFileParams.push_back( new PARAM_CFG_FILENAME(
wxT( "LibDir" ), &m_UserLibraryPath, GROUP_PCB_LIBS ) );
return m_projectFileParams;
}
@ -81,7 +75,7 @@ void CVPCB_MAINFRAME::LoadProjectFile( const wxString& aFileName )
if( m_NetlistFileExtension.IsEmpty() )
m_NetlistFileExtension = wxT( "net" );
// Force it to be loaded on demand.
// Force FP_LIB_TABLE to be loaded on demand.
prj.ElemClear( PROJECT::ELEM_FPTBL );
}

View File

@ -45,7 +45,6 @@
#include <cvpcb.h>
#include <cvstruct.h>
#include <invoke_pcb_dialog.h>
#include <dialog_cvpcb_config.h>
#include <class_DisplayFootprintsFrame.h>
#include <cvpcb_id.h>

View File

@ -67,7 +67,6 @@ public:
wxFileName m_NetlistFileName;
wxArrayString m_ModuleLibNames;
wxArrayString m_AliasLibNames;
wxString m_UserLibraryPath;
wxString m_NetlistFileExtension;
wxString m_DocModulesFileName;
FOOTPRINT_LIST m_footprints;

View File

@ -57,8 +57,7 @@ private:
SCH_EDIT_FRAME* m_Parent;
bool m_LibListChanged;
bool m_LibPathChanged;
wxString m_UserLibDirBufferImg; // Copy of original g_UserLibDirBuffer
wxString m_UserLibDirBufferImg;
// event handlers, overiding the fbp handlers
void Init();

View File

@ -384,9 +384,6 @@ private:
void setMargins();
};
/// Default user lib path can be left void, if the standard lib path is used
extern wxString g_UserLibDirBuffer;
extern bool g_ShowPageLimits; ///< true to display the page limits
extern EDA_UNITS_T g_UserUnit; ///< display units

View File

@ -301,8 +301,6 @@ PARAM_CFG_ARRAY PCB_EDIT_FRAME::GetProjectFileParameters()
pca.push_back( new PARAM_CFG_FILENAME( wxT( "PageLayoutDescrFile" ),
&BASE_SCREEN::m_PageLayoutDescrFileName ) );
pca.push_back( new PARAM_CFG_FILENAME( wxT( "LibDir" ), &g_UserLibDirBuffer, GROUP_PCB_LIBS ) );
pca.push_back( new PARAM_CFG_FILENAME( wxT( "LastNetListRead" ), &m_lastNetListRead ) );
pca.push_back( new PARAM_CFG_BOOL( wxT( "UseCmpFile" ), &m_useCmpFileForFpNames, true ) );

View File

@ -68,21 +68,3 @@ SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[pcbnew/libraries]
LibDir=
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=smd_capacitors
LibName7=smd_resistors
LibName8=smd_crystal&oscillator
LibName9=smd_dil
LibName10=smd_transistors
LibName11=libcms
LibName12=display
LibName13=led
LibName14=dip_sockets
LibName15=pga_sockets
LibName16=valves