Preparing stable version
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charras
parent
eda86007b9
commit
43a004eecc
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@ -421,6 +421,15 @@ void WinEDA_SetPageFrame::CreateControls()
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m_TextComment3->SetValidator( wxTextValidator(wxFILTER_NONE, & m_Screen->m_Commentaire3) );
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m_TextComment4->SetValidator( wxTextValidator(wxFILTER_NONE, & m_Screen->m_Commentaire4) );
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////@end WinEDA_SetPageFrame content construction
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#ifndef EESCHEMA
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m_RevisionExport->Show(false);
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m_TitleExport->Show(false);
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m_CompanyExport->Show(false);
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m_Comment1Export->Show(false);
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m_Comment2Export->Show(false);
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m_Comment3Export->Show(false);
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m_Comment4Export->Show(false);
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#endif
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}
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@ -1,228 +0,0 @@
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PCBNEW-BOARD Version 1 date Sat 09 Jan 2010 15:29:16 CET
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# Created by Pcbnew(20100109 SVN-R2201)-unstable
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$GENERAL
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LayerCount 2
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Ly 1FFF8001
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EnabledLayers 1FFF8001
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VisibleLayers 1FFF8001
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VisibleElements 00000FFF
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Links 0
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NoConn 0
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Di 11772 5924 32076 15517
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Ndraw 11
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Ntrack 0
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Nzone 0
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LayerThickness 630
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Nmodule 2
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Nnets 1
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$EndGENERAL
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$SHEETDESCR
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Sheet A4 11700 8267
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Title ""
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Date "9 jan 2010"
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Rev ""
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Comp ""
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Comment1 ""
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Comment2 ""
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Comment3 ""
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Comment4 ""
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$EndSHEETDESCR
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$SETUP
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InternalUnit 0.000100 INCH
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ZoneGridSize 250
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Layers 2
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Layer[0] Back signal
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Layer[15] Front signal
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TrackWidth 59
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TrackClearence 59
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ZoneClearence 200
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TrackMinWidth 59
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DrawSegmWidth 79
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EdgeSegmWidth 150
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ViaSize 236
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ViaDrill 118
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ViaMinSize 236
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ViaMinDrill 118
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MicroViaSize 118
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MicroViaDrill 59
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MicroViasAllowed 0
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MicroViaMinSize 118
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MicroViaMinDrill 59
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TextPcbWidth 120
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TextPcbSize 600 800
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EdgeModWidth 150
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TextModSize 600 600
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TextModWidth 120
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PadSize 591 118
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PadDrill 0
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Pad2MaskClearance 39
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AuxiliaryAxisOrg 0 0
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$EndSETUP
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$EQUIPOT
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Na 0 ""
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St ~
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$EndEQUIPOT
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$NCLASS
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Name "Default"
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Desc "Dies ist die voreingestellte Netzklasse."
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Clearance 59
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TrackWidth 59
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ViaDia 236
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ViaDrill 118
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uViaDia 118
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uViaDrill 59
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AddNet ""
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$EndNCLASS
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$MODULE OvalPads
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Po 13267 14243 0 15 4B40B409 4B408F2F ~~
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Li OvalPads
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Sc 4B408F2F
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AR
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Op 0 0 0
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T0 3886 -4 600 600 0 120 N V 21 N"RectPads"
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T1 7350 -24 600 600 0 120 N V 21 N"VAL**"
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$PAD
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Sh "1" R 591 591 0 0 0
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Dr 236 0 0
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At STD N 00E0FFFF
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Ne 0 ""
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Po -591 0
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$EndPAD
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$PAD
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Sh "2" R 591 591 0 0 0
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Dr 236 0 0
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At STD N 00E0FFFF
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Ne 0 ""
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Po 197 0
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$EndPAD
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$PAD
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Sh "3" R 591 591 0 0 0
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Dr 236 0 0
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At STD N 00E0FFFF
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Ne 0 ""
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Po 984 0
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$EndPAD
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$EndMODULE OvalPads
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$MODULE OvalPads
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Po 13359 15017 0 15 4B4892B7 4B408EC9 ~~
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Li OvalPads
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Sc 4B408EC9
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AR
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Op 0 0 0
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T0 3727 53 600 600 0 120 N V 21 N"OvalPads"
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T1 7231 53 600 600 0 120 N V 21 N"VAL**"
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$PAD
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Sh "1" O 118 591 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po -700 -1400
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$EndPAD
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$PAD
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Sh "2" O 591 118 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po -1292 -686
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$EndPAD
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$PAD
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Sh "3" O 118 591 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 263 -1769
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$EndPAD
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$PAD
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Sh "4" O 118 591 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 1405 -1237
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$EndPAD
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$PAD
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Sh "5" O 118 591 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 1287 -529
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$EndPAD
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$PAD
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Sh "6" O 118 591 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po -485 -37
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$EndPAD
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$PAD
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Sh "7" O 118 591 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po -268 -37
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$EndPAD
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$PAD
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Sh "8" O 118 591 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po -52 -37
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$EndPAD
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$EndMODULE OvalPads
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$DRAWSEGMENT
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Po 3 14527 14488 14882 14528 79
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De 25 0 900 0 0
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$EndDRAWSEGMENT
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$DRAWSEGMENT
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Po 3 12263 14311 12657 14370 79
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De 25 0 900 0 0
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$EndDRAWSEGMENT
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$TEXTPCB
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Te "Pad-Pad"
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nl "Rect-Oval"
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Po 8307 13740 600 800 120 0
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De 24 1 0 Normal
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$EndTEXTPCB
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$DRAWSEGMENT
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Po 3 12657 13878 13031 13917 79
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De 25 0 900 0 0
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$EndDRAWSEGMENT
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$TEXTPCB
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Te "Marker for DRC violations"
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Po 19500 11000 600 800 120 0
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De 24 1 0 Normal
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$EndTEXTPCB
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$DRAWSEGMENT
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Po 3 12500 11000 13000 11000 150
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De 25 0 900 0 0
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$EndDRAWSEGMENT
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$DRAWSEGMENT
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Po 0 12000 9000 12000 6000 150
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De 24 0 900 0 0
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$EndDRAWSEGMENT
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$DRAWSEGMENT
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Po 0 32000 9000 12000 9000 150
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De 24 0 900 0 0
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$EndDRAWSEGMENT
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$DRAWSEGMENT
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Po 0 32000 6000 32000 9000 150
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De 24 0 900 0 0
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$EndDRAWSEGMENT
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$DRAWSEGMENT
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Po 0 12000 6000 32000 6000 150
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De 24 0 900 0 0
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$EndDRAWSEGMENT
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$TEXTPCB
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Te "DRC Test Cases"
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Po 22000 7500 1575 1575 315 0
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De 24 1 0 Italic
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$EndTEXTPCB
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$TRACK
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$EndTRACK
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$ZONE
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$EndZONE
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$EndBOARD
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