Update qa tests to use new zone fill algo

This commit is contained in:
Seth Hillbrand 2023-07-19 16:13:42 -07:00
parent 9c08d4febe
commit 45ed38a63b
65 changed files with 323986 additions and 171748 deletions

File diff suppressed because it is too large Load Diff

View File

@ -1,5 +1,6 @@
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@ -57,6 +58,7 @@
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@ -65,24 +67,27 @@
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@ -106,6 +111,7 @@
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@ -114,19 +120,16 @@
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@ -135,29 +138,35 @@
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@ -185,7 +194,7 @@
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@ -199,10 +208,10 @@
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@ -211,33 +220,232 @@
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View File

@ -71,6 +71,7 @@
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "warning",
"hole_clearance": "error",
"hole_near_hole": "error",
@ -133,9 +134,6 @@
},
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@ -144,29 +142,35 @@
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@ -194,13 +198,13 @@
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@ -214,10 +218,10 @@
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},
{
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"clearance": 0.1,
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@ -226,29 +230,36 @@
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View File

@ -1,5 +1,6 @@
{
"board": {
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"defaults": {
"board_outline_line_width": 0.09999999999999999,
@ -51,24 +52,31 @@
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
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"version": 2
},
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"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
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@ -78,9 +86,15 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "error",
"silk_overlap": "error",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
@ -96,27 +110,77 @@
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"max_error": 0.005,
"min_clearance": 0.0,
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"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
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"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
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"solder_paste_clearance": 0.0,
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@ -337,7 +401,7 @@
"net_settings": {
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"bus_width": 6,
"clearance": 0.2,
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"diff_pair_via_gap": 0.25,
@ -351,21 +415,26 @@
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"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
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View File

@ -1,5 +1,6 @@
{
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@ -56,6 +57,7 @@
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"copper_sliver": "warning",
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@ -64,13 +66,17 @@
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@ -80,6 +86,7 @@
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"skew_out_of_range": "error",
@ -87,6 +94,7 @@
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@ -102,6 +110,7 @@
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@ -118,12 +127,56 @@
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@ -140,7 +193,7 @@
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@ -154,21 +207,26 @@
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View File

@ -217,8 +217,11 @@
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},
"page_layout_descr_file": ""

View File

@ -70,6 +70,7 @@
"rule_severities": {
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"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "ignore",
"copper_sliver": "warning",
"courtyards_overlap": "error",
@ -78,6 +79,7 @@
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
@ -121,6 +123,7 @@
"allow_microvias": false,
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"min_copper_edge_clearance": 0.25,
"min_hole_clearance": 0.254,
"min_hole_to_hole": 0.25,
@ -141,9 +144,6 @@
},
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"td_onpadsmd": true,
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@ -152,29 +152,35 @@
],
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}
@ -421,7 +427,7 @@
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"diff_pair_gap": 0.1524,
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@ -435,10 +441,10 @@
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},
{
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@ -447,28 +453,15 @@
"microvia_diameter": 0.3,
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"name": "HV",
"nets": [
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"/SIG_100XC2",
"/SIG_1X",
"/SIG_1XC",
"/SIG_1XC2",
"/SIG_50_{OPEN}",
"/SIG_IN_{1}",
"/SIG_IN_{2}",
"/SIG_IN_{3}",
"/SIG_{1}",
"/SIG_{2}"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
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{
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@ -477,30 +470,84 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "VaricapBias",
"nets": [
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"/VFILTER"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
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}
],
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},
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},
{
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},
{
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},
{
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},
{
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{
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},
{
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},
{
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},
{
"netclass": "HV",
"pattern": "/SIG_IN_{3}"
},
{
"netclass": "HV",
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},
{
"netclass": "HV",
"pattern": "/SIG_{2}"
},
{
"netclass": "VaricapBias",
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},
{
"netclass": "VaricapBias",
"pattern": "/VFILTER"
}
]
},
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},
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View File

@ -1,5 +1,6 @@
{
"board": {
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@ -62,20 +63,26 @@
"rule_severities": {
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"copper_edge_clearance": "error",
"copper_sliver": "warning",
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"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
@ -85,9 +92,14 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
@ -104,20 +116,68 @@
"allow_microvias": false,
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"min_clearance": 0.19999999999999998,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
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"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.19999999999999998,
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}
],
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0.0
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@ -130,7 +190,8 @@
"zones_allow_external_fillets": true,
"zones_use_no_outline": true
},
"layer_presets": []
"layer_presets": [],
"viewports": []
},
"boards": [],
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@ -346,13 +407,13 @@
"pinned_symbol_libs": []
},
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@ -366,21 +427,26 @@
"track_width": 0.25,
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"via_drill": 0.4,
"wire_width": 6.0
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}
],
"meta": {
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},
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},
"pcbnew": {
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"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""

View File

@ -55,9 +55,7 @@
"width": 0.0
}
],
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},
@ -135,9 +133,6 @@
},
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@ -146,29 +141,35 @@
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}
@ -404,7 +405,7 @@
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},
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@ -482,8 +483,11 @@
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},
"page_layout_descr_file": ""

View File

@ -135,9 +135,6 @@
},
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@ -146,29 +143,35 @@
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}
@ -478,7 +481,7 @@
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@ -530,8 +533,11 @@
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View File

@ -1,5 +1,6 @@
{
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@ -63,6 +64,7 @@
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@ -71,6 +73,7 @@
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@ -114,6 +117,7 @@
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@ -132,9 +136,6 @@
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@ -143,29 +144,35 @@
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}
@ -382,7 +389,7 @@
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@ -396,21 +403,26 @@
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},
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View File

@ -133,9 +133,6 @@
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@ -144,29 +141,35 @@
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@ -405,7 +408,7 @@
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@ -440,8 +443,11 @@
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View File

@ -137,9 +137,6 @@
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@ -148,29 +145,35 @@
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@ -430,7 +433,7 @@
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@ -465,8 +468,11 @@
"gencad": "",
"idf": "",
"netlist": "mcu_2_5.net",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "mcu_2_6.step",
"svg": "",
"vrml": "mcu_2_6.wrl"
},
"page_layout_descr_file": ""

View File

@ -127,9 +127,6 @@
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
@ -138,29 +135,35 @@
],
"teardrop_parameters": [
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"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
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"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
@ -392,7 +395,7 @@
"pinned_symbol_libs": []
},
"meta": {
"filename": "drc_test.kicad_pro",
"filename": "issue14334.kicad_pro",
"version": 1
},
"net_settings": {
@ -427,8 +430,11 @@
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""

View File

@ -127,9 +127,6 @@
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
@ -138,29 +135,35 @@
],
"teardrop_parameters": [
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"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
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{
"td_allow_use_two_tracks": true,
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"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
@ -392,7 +395,7 @@
"pinned_symbol_libs": []
},
"meta": {
"filename": "drc_test.kicad_pro",
"filename": "issue14412.kicad_pro",
"version": 1
},
"net_settings": {
@ -427,8 +430,11 @@
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""

View File

@ -140,9 +140,6 @@
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
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"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": true,
@ -151,29 +148,35 @@
],
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},
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"td_allow_use_two_tracks": true,
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"td_target_name": "td_rect_shape",
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},
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"td_allow_use_two_tracks": true,
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"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
@ -436,7 +439,7 @@
"pinned_symbol_libs": []
},
"meta": {
"filename": "W220921.01.kicad_pro",
"filename": "issue14549.kicad_pro",
"version": 1
},
"net_settings": {
@ -471,8 +474,11 @@
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "Assembly/Export STEP/W220921.01.step",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": "worksheets/A5_WiSER.kicad_wks"

View File

@ -136,9 +136,6 @@
},
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"td_allow_use_two_tracks": true,
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"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
@ -147,29 +144,35 @@
],
"teardrop_parameters": [
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},
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"td_allow_use_two_tracks": true,
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}
@ -418,7 +421,7 @@
"pinned_symbol_libs": []
},
"meta": {
"filename": "pulse.kicad_pro",
"filename": "issue14559.kicad_pro",
"version": 1
},
"net_settings": {
@ -453,8 +456,11 @@
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": "${KICAD_USER_TEMPLATE_DIR}/V2_A4_Empty.kicad_wks"

View File

@ -1,87 +1,51 @@
(kicad_pcb (version 20171130) (host pcbnew "(5.1.0-rc2-38-g4612175da2)")
(kicad_pcb (version 20230620) (generator pcbnew)
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(drawings 0)
(tracks 7)
(zones 0)
(modules 1)
(nets 15)
)
(page A4)
(paper "A4")
(layers
(0 F.Cu signal)
(1 In1.Cu signal)
(2 In2.Cu signal)
(3 In3.Cu signal)
(4 In4.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
(0 "F.Cu" signal)
(1 "In1.Cu" signal)
(2 "In2.Cu" signal)
(3 "In3.Cu" signal)
(4 "In4.Cu" signal)
(31 "B.Cu" signal)
(32 "B.Adhes" user "B.Adhesive")
(33 "F.Adhes" user "F.Adhesive")
(34 "B.Paste" user)
(35 "F.Paste" user)
(36 "B.SilkS" user "B.Silkscreen")
(37 "F.SilkS" user "F.Silkscreen")
(38 "B.Mask" user)
(39 "F.Mask" user)
(40 "Dwgs.User" user "User.Drawings")
(41 "Cmts.User" user "User.Comments")
(42 "Eco1.User" user "User.Eco1")
(43 "Eco2.User" user "User.Eco2")
(44 "Edge.Cuts" user)
(45 "Margin" user)
(46 "B.CrtYd" user "B.Courtyard")
(47 "F.CrtYd" user "F.Courtyard")
(48 "B.Fab" user)
(49 "F.Fab" user)
)
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(last_trace_width 0.127)
(user_trace_width 0.1)
(user_trace_width 0.25)
(user_trace_width 0.5)
(user_trace_width 0.75)
(user_trace_width 1)
(user_trace_width 1.2)
(user_trace_width 1.65)
(user_trace_width 2.5)
(trace_clearance 0.12)
(zone_clearance 0.22)
(zone_45_only no)
(trace_min 0.09)
(via_size 0.45)
(via_drill 0.2)
(via_min_size 0.45)
(via_min_drill 0.2)
(user_via 0.45 0.2)
(uvia_size 0.2)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.15)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 0.5 0.5)
(mod_text_width 0.125)
(pad_size 0.3 0.5)
(pad_drill 0)
(pad_to_mask_clearance 0.0508)
(solder_mask_min_width 0.25)
(aux_axis_origin 0 0)
(visible_elements FFFDFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(layerselection 0x00010fc_ffffffff)
(plot_on_all_layers_selection 0x0000000_00000000)
(disableapertmacros false)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer true)
(linewidth 0.100000)
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(dashed_line_gap_ratio 3.000000)
(svgprecision 4)
(plotframeref false)
(viasonmask false)
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@ -89,204 +53,440 @@
(hpglpennumber 1)
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(mirror false)
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(outputdirectory "."))
(outputdirectory ".")
)
)
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(net 3 /rasp_cm/HDMI_CK_P)
(net 4 /hdmi_conn/HDMI_D0_N)
(net 5 /hdmi_conn/HDMI_D0_P)
(net 6 /hdmi_conn/HDMI_D1_N)
(net 7 /hdmi_conn/HDMI_D1_P)
(net 8 /hdmi_conn/HDMI_D2_N)
(net 9 /hdmi_conn/HDMI_D2_P)
(net 10 /hdmi_conn/HDMI_CEC)
(net 11 /hdmi_conn/HDMI_SDA)
(net 12 /hdmi_conn/HDMI_SCL)
(net 13 /hdmi_conn/HDMI_HPD)
(net 14 +5V)
(net 1 "GND")
(net 2 "/rasp_cm/HDMI_CK_N")
(net 3 "/rasp_cm/HDMI_CK_P")
(net 4 "/hdmi_conn/HDMI_D0_N")
(net 5 "/hdmi_conn/HDMI_D0_P")
(net 6 "/hdmi_conn/HDMI_D1_N")
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(net 11 "/hdmi_conn/HDMI_SDA")
(net 12 "/hdmi_conn/HDMI_SCL")
(net 13 "/hdmi_conn/HDMI_HPD")
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(add_net /hdmi_conn/HDMI_D0_N)
(add_net /hdmi_conn/HDMI_D0_P)
(add_net /hdmi_conn/HDMI_D1_N)
(add_net /hdmi_conn/HDMI_D1_P)
(add_net /hdmi_conn/HDMI_D2_N)
(add_net /hdmi_conn/HDMI_D2_P)
(add_net /hdmi_conn/HDMI_HPD)
(add_net /hdmi_conn/HDMI_SCL)
(add_net /hdmi_conn/HDMI_SDA)
(add_net /rasp_cm/HDMI_CK_N)
(add_net /rasp_cm/HDMI_CK_P)
(add_net GND)
)
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(property "Datasheet" "" (at 0 0 180 unlocked) (layer "F.Fab") hide (tstamp cd6eef5f-bb79-4778-8b97-519f6c29149c)
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(pad "1" smd rect (at -2.575 0.65 180) (size 0.45 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 9 "/hdmi_conn/HDMI_D2_P")
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)
(fp_text value TestFootprint (at 0 -1.7 180) (layer F.Fab)
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(pad "2" smd rect (at -2 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
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(pad "3" smd rect (at -1.5 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
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(pad "4" smd rect (at -1 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
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(pad "5" smd rect (at -0.5 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 6 "/hdmi_conn/HDMI_D1_N")
(tstamp ac5b460c-36ef-4c85-abda-f25358bf84c2)
)
(pad "6" smd rect (at 0 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
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(tstamp b9579944-11f9-429e-9381-263860cb439f)
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(pad "7" smd rect (at 0.5 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 5 "/hdmi_conn/HDMI_D0_P")
(tstamp f9a76f8a-69cb-41e2-bf23-bf19d1dce7c0)
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(pad "8" smd rect (at 1 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
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(pad "9" smd rect (at 1.5 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 13 "/hdmi_conn/HDMI_HPD")
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(pad "10" smd rect (at 2 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 3 "/rasp_cm/HDMI_CK_P")
(tstamp 06dc5a21-59fb-4b8a-9199-4f6df459b13f)
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(pad "11" smd rect (at 2.5 0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 2 "/rasp_cm/HDMI_CK_N")
(tstamp 31c0e2bb-f940-41c7-9ff1-b23529833911)
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(pad "12" smd rect (at 2.25 -0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 1 "GND")
(tstamp 68600c33-261c-4f74-be19-b04a1a30a52b)
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(pad "13" smd rect (at 1.5 -0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 14 "+5V")
(tstamp 37bfe007-3cd0-4ac1-83d3-641328b2c784)
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(pad "14" smd rect (at 0.75 -0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 1 "GND")
(tstamp 5b65598d-1180-4296-8d9a-cf0776458d86)
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(pad "15" smd rect (at 0 -0.65 180) (size 0.3 0.5) (layers "F.Cu" "F.Paste" "F.Mask")
(net 11 "/hdmi_conn/HDMI_SDA")
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@ -189,7 +250,8 @@
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@ -373,13 +435,13 @@
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@ -393,10 +455,10 @@
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View File

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@ -62,22 +63,30 @@
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@ -105,11 +120,16 @@
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View File

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View File

@ -1,5 +1,6 @@
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@ -70,19 +71,26 @@
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@ -62,6 +63,7 @@
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@ -70,13 +72,17 @@
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@ -86,6 +92,7 @@
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File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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View File

@ -72,6 +72,7 @@
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@ -135,9 +136,6 @@
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@ -146,29 +144,35 @@
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@ -404,7 +408,7 @@
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@ -418,21 +422,26 @@
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File diff suppressed because it is too large Load Diff

View File

@ -63,6 +63,7 @@
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@ -71,13 +72,17 @@
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@ -87,6 +92,7 @@
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@ -94,6 +100,7 @@
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@ -122,8 +130,52 @@
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@ -358,7 +410,7 @@
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@ -372,10 +424,10 @@
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View File

@ -1,5 +1,6 @@
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@ -63,20 +64,26 @@
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@ -86,12 +93,15 @@
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@ -108,6 +118,7 @@
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@ -135,7 +190,8 @@
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@ -152,7 +208,7 @@
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@ -166,21 +222,26 @@
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File diff suppressed because it is too large Load Diff

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@ -1,5 +1,6 @@
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@ -55,35 +56,33 @@
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@ -93,9 +92,15 @@
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@ -111,19 +116,67 @@
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@ -197,7 +250,8 @@
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@ -381,13 +435,13 @@
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@ -401,10 +455,10 @@
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@ -413,29 +467,31 @@
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View File

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@ -62,19 +63,26 @@
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@ -84,9 +92,15 @@
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@ -102,20 +116,68 @@
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View File

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View File

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View File

@ -72,6 +72,7 @@
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File diff suppressed because it is too large Load Diff

View File

@ -137,9 +137,6 @@
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View File

@ -1,5 +1,6 @@
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"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
@ -435,7 +444,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -449,10 +458,10 @@
"track_width": 0.25,
"via_diameter": 0.85,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.25,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -461,29 +470,36 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "antenna",
"nets": [
"/ANTENNA"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 1.27,
"via_diameter": 0.85,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "antenna",
"pattern": "/ANTENNA"
}
]
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vmrl": "",
"vrml": ""
},

View File

@ -127,9 +127,6 @@
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
@ -138,29 +135,35 @@
],
"teardrop_parameters": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
@ -427,8 +430,11 @@
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""

View File

@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
@ -51,24 +52,31 @@
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"version": 1
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
@ -78,9 +86,15 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "error",
"silk_overlap": "error",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
@ -96,27 +110,77 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.0,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.0,
"solder_paste_clearance": 0.0,
"solder_paste_margin_ratio": 0.0
"solder_paste_margin_ratio": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"via_dimensions": [],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
@ -133,7 +197,7 @@
"net_settings": {
"classes": [
{
"bus_width": 6.0,
"bus_width": 6,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -147,21 +211,26 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 0
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""

View File

@ -143,22 +143,8 @@ BOOST_FIXTURE_TEST_CASE( NotchedZones, ZONE_FILL_TEST_FIXTURE )
// See:
// https://gitlab.com/kicad/code/kicad/-/issues/2737
// https://gitlab.com/kicad/code/kicad/-/issues/2752
// First, run a sanity check to validate that the saved board still has holes.
SHAPE_POLY_SET frontCopper;
for( ZONE* zone : m_board->Zones() )
{
if( zone->GetLayerSet().Contains( F_Cu ) )
{
frontCopper.BooleanAdd( *zone->GetFilledPolysList( F_Cu ),
SHAPE_POLY_SET::PM_STRICTLY_SIMPLE );
}
}
BOOST_CHECK_GT( frontCopper.OutlineCount(), 2 );
// Now re-fill and make sure the holes are gone.
KI_TEST::FillZones( m_board.get() );
frontCopper = SHAPE_POLY_SET();