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Sim QA: Add test for VDMOS

This commit is contained in:
Mikolaj Wielgus 2022-11-29 09:47:49 +01:00
parent 8143522371
commit 484620eeb5
2 changed files with 378 additions and 66 deletions
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206
qa/data/eeschema/spice_netlists/libraries/fets.lib.spice
View File

@ -161,7 +161,149 @@
+ ETA1=900.009E+07
+)
.model _12_NMOS_MOS1 nmos (level=1
.model _12_NMOS_VD VDMOS NCHAN
*type, Not really a parameter.
+ vto = 000.000E+07
*vth0, Alias.
+ kp = 100.001E+07
+ phi = 200.002E+07
+ lambda = 300.003E+07
+ theta = 400.004E+07
+ rd = 500.005E+07
+ rs = 600.006E+07
+ rg = 700.007E+07
+ tnom = 800.008E+07
+ kf = 900.009E+07
+ af = 000.000E+07
*vdmosn, Not really a parameter.
*vdmosp, Not really a parameter.
*vdmos, Not really a parameter.
+ rq = 100.001E+07
+ vq = 200.002E+07
+ mtriode = 300.003E+07
+ tcvth = 400.004E+07
*vtotc, Alias.
+ mu = 500.005E+07
*bex, Alias.
+ texp0 = 600.006E+07
+ texp1 = 700.007E+07
+ trd1 = 800.008E+07
+ trd2 = 900.009E+07
+ trg1 = 000.000E+07
+ trg2 = 100.001E+07
+ trs1 = 200.002E+07
+ trs2 = 300.003E+07
+ trb1 = 400.004E+07
+ trb2 = 500.005E+07
+ subshift = 600.006E+07
+ ksubthres = 700.007E+07
+ tksubthres1 = 800.008E+07
+ tksubthres2 = 900.009E+07
+ bv = 000.000E+07
+ ibv = 100.001E+07
+ nbv = 200.002E+07
+ rds = 300.003E+07
+ rb = 400.004E+07
+ n = 500.005E+07
+ tt = 600.006E+07
+ eg = 700.007E+07
+ xti = 800.008E+07
+ is = 900.009E+07
+ vj = 000.000E+07
+ cjo = 100.001E+07
+ m = 200.002E+07
+ fc = 300.003E+07
+ cgdmin = 400.004E+07
+ cgdmax = 500.005E+07
+ a = 600.006E+07
+ cgs = 700.007E+07
+ rthjc = 800.008E+07
+ rthca = 900.009E+07
+ cthj = 000.000E+07
+ vgs_max = 100.001E+07
+ vgd_max = 200.002E+07
+ vds_max = 300.003E+07
+ vgsr_max = 400.004E+07
+ vgdr_max = 500.005E+07
+ pd_max = 600.006E+07
+ id_max = 700.007E+07
+ idr_max = 800.008E+07
+ te_max = 900.009E+07
+ rth_ext = 000.000E+07
+ derating = 100.001E+07
.model _13_PMOS_VD VDMOS PCHAN
*type, Not really a parameter.
+ vto = 000.000E+07
*vth0, Alias.
+ kp = 100.001E+07
+ phi = 200.002E+07
+ lambda = 300.003E+07
+ theta = 400.004E+07
+ rd = 500.005E+07
+ rs = 600.006E+07
+ rg = 700.007E+07
+ tnom = 800.008E+07
+ kf = 900.009E+07
+ af = 000.000E+07
*vdmosn, Not really a parameter.
*vdmosp, Not really a parameter.
*vdmos, Not really a parameter.
+ rq = 100.001E+07
+ vq = 200.002E+07
+ mtriode = 300.003E+07
+ tcvth = 400.004E+07
*vtotc, Alias.
+ mu = 500.005E+07
*bex, Alias.
+ texp0 = 600.006E+07
+ texp1 = 700.007E+07
+ trd1 = 800.008E+07
+ trd2 = 900.009E+07
+ trg1 = 000.000E+07
+ trg2 = 100.001E+07
+ trs1 = 200.002E+07
+ trs2 = 300.003E+07
+ trb1 = 400.004E+07
+ trb2 = 500.005E+07
+ subshift = 600.006E+07
+ ksubthres = 700.007E+07
+ tksubthres1 = 800.008E+07
+ tksubthres2 = 900.009E+07
+ bv = 000.000E+07
+ ibv = 100.001E+07
+ nbv = 200.002E+07
+ rds = 300.003E+07
+ rb = 400.004E+07
+ n = 500.005E+07
+ tt = 600.006E+07
+ eg = 700.007E+07
+ xti = 800.008E+07
+ is = 900.009E+07
+ vj = 000.000E+07
+ cjo = 100.001E+07
+ m = 200.002E+07
+ fc = 300.003E+07
+ cgdmin = 400.004E+07
+ cgdmax = 500.005E+07
+ a = 600.006E+07
+ cgs = 700.007E+07
+ rthjc = 800.008E+07
+ rthca = 900.009E+07
+ cthj = 000.000E+07
+ vgs_max = 100.001E+07
+ vgd_max = 200.002E+07
+ vds_max = 300.003E+07
+ vgsr_max = 400.004E+07
+ vgdr_max = 500.005E+07
+ pd_max = 600.006E+07
+ id_max = 700.007E+07
+ idr_max = 800.008E+07
+ te_max = 900.009E+07
+ rth_ext = 000.000E+07
+ derating = 100.001E+07
.model _14_NMOS_MOS1 nmos (level=1
+ VTO=000.000E+07
+ KP=100.001E+07
+ GAMMA=200.002E+07
@ -174,7 +316,7 @@
+ IS=900.009E+07
+)
.model _13_PMOS_MOS1 pmos (level=1
.model _15_PMOS_MOS1 pmos (level=1
+ VTO=000.000E+07
+ KP=100.001E+07
+ GAMMA=200.002E+07
@ -187,7 +329,7 @@
+ IS=900.009E+07
+)
.model _14_NMOS_MOS2 nmos (level=2
.model _16_NMOS_MOS2 nmos (level=2
+ VTO=000.000E+07
+ KP=100.001E+07
+ GAMMA=200.002E+07
@ -200,7 +342,7 @@
+ IS=900.009E+07
+)
.model _15_PMOS_MOS2 pmos (level=2
.model _17_PMOS_MOS2 pmos (level=2
+ VTO=000.000E+07
+ KP=100.001E+07 ; Does not exist in MOS3 and MOS6
+ GAMMA=200.002E+07
@ -213,7 +355,7 @@
+ IS=900.009E+07
+)
.model _16_NMOS_MOS3 nmos (level=3
.model _18_NMOS_MOS3 nmos (level=3
+ VTO=000.000E+07
+ THETA=100.001E+07 ; MOS3 and MOS9-only
+ GAMMA=200.002E+07
@ -226,7 +368,7 @@
+ IS=900.009E+07
+)
.model _17_PMOS_MOS3 pmos (level=3
.model _19_PMOS_MOS3 pmos (level=3
+ VTO=000.000E+07
+ THETA=100.001E+07 ; MOS3 and MOS9-only
+ GAMMA=200.002E+07
@ -239,7 +381,7 @@
+ IS=900.009E+07
+)
.model _18_NMOS_BSIM1 nmos (level=4
.model _20_NMOS_BSIM1 nmos (level=4
+ VFB=000.000E+07
+ LVFB=100.001E+07
+ WVFB=200.002E+07
@ -252,7 +394,7 @@
+ K2=900.009E+07
+)
.model _19_PMOS_BSIM1 pmos (level=4
.model _21_PMOS_BSIM1 pmos (level=4
+ VFB=000.000E+07
+ LVFB=100.001E+07
+ WVFB=200.002E+07
@ -265,7 +407,7 @@
+ K2=900.009E+07
+)
.model _20_NMOS_BSIM2 nmos (level=5
.model _22_NMOS_BSIM2 nmos (level=5
+ BIB=000.000E+07
+ LBIB=100.001E+07
+ WBIB=200.002E+07
@ -278,7 +420,7 @@
+ WBI0=900.009E+07
+)
.model _21_PMOS_BSIM2 pmos (level=5
.model _23_PMOS_BSIM2 pmos (level=5
+ BIB=000.000E+07
+ LBIB=100.001E+07
+ WBIB=200.002E+07
@ -291,7 +433,7 @@
+ WBI0=900.009E+07
+)
.model _22_NMOS_MOS6 nmos (level=6
.model _24_NMOS_MOS6 nmos (level=6
+ VTO=000.000E+07
+ NVTH=100.001E+07 ; MOS6-only
+ GAMMA=200.002E+07
@ -304,7 +446,7 @@
+ IS=900.009E+07
+)
.model _23_PMOS_MOS6 pmos (level=6
.model _25_PMOS_MOS6 pmos (level=6
+ VTO=000.000E+07
+ NVTH=100.001E+07 ; MOS6-only
+ GAMMA=200.002E+07
@ -317,7 +459,7 @@
+ IS=900.009E+07
+)
.model _24_NMOS_BSIM3 nmos (level=8
.model _26_NMOS_BSIM3 nmos (level=8
+ TOX=000.000E+07
+ TOXM=100.001E+07
+ CDSC=200.002E+07
@ -330,7 +472,7 @@
+ AT=900.009E+07
+)
.model _25_PMOS_BSIM3 pmos (level=8
.model _27_PMOS_BSIM3 pmos (level=8
+ TOX=000.000E+07
+ TOXM=100.001E+07
+ CDSC=200.002E+07
@ -343,7 +485,7 @@
+ AT=900.009E+07
+)
.model _26_NMOS_MOS9 nmos (level=9
.model _28_NMOS_MOS9 nmos (level=9
+ VTO=000.000E+07
+ THETA=100.001E+07 ; MOS3 and MOS9-only
+ GAMMA=200.002E+07
@ -356,7 +498,7 @@
+ IS=900.009E+07
+)
.model _27_PMOS_MOS9 pmos (level=9
.model _29_PMOS_MOS9 pmos (level=9
+ VTO=000.000E+07
+ THETA=100.001E+07 ; MOS3 and MOS9-only
+ GAMMA=200.002E+07
@ -369,7 +511,7 @@
+ IS=900.009E+07
+)
.model _28_NMOS_B4SOI nmos (level=10
.model _30_NMOS_B4SOI nmos (level=10
+ TOX=000.000E+07
+ TOXP=100.001E+07
+ TOXM=200.002E+07
@ -382,7 +524,7 @@
+ VSAT=900.009E+07
+)
.model _29_PMOS_B4SOI pmos (level=10
.model _31_PMOS_B4SOI pmos (level=10
+ TOX=000.000E+07
+ TOXP=100.001E+07
+ TOXM=200.002E+07
@ -395,7 +537,7 @@
+ VSAT=900.009E+07
+)
.model _30_NMOS_BSIM4 nmos (level=14
.model _32_NMOS_BSIM4 nmos (level=14
+ RBPS0=000.000E+07
+ RBPSL=100.001E+07
+ RBPSW=200.002E+07
@ -408,7 +550,7 @@
+ RBPBXL=900.009E+07
+)
.model _31_PMOS_BSIM4 pmos (level=14
.model _33_PMOS_BSIM4 pmos (level=14
+ RBPS0=000.000E+07
+ RBPSL=100.001E+07
+ RBPSW=200.002E+07
@ -421,7 +563,7 @@
+ RBPBXL=900.009E+07
+)
.model _32_NMOS_B3SOIFD nmos (level=55
.model _34_NMOS_B3SOIFD nmos (level=55
+ TOX=000.000E+07
+ CDSC=100.001E+07
+ CDSCB=200.002E+07
@ -434,7 +576,7 @@
+ AGS=900.009E+07
+)
.model _33_PMOS_B3SOIFD pmos (level=55
.model _35_PMOS_B3SOIFD pmos (level=55
+ TOX=000.000E+07
+ CDSC=100.001E+07
+ CDSCB=200.002E+07
@ -447,7 +589,7 @@
+ AGS=900.009E+07
+)
.model _34_NMOS_B3SOIDD nmos (level=56
.model _36_NMOS_B3SOIDD nmos (level=56
+ TOX=000.000E+07
+ CDSC=100.001E+07
+ CDSCB=200.002E+07
@ -460,7 +602,7 @@
+ AGS=900.009E+07
+)
.model _35_PMOS_B3SOIDD pmos (level=56
.model _37_PMOS_B3SOIDD pmos (level=56
+ TOX=000.000E+07
+ CDSC=100.001E+07
+ CDSCB=200.002E+07
@ -473,7 +615,7 @@
+ AGS=900.009E+07
+)
.model _36_NMOS_B3SOIPD nmos (level=57
.model _38_NMOS_B3SOIPD nmos (level=57
+ TOX=000.000E+07
+ CDSC=100.001E+07
+ CDSCB=200.002E+07
@ -486,7 +628,7 @@
+ AGS=900.009E+07
+)
.model _37_PMOS_B3SOIPD pmos (level=57
.model _39_PMOS_B3SOIPD pmos (level=57
+ TOX=000.000E+07
+ CDSC=100.001E+07
+ CDSCB=200.002E+07
@ -499,7 +641,7 @@
+ AGS=900.009E+07
+)
.model _38_NMOS_HISIM2 nmos (level=68
.model _40_NMOS_HISIM2 nmos (level=68
+ DEPMUE0=000.000E+07
+ DEPMUE0L=100.001E+07
+ DEPMUE0LP=200.002E+07
@ -512,7 +654,7 @@
+ DEPMUEBACK1=900.009E+07
+)
.model _39_PMOS_HISIM2 pmos (level=68
.model _41_PMOS_HISIM2 pmos (level=68
+ DEPMUE0=000.000E+07
+ DEPMUE0L=100.001E+07
+ DEPMUE0LP=200.002E+07
@ -525,7 +667,7 @@
+ DEPMUEBACK1=900.009E+07
+)
.model _40_NMOS_HISIMHV1 nmos (level=73 version=1.2.4
.model _42_NMOS_HISIMHV1 nmos (level=73 version=1.2.4
+ PRD=000.000E+07
+ PRD22=100.001E+07
+ PRD23=200.002E+07
@ -538,7 +680,7 @@
+ PRDVG11=900.009E+07
+)
.model _41_PMOS_HISIMHV1 pmos (level=73 version=1.2.4
.model _43_PMOS_HISIMHV1 pmos (level=73 version=1.2.4
+ PRD=000.000E+07
+ PRD22=100.001E+07
+ PRD23=200.002E+07
@ -551,7 +693,7 @@
+ PRDVG11=900.009E+07
+)
.model _42_NMOS_HISIMHV2 nmos (level=73 version=2.2.0
.model _44_NMOS_HISIMHV2 nmos (level=73 version=2.2.0
+ PJS0D=000.000E+07
+ PJS0SWD=100.001E+07
+ PNJD=200.002E+07
@ -564,7 +706,7 @@
+ PVOVER=900.009E+07
+)
.model _43_PMOS_HISIMHV2 pmos (level=73 version=2.2.0
.model _45_PMOS_HISIMHV2 pmos (level=73 version=2.2.0
+ PJS0D=000.000E+07
+ PJS0SWD=100.001E+07
+ PNJD=200.002E+07

238
qa/unittests/eeschema/sim/test_library_spice.cpp
View File

@ -94,11 +94,29 @@ public:
<< ", Model type: " << aModel.GetTypeInfo().fieldValue )
{
BOOST_CHECK( aModel.GetType() == aType );
std::string modelType = aModel.GetSpiceInfo().modelType;
std::string fieldValue = aModel.GetTypeInfo().fieldValue;
// Special case for VDMOS because Ngspice parses it differently.
if( modelType == "VDMOS NCHAN" )
{
modelType = "NMOS";
fieldValue = "VD"; // Not "VDMOS" because Ngspice gives an error if this string is
// used in a model name (this is a bug in Ngspice, FIXME).
}
if( modelType == "VDMOS PCHAN" )
{
modelType = "PMOS";
fieldValue = "VD";
}
BOOST_CHECK_EQUAL( aModelName,
fmt::format( "_{}_{}_{}",
aModelIndex,
boost::to_upper_copy( aModel.GetSpiceInfo().modelType ),
aModel.GetTypeInfo().fieldValue ) );
modelType,
fieldValue ) );
for( int i = 0; i < aParamNames.size(); ++i )
{
@ -1098,12 +1116,14 @@ BOOST_AUTO_TEST_CASE( Fets )
const std::vector<SIM_LIBRARY::MODEL> models = m_library->GetModels();
BOOST_CHECK_EQUAL( models.size(), 44 );
BOOST_CHECK_EQUAL( models.size(), 46 );
for( int i = 0; i < models.size(); ++i )
{
const auto& [modelName, model] = models.at( i );
// TODO: Actually test ALL model parameters.
switch( i )
{
case 0:
@ -1179,193 +1199,343 @@ BOOST_AUTO_TEST_CASE( Fets )
break;
case 12:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_VDMOS,
{
//"type",
"vto",
//"vth0",
"kp",
"phi",
"lambda",
"theta",
"rd",
"rs",
"rg",
"tnom",
"kf",
"af",
//"vdmosn",
//"vdmosp",
//"vdmos",
"rq",
"vq",
"mtriode",
"tcvth",
//"vtotc",
"mu",
//"bex",
"texp0",
"texp1",
"trd1",
"trd2",
"trg1",
"trg2",
"trs1",
"trs2",
"trb1",
"trb2",
"subshift",
"ksubthres",
"tksubthres1",
"tksubthres2",
"bv",
"ibv",
"nbv",
"rds",
"rb",
"n",
"tt",
"eg",
"xti",
"is",
"vj",
"cjo",
"m",
"fc",
"cgdmin",
"cgdmax",
"a",
"cgs",
"rthjc",
"rthca",
"cthj",
"vgs_max",
"vgd_max",
"vds_max",
"vgsr_max",
"vgdr_max",
"pd_max",
"id_max",
"idr_max",
"te_max",
"rth_ext",
"derating"
} );
break;
case 13:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_VDMOS,
{
//"type",
"vto",
//"vth0",
"kp",
"phi",
"lambda",
"theta",
"rd",
"rs",
"rg",
"tnom",
"kf",
"af",
//"vdmosn",
//"vdmosp",
//"vdmos",
"rq",
"vq",
"mtriode",
"tcvth",
//"vtotc",
"mu",
//"bex",
"texp0",
"texp1",
"trd1",
"trd2",
"trg1",
"trg2",
"trs1",
"trs2",
"trb1",
"trb2",
"subshift",
"ksubthres",
"tksubthres1",
"tksubthres2",
"bv",
"ibv",
"nbv",
"rds",
"rb",
"n",
"tt",
"eg",
"xti",
"is",
"vj",
"cjo",
"m",
"fc",
"cgdmin",
"cgdmax",
"a",
"cgs",
"rthjc",
"rthca",
"cthj",
"vgs_max",
"vgd_max",
"vds_max",
"vgsr_max",
"vgdr_max",
"pd_max",
"id_max",
"idr_max",
"te_max",
"rth_ext",
"derating"
} );
break;
case 14:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_MOS1,
{ "vto", "kp", "gamma", "phi", "lambda", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 13:
case 15:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_MOS1,
{ "vto", "kp", "gamma", "phi", "lambda", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 14:
case 16:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_MOS2,
{ "vto", "kp", "gamma", "phi", "lambda", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 15:
case 17:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_MOS2,
{ "vto", "kp", "gamma", "phi", "lambda", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 16:
case 18:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_MOS3,
{ "vto", "theta", "gamma", "phi", "eta", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 17:
case 19:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_MOS3,
{ "vto", "theta", "gamma", "phi", "eta", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 18:
case 20:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_BSIM1,
{ "vfb", "lvfb", "wvfb", "phi", "lphi", "wphi", "k1", "lk1", "wk1",
"k2" } );
break;
case 19:
case 21:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_BSIM1,
{ "vfb", "lvfb", "wvfb", "phi", "lphi", "wphi", "k1", "lk1", "wk1",
"k2" } );
break;
case 20:
case 22:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_BSIM2,
{ "bib", "lbib", "wbib", "vghigh", "lvghigh", "wvghigh",
"waib", "bi0", "lbi0", "wbi0" } );
break;
case 21:
case 23:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_BSIM2,
{ "bib", "lbib", "wbib", "vghigh", "lvghigh", "wvghigh",
"waib", "bi0", "lbi0", "wbi0" } );
break;
case 22:
case 24:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_MOS6,
{ "vto", "nvth", "gamma", "phi", "lambda", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 23:
case 25:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_MOS6,
{ "vto", "nvth", "gamma", "phi", "lambda", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 24:
case 26:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_BSIM3,
{ "tox", "toxm", "cdsc", "cdscb", "cdscd", "cit", "nfactor", "xj",
"vsat", "at" } );
break;
case 25:
case 27:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_BSIM3,
{ "tox", "toxm", "cdsc", "cdscb", "cdscd", "cit", "nfactor", "xj",
"vsat", "at" } );
break;
case 26:
case 28:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_MOS9,
{ "vto", "theta", "gamma", "phi", "eta", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 27:
case 29:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_MOS9,
{ "vto", "theta", "gamma", "phi", "eta", "rd", "rs", "cbd", "cbs",
"is" } );
break;
case 28:
case 30:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_B4SOI,
{ "tox", "toxp", "toxm", "dtoxcv", "cdsc", "cdscb", "cdscd", "cit",
"nfactor", "vsat" } );
break;
case 29:
case 31:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_B4SOI,
{ "tox", "toxp", "toxm", "dtoxcv", "cdsc", "cdscb", "cdscd", "cit",
"nfactor", "vsat" } );
break;
case 30:
case 32:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_BSIM4,
{ "rbps0", "rbpsl", "rbpsw", "rbpsnf", "rbpd0", "rbpdl", "rbpdw", "rbpdnf",
"rbpbx0", "rbpbxl" } );
break;
case 31:
case 33:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_BSIM4,
{ "rbps0", "rbpsl", "rbpsw", "rbpsnf", "rbpd0", "rbpdl", "rbpdw", "rbpdnf",
"rbpbx0", "rbpbxl" } );
break;
case 32:
case 34:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_B3SOIFD,
{ "tox", "cdsc", "cdscb", "cdscd", "cit", "nfactor", "vsat", "at", "a0",
"ags" } );
break;
case 33:
case 35:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_B3SOIFD,
{ "tox", "cdsc", "cdscb", "cdscd", "cit", "nfactor", "vsat", "at", "a0",
"ags" } );
break;
case 34:
case 36:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_B3SOIDD,
{ "tox", "cdsc", "cdscb", "cdscd", "cit", "nfactor", "vsat", "at", "a0",
"ags" } );
break;
case 35:
case 37:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_B3SOIDD,
{ "tox", "cdsc", "cdscb", "cdscd", "cit", "nfactor", "vsat", "at", "a0",
"ags" } );
break;
case 36:
case 38:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_B3SOIPD,
{ "tox", "cdsc", "cdscb", "cdscd", "cit", "nfactor", "vsat", "at", "a0",
"ags" } );
break;
case 37:
case 39:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_B3SOIPD,
{ "tox", "cdsc", "cdscb", "cdscd", "cit", "nfactor", "vsat", "at", "a0",
"ags" } );
break;
case 38:
case 40:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_HISIM2,
{ "depmue0", "depmue0l", "depmue0lp", "depmue1", "depmue1l",
"depmue1lp", "depmueback0", "depmueback0l", "depmueback0lp",
"depmueback1" } );
break;
case 39:
case 41:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_HISIM2,
{ "depmue0", "depmue0l", "depmue0lp", "depmue1", "depmue1l", "depmue1lp",
"depmueback0", "depmueback0l", "depmueback0lp", "depmueback1" } );
break;
case 40:
case 42:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_HISIMHV1,
{ "prd", "prd22", "prd23", "prd24", "prdict1", "prdov13", "prdslp1",
"prdvb", "prdvd", "prdvg11" } );
break;
case 41:
case 43:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_HISIMHV1,
{ "prd", "prd22", "prd23", "prd24", "prdict1", "prdov13", "prdslp1",
"prdvb", "prdvd", "prdvg11" } );
break;
case 42:
case 44:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::NMOS_HISIMHV2,
{ "pjs0d", "pjs0swd", "pnjd", "pcisbkd", "pvdiffjd", "pjs0s", "pjs0sws",
"prs", "prth0", "pvover" } );
break;
case 43:
case 45:
TestTransistor( model, modelName, i, SIM_MODEL::TYPE::PMOS_HISIMHV2,
{ "pjs0d", "pjs0swd", "pnjd", "pcisbkd", "pvdiffjd", "pjs0s", "pjs0sws",
"prs", "prth0", "pvover" } );