sim: more examples

This commit is contained in:
Tomasz Wlostowski 2016-08-11 14:42:12 +02:00 committed by Maciej Suminski
parent b20f941bd0
commit 4ecc17385d
6 changed files with 749 additions and 0 deletions

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* Node assignments
* non-inverting input
* | inverting input
* | | positive supply
* | | | negative supply
* | | | | output
* | | | | |
.SUBCKT AD8009 1 2 99 50 28
* input stage *
q1 50 3 5 qp1
q2 99 5 4 qn1
q3 99 3 6 qn2
q4 50 6 4 qp2
i1 99 5 1.625e-3
i2 6 50 1.625e-3
cin1 1 98 2.6e-12
cin2 2 98 1e-12
v1 4 2 0
* input error sources *
eos 3 1 poly(1) 20 98 2e-3 1
fbn 2 98 poly(1) vnoise3 50e-6 1e-3
fbp 1 98 poly(1) vnoise3 50e-6 1e-3
* slew limiting stage *
fsl 98 16 v1 1
dsl1 98 16 d1
dsl2 16 98 d1
dsl3 16 17 d1
dsl4 17 16 d1
rsl 17 18 0.22
vsl 18 98 0
* gain stage *
f1 98 7 vsl 2
rgain 7 98 2.5e5
cgain 7 98 1.25e-12
dcl1 7 8 d1
dcl2 9 7 d1
vcl1 99 8 1.83
vcl2 9 50 1.83
gcm 98 7 poly(2) 98 0 30 0 0 1e-5 1e-5
* second pole *
epole 14 98 7 98 1
rpole 14 15 1
cpole 15 98 2e-10
* reference stage *
eref 98 0 poly(2) 99 0 50 0 0 0.5 0.5
ecmref 30 0 poly(2) 1 0 2 0 0 0.5 0.5
* vnoise stage *
rnoise1 19 98 4.6e-3
vnoise1 19 98 0
vnoise2 21 98 0.53
dnoise1 21 19 dn
fnoise1 20 98 vnoise1 1
rnoise2 20 98 1
* inoise stage *
rnoise3 22 98 8.18e-6
vnoise3 22 98 0
vnoise4 24 98 0.575
dnoise2 24 22 dn
fnoise2 23 98 vnoise3 1
rnoise4 23 98 1
* buffer stage *
gbuf 98 13 15 98 1e-2
rbuf 98 13 1e2
* output current reflected to supplies *
fcurr 98 40 voc 1
vcur1 26 98 0
vcur2 98 27 0
dcur1 40 26 d1
dcur2 27 40 d1
* output stage *
vo1 99 90 0
vo2 91 50 0
fout1 0 99 poly(2) vo1 vcur1 -9.27e-3 1 -1
fout2 50 0 poly(2) vo2 vcur2 -9.27e-3 1 -1
gout1 90 10 13 99 0.5
gout2 91 10 13 50 0.5
rout1 10 90 2
rout2 10 91 2
voc 10 28 0
rout3 28 98 1e6
dcl3 13 11 d1
dcl4 12 13 d1
vcl3 11 10 -0.445
vcl4 10 12 -0.445
.model qp1 pnp()
.model qp2 pnp()
.model qn1 npn()
.model qn2 npn()
.model d1 d()
.model dn d(af=1 kf=1e-8)
.ends

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.model FZT1049A NPN IS=1.5E-12 NF=1.0 BF=600 IKF=7.5 VAF=100 ISE=0.9E-13 NE=1.25 NR=1.0 BR=150 IKR=3 VAR=15 ISC=5.0E-13 NC=1.76 RB=0.1 RE=0.018 RC=0.007 CJC=136E-12 CJE=550E-12 MJC=0.352 MJE=0.36 VJC=0.554 VJE=0.726 TF=400E-12 TR=6.9E-9

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.model LASER D(Is=1e-22 Rs=6 N=1.5 Cjo=50p Xti=100 Iave=160m Vpk=5)

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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
Capacitors_ThroughHole:C_Radial_D10_L13_P5
Capacitors_SMD:C_0805
Capacitors_SMD:C_1206
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Generic_Opamp
#
DEF Generic_Opamp U 0 20 Y Y 1 F N
F0 "U" 0 250 50 H V L CNN
F1 "Generic_Opamp" 0 150 50 H V L CNN
F2 "" -100 -100 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X - 2 -300 -100 100 R 50 50 1 1 I
X V+ 3 -100 300 150 D 50 50 1 1 W
X V- 4 -100 -300 150 U 50 50 1 1 W
X ~ 5 300 0 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# LED
#
DEF LED D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "LED" 0 -100 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
LED-*
LED_*
$ENDFPLIST
DRAW
P 2 0 1 0 -50 50 -50 -50 N
P 3 0 1 0 -80 -25 -125 -65 -120 -40 N
P 3 0 1 0 -65 -40 -110 -80 -105 -55 N
P 3 0 1 0 50 50 -50 0 50 -50 F
X K 1 -200 0 150 R 40 40 1 1 P
X A 2 200 0 150 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# Q_NPN_CBE
#
DEF Q_NPN_CBE Q 0 0 Y N 1 F N
F0 "Q" 300 50 50 H V R CNN
F1 "Q_NPN_CBE" 600 -50 50 H V R CNN
F2 "" 200 100 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
X C 1 100 200 100 D 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 I
X E 3 100 -200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 50 V V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# VDD
#
DEF VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VDD" 0 150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# VSS
#
DEF VSS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VSS" 0 150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VSS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

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update=wto, 19 lip 2016, 23:56:07
version=1
last_client=eeschema
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=../../../../kicad-library/library
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves

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EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:laser_driver-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L VSOURCE V1
U 1 1 57336052
P 2650 3550
F 0 "V1" H 2778 3596 50 0000 L CNN
F 1 "AC 1" H 2778 3505 50 0000 L CNN
F 2 "" H 2650 3550 50 0000 C CNN
F 3 "" H 2650 3550 50 0000 C CNN
F 4 "Value" H 2650 3550 60 0001 C CNN "Fieldname"
F 5 "V" H 2650 3550 60 0001 C CNN "Spice_Primitive"
F 6 "pulse(0 3 100n 1n 1n 20n 100n )" H 2650 3550 60 0001 C CNN "Spice_Model"
F 7 "Y" H 2650 3550 60 0001 C CNN "Spice_Netlist_Enabled"
1 2650 3550
1 0 0 -1
$EndComp
Text Notes 3150 5400 0 60 ~ 0
.tran 10p 150n\n
$Comp
L Generic_Opamp U1
U 1 1 5788FF9F
P 5050 3500
F 0 "U1" H 5391 3546 50 0000 L CNN
F 1 "AD8009" H 5391 3455 50 0000 L CNN
F 2 "" H 4950 3400 50 0000 C CNN
F 3 "" H 5050 3500 50 0000 C CNN
F 4 "Value" H 5050 3500 60 0001 C CNN "Fieldname"
F 5 "X" H 5050 3500 60 0001 C CNN "Spice_Primitive"
F 6 "ad8009" H 5050 3500 60 0001 C CNN "Spice_Model"
F 7 "Y" H 5050 3500 60 0001 C CNN "Spice_Netlist_Enabled"
F 8 "ad8009.lib" H 5050 3500 60 0001 C CNN "Spice_Lib_File"
1 5050 3500
1 0 0 -1
$EndComp
$Comp
L VSOURCE V2
U 1 1 578900BA
P 9650 1900
F 0 "V2" H 9778 1946 50 0000 L CNN
F 1 "DC 10" H 9778 1855 50 0000 L CNN
F 2 "" H 9650 1900 50 0000 C CNN
F 3 "" H 9650 1900 50 0000 C CNN
F 4 "Value" H 9650 1900 60 0001 C CNN "Fieldname"
F 5 "V" H 9650 1900 60 0001 C CNN "Spice_Primitive"
F 6 "1 2" H 9350 2100 60 0001 C CNN "Spice_Node_Sequence"
1 9650 1900
1 0 0 -1
$EndComp
$Comp
L VSOURCE V3
U 1 1 57890232
P 9650 2300
F 0 "V3" H 9778 2346 50 0000 L CNN
F 1 "DC 10" H 9778 2255 50 0000 L CNN
F 2 "" H 9650 2300 50 0000 C CNN
F 3 "" H 9650 2300 50 0000 C CNN
F 4 "Value" H 9650 2300 60 0001 C CNN "Fieldname"
F 5 "V" H 9650 2300 60 0001 C CNN "Spice_Primitive"
F 6 "1 2" H 9350 2500 60 0001 C CNN "Spice_Node_Sequence"
1 9650 2300
1 0 0 -1
$EndComp
$Comp
L GND #PWR7
U 1 1 578902D2
P 9400 2100
F 0 "#PWR7" H 9400 1850 50 0001 C CNN
F 1 "GND" H 9405 1927 50 0000 C CNN
F 2 "" H 9400 2100 50 0000 C CNN
F 3 "" H 9400 2100 50 0000 C CNN
1 9400 2100
1 0 0 -1
$EndComp
$Comp
L VDD #PWR8
U 1 1 578903C0
P 9650 1700
F 0 "#PWR8" H 9650 1550 50 0001 C CNN
F 1 "VDD" H 9667 1873 50 0000 C CNN
F 2 "" H 9650 1700 50 0000 C CNN
F 3 "" H 9650 1700 50 0000 C CNN
1 9650 1700
1 0 0 -1
$EndComp
$Comp
L VSS #PWR9
U 1 1 578903E2
P 9650 2500
F 0 "#PWR9" H 9650 2350 50 0001 C CNN
F 1 "VSS" H 9668 2673 50 0000 C CNN
F 2 "" H 9650 2500 50 0000 C CNN
F 3 "" H 9650 2500 50 0000 C CNN
1 9650 2500
-1 0 0 1
$EndComp
$Comp
L VDD #PWR3
U 1 1 57890425
P 4950 3200
F 0 "#PWR3" H 4950 3050 50 0001 C CNN
F 1 "VDD" H 4967 3373 50 0000 C CNN
F 2 "" H 4950 3200 50 0000 C CNN
F 3 "" H 4950 3200 50 0000 C CNN
1 4950 3200
1 0 0 -1
$EndComp
$Comp
L VSS #PWR4
U 1 1 57890453
P 4950 3800
F 0 "#PWR4" H 4950 3650 50 0001 C CNN
F 1 "VSS" H 4968 3973 50 0000 C CNN
F 2 "" H 4950 3800 50 0000 C CNN
F 3 "" H 4950 3800 50 0000 C CNN
1 4950 3800
-1 0 0 1
$EndComp
$Comp
L C C2
U 1 1 5789085B
P 6800 4000
F 0 "C2" H 6915 4046 50 0000 L CNN
F 1 "1p" H 6915 3955 50 0000 L CNN
F 2 "" H 6838 3850 50 0000 C CNN
F 3 "" H 6800 4000 50 0000 C CNN
F 4 "Value" H 6800 4000 60 0001 C CNN "Fieldname"
F 5 "C" H 6800 4000 60 0001 C CNN "Spice_Primitive"
F 6 "1 2" H 6800 4000 60 0001 C CNN "SpiceMapping"
1 6800 4000
-1 0 0 1
$EndComp
$Comp
L R R5
U 1 1 578EA6D8
P 6400 4000
F 0 "R5" V 6193 4000 50 0000 C CNN
F 1 "2,5" V 6284 4000 50 0000 C CNN
F 2 "" V 6330 4000 50 0000 C CNN
F 3 "" H 6400 4000 50 0000 C CNN
F 4 "Value" H 6400 4000 60 0001 C CNN "Fieldname"
F 5 "1 2" H 6400 4000 60 0001 C CNN "SpiceMapping"
F 6 "R" V 6400 4000 60 0001 C CNN "Spice_Primitive"
1 6400 4000
-1 0 0 1
$EndComp
$Comp
L R R1
U 1 1 578EA7EE
P 4150 3600
F 0 "R1" V 3943 3600 50 0000 C CNN
F 1 "220" V 4034 3600 50 0000 C CNN
F 2 "" V 4080 3600 50 0000 C CNN
F 3 "" H 4150 3600 50 0000 C CNN
F 4 "Value" H 4150 3600 60 0001 C CNN "Fieldname"
F 5 "1 2" H 4150 3600 60 0001 C CNN "SpiceMapping"
F 6 "R" V 4150 3600 60 0001 C CNN "Spice_Primitive"
1 4150 3600
0 1 1 0
$EndComp
$Comp
L R R3
U 1 1 578EA8B4
P 5400 4150
F 0 "R3" V 5193 4150 50 0000 C CNN
F 1 "220" V 5284 4150 50 0000 C CNN
F 2 "" V 5330 4150 50 0000 C CNN
F 3 "" H 5400 4150 50 0000 C CNN
F 4 "Value" H 5400 4150 60 0001 C CNN "Fieldname"
F 5 "1 2" H 5400 4150 60 0001 C CNN "SpiceMapping"
F 6 "R" V 5400 4150 60 0001 C CNN "Spice_Primitive"
1 5400 4150
0 1 1 0
$EndComp
$Comp
L C C1
U 1 1 578EB076
P 5400 4400
F 0 "C1" H 5515 4446 50 0000 L CNN
F 1 "1p" H 5515 4355 50 0000 L CNN
F 2 "" H 5438 4250 50 0000 C CNN
F 3 "" H 5400 4400 50 0000 C CNN
F 4 "Value" H 5400 4400 60 0001 C CNN "Fieldname"
F 5 "C" H 5400 4400 60 0001 C CNN "Spice_Primitive"
F 6 "1 2" H 5400 4400 60 0001 C CNN "SpiceMapping"
1 5400 4400
0 -1 -1 0
$EndComp
$Comp
L LED D1
U 1 1 578EB1E8
P 6400 4900
F 0 "D1" V 6446 4792 50 0000 R CNN
F 1 "laser diode" V 6355 4792 50 0000 R CNN
F 2 "" H 6400 4900 50 0000 C CNN
F 3 "" H 6400 4900 50 0000 C CNN
F 4 "qtlp690c" H 6400 4900 60 0001 C CNN "Fieldname"
F 5 "D" H 6400 4900 60 0001 C CNN "Spice_Primitive"
F 6 "laser" H 6400 4900 60 0001 C CNN "Spice_Model"
F 7 "Y" H 6400 4900 60 0001 C CNN "Spice_Netlist_Enabled"
F 8 "laser.lib" H 6400 4900 60 0001 C CNN "Spice_Lib_File"
F 9 "2 1" V 6400 4900 60 0001 C CNN "Spice_Node_Sequence"
1 6400 4900
0 -1 -1 0
$EndComp
$Comp
L GND #PWR6
U 1 1 578EB42D
P 6400 5100
F 0 "#PWR6" H 6400 4850 50 0001 C CNN
F 1 "GND" H 6405 4927 50 0000 C CNN
F 2 "" H 6400 5100 50 0000 C CNN
F 3 "" H 6400 5100 50 0000 C CNN
1 6400 5100
1 0 0 -1
$EndComp
$Comp
L R R4
U 1 1 578EBA35
P 6150 2900
F 0 "R4" V 5943 2900 50 0000 C CNN
F 1 "220" V 6034 2900 50 0000 C CNN
F 2 "" V 6080 2900 50 0000 C CNN
F 3 "" H 6150 2900 50 0000 C CNN
F 4 "Value" H 6150 2900 60 0001 C CNN "Fieldname"
F 5 "1 2" H 6150 2900 60 0001 C CNN "SpiceMapping"
F 6 "R" V 6150 2900 60 0001 C CNN "Spice_Primitive"
1 6150 2900
0 1 1 0
$EndComp
$Comp
L R R2
U 1 1 578EBB39
P 4350 2900
F 0 "R2" V 4143 2900 50 0000 C CNN
F 1 "160" V 4234 2900 50 0000 C CNN
F 2 "" V 4280 2900 50 0000 C CNN
F 3 "" H 4350 2900 50 0000 C CNN
F 4 "Value" H 4350 2900 60 0001 C CNN "Fieldname"
F 5 "1 2" H 4350 2900 60 0001 C CNN "SpiceMapping"
F 6 "R" V 4350 2900 60 0001 C CNN "Spice_Primitive"
1 4350 2900
0 1 1 0
$EndComp
$Comp
L GND #PWR2
U 1 1 578EBBE4
P 4000 3600
F 0 "#PWR2" H 4000 3350 50 0001 C CNN
F 1 "GND" H 4005 3427 50 0000 C CNN
F 2 "" H 4000 3600 50 0000 C CNN
F 3 "" H 4000 3600 50 0000 C CNN
1 4000 3600
0 1 1 0
$EndComp
$Comp
L VDD #PWR5
U 1 1 578EBCE4
P 6400 3300
F 0 "#PWR5" H 6400 3150 50 0001 C CNN
F 1 "VDD" H 6417 3473 50 0000 C CNN
F 2 "" H 6400 3300 50 0000 C CNN
F 3 "" H 6400 3300 50 0000 C CNN
1 6400 3300
1 0 0 -1
$EndComp
Wire Wire Line
9650 2100 9400 2100
Wire Wire Line
5350 3500 6100 3500
Wire Wire Line
4300 3600 4750 3600
Wire Wire Line
4500 4150 5250 4150
Wire Wire Line
4500 4150 4500 3600
Connection ~ 4500 3600
Wire Wire Line
6400 4150 6400 4700
Wire Wire Line
6800 4350 6800 4150
Connection ~ 6400 4350
Wire Wire Line
5900 4150 5900 3750
Wire Wire Line
5550 4150 5900 4150
Wire Wire Line
5100 4400 5250 4400
Wire Wire Line
5100 4150 5100 4400
Connection ~ 5100 4150
Wire Wire Line
5550 4400 5750 4400
Wire Wire Line
5750 4400 5750 4150
Connection ~ 5750 4150
Wire Wire Line
6400 4350 7000 4350
Wire Wire Line
4500 2900 6000 2900
Wire Wire Line
6300 2900 7000 2900
Wire Wire Line
4650 3400 4650 2900
Connection ~ 4650 2900
Wire Wire Line
4750 3400 4650 3400
Wire Wire Line
4200 2900 2650 2900
Wire Wire Line
2650 2900 2650 3350
$Comp
L GND #PWR1
U 1 1 578EC19D
P 2650 4200
F 0 "#PWR1" H 2650 3950 50 0001 C CNN
F 1 "GND" H 2655 4027 50 0000 C CNN
F 2 "" H 2650 4200 50 0000 C CNN
F 3 "" H 2650 4200 50 0000 C CNN
1 2650 4200
1 0 0 -1
$EndComp
Wire Wire Line
2650 4200 2650 3750
Text Label 3650 2900 0 60 ~ 0
in
Wire Wire Line
7000 2900 7000 4350
Connection ~ 6800 4350
$Comp
L Q_NPN_CBE Q1
U 1 1 578EADCC
P 6300 3500
F 0 "Q1" H 6600 3550 50 0000 R CNN
F 1 "fzt1049a" H 6900 3450 50 0000 R CNN
F 2 "" H 6500 3600 50 0000 C CNN
F 3 "" H 6300 3500 50 0000 C CNN
F 4 "Value" H 6300 3500 60 0001 C CNN "Fieldname"
F 5 "Q" H 6300 3500 60 0001 C CNN "Spice_Primitive"
F 6 "fzt1049a" H 6300 3500 60 0001 C CNN "Spice_Model"
F 7 "Y" H 6300 3500 60 0001 C CNN "Spice_Netlist_Enabled"
F 8 "fzt1049a.lib" H 6300 3500 60 0001 C CNN "Spice_Lib_File"
1 6300 3500
1 0 0 -1
$EndComp
Wire Wire Line
6400 3700 6400 3850
Wire Wire Line
5900 3750 6800 3750
Wire Wire Line
6800 3750 6800 3850
Connection ~ 6400 3750
Text Label 6550 4350 0 60 ~ 0
out
$EndSCHEMATC