Be cognizant of flashed layers when generating pad shapes.
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@ -1535,30 +1535,6 @@ bool DRC_ENGINE::IsNetADiffPair( BOARD* aBoard, NETINFO_ITEM* aNet, int& aNetP,
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}
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std::shared_ptr<SHAPE> DRC_ENGINE::GetShape( BOARD_ITEM* aItem, PCB_LAYER_ID aLayer )
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{
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if( aItem->Type() == PCB_PAD_T && !static_cast<PAD*>( aItem )->FlashLayer( aLayer ) )
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{
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PAD* aPad = static_cast<PAD*>( aItem );
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if( aPad->GetAttribute() == PAD_ATTRIB::PTH )
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{
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BOARD_DESIGN_SETTINGS& bds = aPad->GetBoard()->GetDesignSettings();
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// Note: drill size represents finish size, which means the actual holes size is the
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// plating thickness larger.
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auto hole = static_cast<SHAPE_SEGMENT*>( aPad->GetEffectiveHoleShape()->Clone() );
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hole->SetWidth( hole->GetWidth() + bds.GetHolePlatingThickness() );
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return std::make_shared<SHAPE_SEGMENT>( *hole );
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}
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return std::make_shared<SHAPE_NULL>();
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}
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return aItem->GetEffectiveShape( aLayer );
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}
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bool DRC_ENGINE::IsNetTie( BOARD_ITEM* aItem )
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{
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if( aItem->GetParent() && aItem->GetParent()->Type() == PCB_FOOTPRINT_T )
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@ -191,8 +191,6 @@ public:
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static bool IsNetTie( BOARD_ITEM* aItem );
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static std::shared_ptr<SHAPE> GetShape( BOARD_ITEM* aItem, PCB_LAYER_ID aLayer );
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private:
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void addRule( std::shared_ptr<DRC_RULE>& rule )
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{
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@ -297,7 +297,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem( PCB_TRACK* track,
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}
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}
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std::shared_ptr<SHAPE> otherShape = DRC_ENGINE::GetShape( other, layer );
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std::shared_ptr<SHAPE> otherShape = other->GetEffectiveShape( layer );
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if( trackShape->Collide( otherShape.get(), clearance - m_drcEpsilon, &actual, &pos ) )
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{
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@ -630,7 +630,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa
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if( !testClearance && !testShorting && !testHoles )
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return false;
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std::shared_ptr<SHAPE> otherShape = DRC_ENGINE::GetShape( other, aLayer );
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std::shared_ptr<SHAPE> otherShape = other->GetEffectiveShape( aLayer );
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DRC_CONSTRAINT constraint;
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int clearance;
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int actual;
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@ -791,7 +791,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( )
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for( PCB_LAYER_ID layer : pad->GetLayerSet().Seq() )
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{
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std::shared_ptr<SHAPE> padShape = DRC_ENGINE::GetShape( pad, layer );
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std::shared_ptr<SHAPE> padShape = pad->GetEffectiveShape( layer );
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m_copperTree.QueryColliding( pad, layer, layer,
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// Filter:
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@ -583,7 +583,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testItemAgainstItem( BOARD_ITEM* it
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int actual;
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VECTOR2I pos;
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std::shared_ptr<SHAPE> otherShape = DRC_ENGINE::GetShape( other, layer );
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std::shared_ptr<SHAPE> otherShape = other->GetEffectiveShape( layer );
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if( testClearance )
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{
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@ -33,6 +33,7 @@
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#include <geometry/shape_simple.h>
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#include <geometry/shape_rect.h>
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#include <geometry/shape_compound.h>
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#include <geometry/shape_null.h>
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#include <string_utils.h>
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#include <i18n_utility.h>
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#include <view/view.h>
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@ -310,6 +311,22 @@ const std::shared_ptr<SHAPE_POLY_SET>& PAD::GetEffectivePolygon() const
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std::shared_ptr<SHAPE> PAD::GetEffectiveShape( PCB_LAYER_ID aLayer ) const
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{
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if( !FlashLayer( aLayer ) )
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{
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if( GetAttribute() == PAD_ATTRIB::PTH )
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{
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BOARD_DESIGN_SETTINGS& bds = GetBoard()->GetDesignSettings();
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// Note: drill size represents finish size, which means the actual holes size is the
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// plating thickness larger.
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auto hole = static_cast<SHAPE_SEGMENT*>( GetEffectiveHoleShape()->Clone() );
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hole->SetWidth( hole->GetWidth() + bds.GetHolePlatingThickness() );
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return std::make_shared<SHAPE_SEGMENT>( *hole );
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}
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return std::make_shared<SHAPE_NULL>();
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}
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if( m_shapesDirty )
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BuildEffectiveShapes( aLayer );
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@ -2477,8 +2477,8 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
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if( clearance >= 0 )
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{
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std::shared_ptr<SHAPE> viaShape = DRC_ENGINE::GetShape( aVia, layer );
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std::shared_ptr<SHAPE> otherShape = DRC_ENGINE::GetShape( aOther, layer );
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std::shared_ptr<SHAPE> viaShape = aVia->GetEffectiveShape( layer );
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std::shared_ptr<SHAPE> otherShape = aOther->GetEffectiveShape( layer );
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if( viaShape->Collide( otherShape.get(), clearance - m_drcEpsilon ) )
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return true;
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@ -2510,7 +2510,7 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
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if( clearance >= 0 )
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{
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std::shared_ptr<SHAPE> viaShape = DRC_ENGINE::GetShape( aVia, UNDEFINED_LAYER );
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std::shared_ptr<SHAPE> viaShape = aVia->GetEffectiveShape( UNDEFINED_LAYER );
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if( viaShape->Collide( holeShape.get(), clearance - m_drcEpsilon ) )
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return true;
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