CADSTAR PCB Archive Importer: Parse TRUNK and TRUNKREF, display error if present (no KiCad equivalent)

This commit is contained in:
Roberto Fernandez Bautista 2020-10-13 22:40:44 +01:00 committed by Jon Evans
parent 8b13140122
commit 5273c77fbf
5 changed files with 107 additions and 15 deletions

View File

@ -1727,28 +1727,45 @@ void CADSTAR_ARCHIVE_PARSER::PARTS::Parse( XNODE* aNode )
}
void CADSTAR_ARCHIVE_PARSER::NET::JUNCTION::Parse( XNODE* aNode )
void CADSTAR_ARCHIVE_PARSER::NET::JUNCTION::ParseIdentifiers( XNODE* aNode )
{
wxASSERT( aNode->GetName() == wxT( "JPT" ) );
ID = GetXmlAttributeIDString( aNode, 0 );
LayerID = GetXmlAttributeIDString( aNode, 1 );
}
bool CADSTAR_ARCHIVE_PARSER::NET::JUNCTION::ParseSubNode( XNODE* aChildNode )
{
wxString cNodeName = aChildNode->GetName();
if( cNodeName == wxT( "PT" ) )
Location.Parse( aChildNode );
else if( cNodeName == wxT( "FIX" ) )
Fixed = true;
else if( cNodeName == wxT( "GROUPREF" ) )
GroupID = GetXmlAttributeIDString( aChildNode, 0 );
else if( cNodeName == wxT( "REUSEBLOCKREF" ) )
ReuseBlockRef.Parse( aChildNode );
else
return false;
return true;
}
void CADSTAR_ARCHIVE_PARSER::NET::JUNCTION::Parse( XNODE* aNode )
{
ParseIdentifiers( aNode );
XNODE* cNode = aNode->GetChildren();
for( ; cNode; cNode = cNode->GetNext() )
{
wxString cNodeName = cNode->GetName();
if( cNodeName == wxT( "PT" ) )
Location.Parse( cNode );
else if( cNodeName == wxT( "FIX" ) )
Fixed = true;
else if( cNodeName == wxT( "GROUPREF" ) )
GroupID = GetXmlAttributeIDString( cNode, 0 );
else if( cNodeName == wxT( "REUSEBLOCKREF" ) )
ReuseBlockRef.Parse( cNode );
if( ParseSubNode( cNode ) )
continue;
else
THROW_UNKNOWN_NODE_IO_ERROR( cNodeName, aNode->GetName() );
THROW_UNKNOWN_NODE_IO_ERROR( cNode->GetName(), aNode->GetName() );
}
}

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@ -1036,6 +1036,8 @@ public:
REUSEBLOCKREF ReuseBlockRef;
bool Fixed = false;
void ParseIdentifiers( XNODE* aNode );
bool ParseSubNode( XNODE* aChildNode );
virtual void Parse( XNODE* aNode );
};

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@ -97,6 +97,14 @@ void CADSTAR_PCB_ARCHIVE_LOADER::Load( ::BOARD* aBoard )
loadCoppers();
loadNets();
if( Layout.Trunks.size() > 0 )
{
wxLogWarning(
_( "The CADSTAR design contains Trunk routing elements, which have no KiCad "
"equivalent. These elements were not loaded." ) );
}
if( Layout.VariantHierarchy.Variants.size() > 0 )
{
wxLogWarning(

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@ -1894,6 +1894,15 @@ CADSTAR_PCB_ARCHIVE_PARSER::TESTLAND_SIDE CADSTAR_PCB_ARCHIVE_PARSER::ParseTestl
}
void CADSTAR_PCB_ARCHIVE_PARSER::TRUNK::Parse( XNODE* aNode )
{
wxASSERT( aNode->GetName() == wxT( "TRUNK" ) );
ID = GetXmlAttributeIDString( aNode, 0 );
Definition = GetXmlAttributeIDString( aNode, 1 );
}
void CADSTAR_PCB_ARCHIVE_PARSER::NET_PCB::PIN::Parse( XNODE* aNode )
{
wxASSERT( aNode->GetName() == wxT( "PIN" ) );
@ -1905,6 +1914,23 @@ void CADSTAR_PCB_ARCHIVE_PARSER::NET_PCB::PIN::Parse( XNODE* aNode )
}
void CADSTAR_PCB_ARCHIVE_PARSER::NET_PCB::JUNCTION_PCB::Parse( XNODE* aNode )
{
ParseIdentifiers( aNode );
XNODE* cNode = aNode->GetChildren();
for( ; cNode; cNode = cNode->GetNext() )
{
if( ParseSubNode( cNode ) )
continue;
else if( cNode->GetName() == wxT( "TRUNKREF" ) )
TrunkID = GetXmlAttributeIDString( cNode, 0 );
else
THROW_UNKNOWN_NODE_IO_ERROR( cNode->GetName(), aNode->GetName() );
}
}
void CADSTAR_PCB_ARCHIVE_PARSER::NET_PCB::VIA::Parse( XNODE* aNode )
{
wxASSERT( aNode->GetName() == wxT( "VIA" ) );
@ -1929,6 +1955,8 @@ void CADSTAR_PCB_ARCHIVE_PARSER::NET_PCB::VIA::Parse( XNODE* aNode )
ReuseBlockRef.Parse( cNode );
else if( cNodeName == wxT( "TESTLAND" ) )
TestlandSide = ParseTestlandSide( cNode );
else if( cNode->GetName() == wxT( "TRUNKREF" ) )
TrunkID = GetXmlAttributeIDString( cNode, 0 );
else
THROW_UNKNOWN_NODE_IO_ERROR( cNodeName, aNode->GetName() );
}
@ -2026,6 +2054,10 @@ void CADSTAR_PCB_ARCHIVE_PARSER::NET_PCB::CONNECTION_PCB::Parse( XNODE* aNode )
Unrouted = true;
UnrouteLayerID = GetXmlAttributeIDString( cNode, 0 );
}
else if( cNode->GetName() == wxT( "TRUNKREF" ) )
{
TrunkID = GetXmlAttributeIDString( cNode, 0 );
}
else
{
THROW_UNKNOWN_NODE_IO_ERROR( cNodeName, wxT( "CONN" ) );
@ -2045,7 +2077,13 @@ void CADSTAR_PCB_ARCHIVE_PARSER::NET_PCB::Parse( XNODE* aNode )
{
wxString cNodeName = cNode->GetName();
if( ParseSubNode( cNode ) )
if( cNodeName == wxT( "JPT" ) )
{
JUNCTION_PCB jpt;
jpt.Parse( cNode );
Junctions.insert( std::make_pair( jpt.ID, jpt ) );
}
else if( ParseSubNode( cNode ) )
{
continue;
}
@ -2440,6 +2478,12 @@ void CADSTAR_PCB_ARCHIVE_PARSER::LAYOUT::Parse( XNODE* aNode )
comp.Parse( cNode );
Components.insert( std::make_pair( comp.ID, comp ) );
}
else if( cNodeName == wxT( "TRUNK" ) )
{
TRUNK trunk;
trunk.Parse( cNode );
Trunks.insert( std::make_pair( trunk.ID, trunk ) );
}
else if( cNodeName == wxT( "NET" ) )
{
NET_PCB net;

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@ -73,6 +73,7 @@ public:
typedef long COPPER_TERM_ID;
typedef wxString COPPER_ID;
typedef wxString DRILL_TABLE_ID;
typedef wxString TRUNK_ID;
/**
* @brief Type of layer appropriate for the material being set up
@ -921,6 +922,15 @@ public:
};
struct TRUNK
{
TRUNK_ID ID;
wxString Definition; // TODO: more work required to fully parse the TRUNK structure
void Parse( XNODE* aNode );
};
struct NET_PCB : CADSTAR_ARCHIVE_PARSER::NET
{
struct PIN ///< "PIN" nodename (represents a PAD in a PCB component)
@ -932,12 +942,20 @@ public:
void Parse( XNODE* aNode );
};
struct JUNCTION_PCB : CADSTAR_ARCHIVE_PARSER::NET::JUNCTION ///< "JPT" nodename
{
TRUNK_ID TrunkID; ///< TRUNKREF Statements
void Parse( XNODE* aNode ) override;
};
struct VIA ///< "VIA" nodename
{
NETELEMENT_ID ID; ///< First character is "V"
VIACODE_ID ViaCodeID;
LAYERPAIR_ID LayerPairID;
POINT Location;
TRUNK_ID TrunkID; ///< TRUNKREF Statements
GROUP_ID GroupID = wxEmptyString; ///< If not empty, this VIA is part of a group.
REUSEBLOCKREF ReuseBlockRef;
TESTLAND_SIDE TestlandSide = TESTLAND_SIDE::NONE;
@ -983,11 +1001,13 @@ public:
///< as opposed to a route (track in KiCad terms)
LAYER_ID UnrouteLayerID = wxEmptyString; ///< See Unrouted member variable.
TRUNK_ID TrunkID; ///< TRUNKREF Statements
void Parse( XNODE* aNode ) override;
};
std::map<NETELEMENT_ID, PIN> Pins;
std::map<NETELEMENT_ID, JUNCTION_PCB> Junctions;
std::map<NETELEMENT_ID, VIA> Vias;
std::map<NETELEMENT_ID, COPPER_TERMINAL> CopperTerminals;
std::vector<CONNECTION_PCB> Connections;
@ -1160,6 +1180,7 @@ public:
std::map<AREA_ID, AREA> Areas;
std::map<COMPONENT_ID, COMPONENT> Components;
std::map<DOCUMENTATION_SYMBOL_ID, DOCUMENTATION_SYMBOL> DocumentationSymbols;
std::map<TRUNK_ID, TRUNK> Trunks;
std::map<NET_ID, NET_PCB> Nets; ///< Contains tracks and vias
std::map<TEMPLATE_ID, TEMPLATE> Templates;
std::map<COPPER_ID, COPPER> Coppers;