Add layer to rule grammar.
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cdaa866428
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@ -8,6 +8,8 @@ disallow
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footprint
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graphic
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hole
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inner
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layer
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match_area
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match_layer
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match_netclass
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@ -17,6 +19,7 @@ micro_via
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min
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npth
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opt
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outer
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pad
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pth
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rule
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@ -150,8 +150,9 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
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m_textEditor->AutoCompCancel();
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sexprs.push( partial );
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if( sexprs.size()
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&& ( sexprs.top() == "constraint" || sexprs.top() == "disallow" ) )
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if( sexprs.size() && ( sexprs.top() == "constraint"
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|| sexprs.top() == "disallow"
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|| sexprs.top() == "layer" ) )
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{
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partial = wxEmptyString;
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context = SEXPR_TOKEN;
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@ -174,7 +175,7 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
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if( sexprs.empty() )
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tokens = "rule version";
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else if( sexprs.top() == "rule" )
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tokens = "condition constraint disallow";
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tokens = "condition constraint disallow layer";
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else if( sexprs.top() == "constraint" )
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tokens = "max min opt";
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}
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@ -186,6 +187,8 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
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tokens = "annulus_width clearance hole track_width";
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else if( sexprs.top() == "disallow" )
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tokens = "buried_via graphic hole micro_via pad text track via zone";
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else if( sexprs.top() == "layer" )
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tokens = "inner outer \"x\"";
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}
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else if( context == STRING && expr_context == STRUCT_REF )
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{
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@ -89,6 +89,7 @@ public:
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LIBEVAL::ERROR_STATUS GetCompilationError();
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public:
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LSET m_LayerCondition;
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wxString m_Expression;
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wxString m_TargetRuleName;
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@ -129,6 +130,7 @@ public:
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MINOPTMAX m_TrackConstraint;
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int m_MinHole;
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LSET m_LayerCondition;
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DRC_RULE_CONDITION m_Condition;
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};
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@ -39,7 +39,6 @@ DRC_RULES_PARSER::DRC_RULES_PARSER( BOARD* aBoard, const wxString& aSource,
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m_requiredVersion( 0 ),
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m_tooRecent( false )
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{
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initLayerMap();
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}
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@ -49,20 +48,6 @@ DRC_RULES_PARSER::DRC_RULES_PARSER( BOARD* aBoard, FILE* aFile, const wxString&
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m_requiredVersion( 0 ),
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m_tooRecent( false )
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{
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initLayerMap();
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}
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void DRC_RULES_PARSER::initLayerMap()
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{
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for( LAYER_NUM layer = 0; layer < PCB_LAYER_ID_COUNT; ++layer )
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{
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std::string untranslated = TO_UTF8( wxString( LSET::Name( PCB_LAYER_ID( layer ) ) ) );
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m_layerMap[ untranslated ] = PCB_LAYER_ID( layer );
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std::string userName = m_board->GetLayerName( PCB_LAYER_ID( layer ) ).ToStdString();
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m_layerMap[ userName ] = PCB_LAYER_ID( layer );
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}
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}
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@ -95,7 +80,7 @@ void DRC_RULES_PARSER::Parse( std::vector<DRC_RULE*>& aRules )
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break;
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default:
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Expecting( "selector or rule" );
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Expecting( "rule" );
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}
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}
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}
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@ -159,6 +144,10 @@ DRC_RULE* DRC_RULES_PARSER::parseDRC_RULE()
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NeedRIGHT();
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break;
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case T_layer:
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rule->m_LayerCondition = parseLayer();
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break;
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default:
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Expecting( "disallow, constraint or condition" );
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}
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@ -258,4 +247,36 @@ void DRC_RULES_PARSER::parseValueWithUnits( const wxString& aExpr, int& aResult
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}
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aResult = evaluator.Result();
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};
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}
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LSET DRC_RULES_PARSER::parseLayer()
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{
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LSET retVal;
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int tok = NextTok();
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if( tok == T_outer )
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{
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retVal = LSET::ExternalCuMask();
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}
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else if( tok == T_inner )
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{
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retVal = LSET::InternalCuMask();
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}
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else
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{
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wxString layerName = FromUTF8();
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PCB_LAYER_ID layer = ENUM_MAP<PCB_LAYER_ID>::Instance().ToEnum( layerName );
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if( layer == UNDEFINED_LAYER )
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{
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wxString msg = wxString::Format( _( "Unrecognized layer '%s' " ), layerName );
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THROW_PARSE_ERROR( msg, CurSource(), CurLine(), CurLineNumber(), CurOffset() );
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}
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retVal.set( layer );
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}
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NeedRIGHT();
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return retVal;
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}
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@ -46,19 +46,16 @@ public:
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void Parse( std::vector<DRC_RULE*>& aRules );
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private:
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void initLayerMap();
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DRC_RULE* parseDRC_RULE();
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void parseConstraint( DRC_RULE* aRule );
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void parseValueWithUnits( const wxString& aExpr, int& aResult );
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LSET parseLayer();
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private:
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BOARD* m_board;
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int m_requiredVersion;
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bool m_tooRecent;
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std::unordered_map<std::string, PCB_LAYER_ID> m_layerMap;
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};
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#endif // DRC_RULE_PARSER_H
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