MINOPTMAX: added OptThenMin() method as syntax sugar

include/core/minoptmax.h

@@ -42,6 +42,17 @@ public:
 
     bool IsNull() const { return m_isNull; }
 
+    T OptThenMin() const 
+    {
+        if( m_hasOpt )
+            return m_opt;
+        else if( m_hasMin )
+            return m_min;
+
+        assert( m_hasMin );
+        return 0;
+    }
+
 private:
     bool m_isNull;
     T m_min;

pcbnew/router/pns_kicad_iface.cpp

@@ -44,6 +44,9 @@
 #include <geometry/shape_arc.h>
 #include <geometry/shape_simple.h>
 
+#include <drc/drc_rule.h>
+#include <drc/drc_engine.h>
+
 #include <memory>
 
 #include <advanced_config.h>
@@ -73,12 +76,14 @@ public:
     virtual bool CollideHoles( const PNS::ITEM* aA, const PNS::ITEM* aB,
                                bool aNeedMTV, VECTOR2I* aMTV ) const override;
 
-    virtual int Clearance( const PNS::ITEM* aA, const PNS::ITEM* aB ) const override;
+    virtual int Clearance( const PNS::ITEM* aA, const PNS::ITEM* aB ) override;
-    virtual int Clearance( int aNetCode ) const override;
+    //virtual int Clearance( int aNetCode ) const override;
     virtual int DpCoupledNet( int aNet ) override;
     virtual int DpNetPolarity( int aNet ) override;
     virtual bool DpNetPair( PNS::ITEM* aItem, int& aNetP, int& aNetN ) override;
 
+    virtual bool QueryConstraint( PNS::CONSTRAINT_TYPE aType, const PNS::ITEM* aItemA, const PNS::ITEM* aItemB, int aLayer, PNS::CONSTRAINT* aConstraint ) override;
+    
     virtual wxString NetName( int aNet ) override;
 
 private:
@@ -240,47 +245,53 @@ int PNS_PCBNEW_RULE_RESOLVER::localPadClearance( const PNS::ITEM* aItem ) const
     return i->second;
 }
 
-
+bool PNS_PCBNEW_RULE_RESOLVER::QueryConstraint( PNS::CONSTRAINT_TYPE aType, const PNS::ITEM* aItemA, const PNS::ITEM* aItemB, int aLayer, PNS::CONSTRAINT* aConstraint )
-int PNS_PCBNEW_RULE_RESOLVER::Clearance( const PNS::ITEM* aA, const PNS::ITEM* aB ) const
 {
-    int net_a = aA->Net();
+    std::shared_ptr<DRC_ENGINE> drcEngine = m_board->GetDesignSettings().m_DRCEngine;
-    int cl_a = Clearance( net_a );
-    int net_b = aB->Net();
-    int cl_b = Clearance( net_b );
 
-    // Pad clearance is 0 if the ITEM* is not a pad
+    if( !drcEngine )
-    int pad_a = localPadClearance( aA );
+    {
-    int pad_b = localPadClearance( aB );
+        return false;
+    }
 
-    if( pad_a > 0 )
+    DRC_CONSTRAINT_TYPE_T hostRuleType;
-        cl_a = pad_a;
 
-    if( pad_b > 0 )
+    switch ( aType )
-        cl_b = pad_b;
+    {
+        case PNS::CONSTRAINT_TYPE::CT_CLEARANCE:
+            hostRuleType = DRC_CONSTRAINT_TYPE_CLEARANCE;
+            break;
+        case PNS::CONSTRAINT_TYPE::CT_WIDTH:
+            hostRuleType = DRC_CONSTRAINT_TYPE_TRACK_WIDTH;
+            break;
+        case PNS::CONSTRAINT_TYPE::CT_DIFF_PAIR_GAP:
+            hostRuleType = DRC_CONSTRAINT_TYPE_DIFF_PAIR_GAP;
+            break;
+        case PNS::CONSTRAINT_TYPE::CT_LENGTH:
+            hostRuleType = DRC_CONSTRAINT_TYPE_LENGTH;
+            break;
+        default:
+            return false; // should not happen
+    }
 
-    return std::max( cl_a, cl_b );
+    DRC_CONSTRAINT hostConstraint = drcEngine->EvalRulesForItems( hostRuleType,
+        aItemA->Parent(),
+        aItemB->Parent(),
+        (PCB_LAYER_ID) aLayer );
+
+    if( hostConstraint.IsNull() )
+        return false;
 }
 
 
-int PNS_PCBNEW_RULE_RESOLVER::Clearance( int aNetCode ) const
+int PNS_PCBNEW_RULE_RESOLVER::Clearance( const PNS::ITEM* aA, const PNS::ITEM* aB )
 {
-    if( aNetCode == -1 )
+    PNS::CONSTRAINT constraint;
-    {
+    bool ok = QueryConstraint( PNS::CONSTRAINT_TYPE::CT_CLEARANCE, aA, aB, aA->Layer(), &constraint );
-        return 0;
+
-    }
+    assert( ok );
-    else if( aNetCode == 0 )
+
-    {
+    return constraint.m_Value.Min();
-        return m_defaultClearance;
-    }
-    else if( aNetCode > 0 && aNetCode < (int) m_netClearanceCache.size() )
-    {
-        return m_netClearanceCache[aNetCode].clearance;
-    }
-    else
-    {
-        wxFAIL_MSG( "PNS_PCBNEW_RULE_RESOLVER::Clearance: net not found in clearance cache." );
-        return m_defaultClearance;
-    }
 }
 
 

pcbnew/router/pns_node.h

@@ -28,6 +28,7 @@
 #include <unordered_map>
 
 #include <core/optional.h>
+#include <core/minoptmax.h>
 
 #include <geometry/shape.h>
 #include <geometry/shape_line_chain.h>
@@ -54,6 +55,24 @@ class NODE;
  * An abstract function object, returning a design rule (clearance, diff pair gap, etc) required between two items.
  **/
 
+enum class CONSTRAINT_TYPE
+{
+    CT_CLEARANCE = 1,
+    CT_DIFF_PAIR_GAP = 2,
+    CT_LENGTH = 3,
+    CT_WIDTH = 4
+};
+
+struct CONSTRAINT
+{
+    CONSTRAINT_TYPE m_Type;
+    MINOPTMAX<int> m_Value;
+    bool m_Allowed;
+    wxString m_RuleName;
+    wxString m_FromName;
+    wxString m_ToName;
+};
+
 class RULE_RESOLVER
 {
 public:
@@ -62,12 +81,14 @@ public:
     virtual bool CollideHoles( const ITEM* aA, const ITEM* aB,
                                bool aNeedMTV, VECTOR2I* aMTV ) const = 0;
 
-    virtual int Clearance( const ITEM* aA, const ITEM* aB ) const = 0;
+    virtual int Clearance( const ITEM* aA, const ITEM* aB ) = 0;
-    virtual int Clearance( int aNetCode ) const = 0;
+    //virtual int Clearance( int aNetCode ) const = 0;
     virtual int DpCoupledNet( int aNet ) = 0;
     virtual int DpNetPolarity( int aNet ) = 0;
     virtual bool DpNetPair( ITEM* aItem, int& aNetP, int& aNetN ) = 0;
 
+    virtual bool QueryConstraint( CONSTRAINT_TYPE aType, const PNS::ITEM* aItemA, const PNS::ITEM* aItemB, int aLayer, PNS::CONSTRAINT* aConstraint ) = 0;
+    
     virtual wxString NetName( int aNet ) = 0;
 };
 

pcbnew/router/pns_router.cpp

@@ -330,7 +330,7 @@ void ROUTER::updateView( NODE* aNode, ITEM_SET& aCurrent, bool aDragging )
 
     for( auto item : added )
     {
-        int clearance = GetRuleResolver()->Clearance( item->Net() );
+        int clearance = 0; //GetRuleResolver()->Clearance( item->Net() );
         m_iface->DisplayItem( item, -1, clearance, aDragging );
     }
 
@@ -364,7 +364,7 @@ void ROUTER::movePlacing( const VECTOR2I& aP, ITEM* aEndItem )
             continue;
 
         const LINE* l = static_cast<const LINE*>( item );
-        int clearance = GetRuleResolver()->Clearance( item->Net() );
+        int clearance = 0; //GetRuleResolver()->Clearance( item->Net() );
 
         m_iface->DisplayItem( l, -1, clearance );
 

pcbnew/router/pns_topology.h

@@ -58,9 +58,6 @@ public:
     const ITEM_SET AssembleTrivialPath( ITEM* aStart );
     const DIFF_PAIR AssembleDiffPair( SEGMENT* aStart );
 
-    int DpCoupledNet( int aNet );
-    int DpNetPolarity( int aNet );
-    const LINE DpCoupledLine( LINE* aLine );
     bool AssembleDiffPair( ITEM* aStart, DIFF_PAIR& aPair );
 
     const std::set<ITEM*> AssembleCluster( ITEM* aStart, int aLayer );

qa/drc_proto/test_cases/basic_hole_clearance/drc-rules

@@ -1,10 +0,0 @@
-(version 20200610)
-
-(condition (expression "A.type == 'Pad' && A.netname == 'Net3'") (rule "small_pad_hole_clearance") )
-(condition (expression "A.type == 'Pad' && A.netname == 'Net2'") (rule "big_pad_hole_clearance") )
-
-(rule "small_pad_hole_clearance" (type "hole_clearance") (priority 1) (severity error) (min "0.1mm") )
-(rule "big_pad_hole_clearance" (type "hole_clearance") (priority 1) (severity error) (min "5mm" ) )
-(rule "default" (type "hole_clearance") (priority 0) (severity error) (min "0.5mm") )
-
-