Don't drop text on Edge.Cuts when plotting.
While -our- user model is that Edge.Cuts is just for edges, it's best not to dictate a particular model to users. ADDED a DRC error when text (or a dimension) appears on the Edge.Cuts layer. Fixes https://gitlab.com/kicad/code/kicad/issues/8470
This commit is contained in:
parent
8f3343b9e3
commit
5f22025611
|
@ -57,6 +57,10 @@ DRC_ITEM DRC_ITEM::itemsNotAllowed( DRCE_ALLOWED_ITEMS,
|
||||||
_( "Items not allowed" ),
|
_( "Items not allowed" ),
|
||||||
wxT( "items_not_allowed" ) );
|
wxT( "items_not_allowed" ) );
|
||||||
|
|
||||||
|
DRC_ITEM DRC_ITEM::textOnEdgeCuts( DRCE_TEXT_ON_EDGECUTS,
|
||||||
|
_( "Text (or dimension) on Edge.Cuts layer" ),
|
||||||
|
wxT( "text_on_edge_cuts" ) );
|
||||||
|
|
||||||
DRC_ITEM DRC_ITEM::clearance( DRCE_CLEARANCE,
|
DRC_ITEM DRC_ITEM::clearance( DRCE_CLEARANCE,
|
||||||
_( "Clearance violation" ),
|
_( "Clearance violation" ),
|
||||||
wxT( "clearance" ) );
|
wxT( "clearance" ) );
|
||||||
|
@ -253,6 +257,7 @@ std::shared_ptr<DRC_ITEM> DRC_ITEM::Create( int aErrorCode )
|
||||||
case DRCE_UNCONNECTED_ITEMS: return std::make_shared<DRC_ITEM>( unconnectedItems );
|
case DRCE_UNCONNECTED_ITEMS: return std::make_shared<DRC_ITEM>( unconnectedItems );
|
||||||
case DRCE_SHORTING_ITEMS: return std::make_shared<DRC_ITEM>( shortingItems );
|
case DRCE_SHORTING_ITEMS: return std::make_shared<DRC_ITEM>( shortingItems );
|
||||||
case DRCE_ALLOWED_ITEMS: return std::make_shared<DRC_ITEM>( itemsNotAllowed );
|
case DRCE_ALLOWED_ITEMS: return std::make_shared<DRC_ITEM>( itemsNotAllowed );
|
||||||
|
case DRCE_TEXT_ON_EDGECUTS: return std::make_shared<DRC_ITEM>( textOnEdgeCuts );
|
||||||
case DRCE_CLEARANCE: return std::make_shared<DRC_ITEM>( clearance );
|
case DRCE_CLEARANCE: return std::make_shared<DRC_ITEM>( clearance );
|
||||||
case DRCE_TRACKS_CROSSING: return std::make_shared<DRC_ITEM>( tracksCrossing );
|
case DRCE_TRACKS_CROSSING: return std::make_shared<DRC_ITEM>( tracksCrossing );
|
||||||
case DRCE_COPPER_EDGE_CLEARANCE: return std::make_shared<DRC_ITEM>( copperEdgeClearance );
|
case DRCE_COPPER_EDGE_CLEARANCE: return std::make_shared<DRC_ITEM>( copperEdgeClearance );
|
||||||
|
|
|
@ -36,6 +36,7 @@ enum PCB_DRC_CODE {
|
||||||
DRCE_UNCONNECTED_ITEMS = DRCE_FIRST, // items are unconnected
|
DRCE_UNCONNECTED_ITEMS = DRCE_FIRST, // items are unconnected
|
||||||
DRCE_SHORTING_ITEMS, // items short two nets but are not a net-tie
|
DRCE_SHORTING_ITEMS, // items short two nets but are not a net-tie
|
||||||
DRCE_ALLOWED_ITEMS, // a disallowed item has been used
|
DRCE_ALLOWED_ITEMS, // a disallowed item has been used
|
||||||
|
DRCE_TEXT_ON_EDGECUTS, // text or dimension on Edge.Cuts layer
|
||||||
DRCE_CLEARANCE, // items are too close together
|
DRCE_CLEARANCE, // items are too close together
|
||||||
DRCE_TRACKS_CROSSING, // tracks are crossing
|
DRCE_TRACKS_CROSSING, // tracks are crossing
|
||||||
DRCE_COPPER_EDGE_CLEARANCE, // a copper item is too close to the board edge
|
DRCE_COPPER_EDGE_CLEARANCE, // a copper item is too close to the board edge
|
||||||
|
@ -129,6 +130,7 @@ private:
|
||||||
static DRC_ITEM unconnectedItems;
|
static DRC_ITEM unconnectedItems;
|
||||||
static DRC_ITEM shortingItems;
|
static DRC_ITEM shortingItems;
|
||||||
static DRC_ITEM itemsNotAllowed;
|
static DRC_ITEM itemsNotAllowed;
|
||||||
|
static DRC_ITEM textOnEdgeCuts;
|
||||||
static DRC_ITEM clearance;
|
static DRC_ITEM clearance;
|
||||||
static DRC_ITEM tracksCrossing;
|
static DRC_ITEM tracksCrossing;
|
||||||
static DRC_ITEM copperEdgeClearance;
|
static DRC_ITEM copperEdgeClearance;
|
||||||
|
|
|
@ -31,6 +31,7 @@
|
||||||
"Disallow" test. Goes through all items, matching types/conditions drop errors.
|
"Disallow" test. Goes through all items, matching types/conditions drop errors.
|
||||||
Errors generated:
|
Errors generated:
|
||||||
- DRCE_ALLOWED_ITEMS
|
- DRCE_ALLOWED_ITEMS
|
||||||
|
- DRCE_TEXT_ON_EDGECUTS
|
||||||
*/
|
*/
|
||||||
|
|
||||||
class DRC_TEST_PROVIDER_DISALLOW : public DRC_TEST_PROVIDER
|
class DRC_TEST_PROVIDER_DISALLOW : public DRC_TEST_PROVIDER
|
||||||
|
@ -64,18 +65,6 @@ public:
|
||||||
|
|
||||||
bool DRC_TEST_PROVIDER_DISALLOW::Run()
|
bool DRC_TEST_PROVIDER_DISALLOW::Run()
|
||||||
{
|
{
|
||||||
if( m_drcEngine->IsErrorLimitExceeded( DRCE_ALLOWED_ITEMS ) )
|
|
||||||
{
|
|
||||||
reportAux( "Disallow violations ignored. Tests not run." );
|
|
||||||
return true; // continue with other tests
|
|
||||||
}
|
|
||||||
|
|
||||||
if( !m_drcEngine->HasRulesForConstraintType( DISALLOW_CONSTRAINT ) )
|
|
||||||
{
|
|
||||||
reportAux( "No disallow constraints found. Skipping check." );
|
|
||||||
return true; // continue with other tests
|
|
||||||
}
|
|
||||||
|
|
||||||
if( !reportPhase( _( "Checking keepouts & disallow constraints..." ) ) )
|
if( !reportPhase( _( "Checking keepouts & disallow constraints..." ) ) )
|
||||||
return false; // DRC cancelled
|
return false; // DRC cancelled
|
||||||
|
|
||||||
|
@ -103,6 +92,28 @@ bool DRC_TEST_PROVIDER_DISALLOW::Run()
|
||||||
auto checkItem =
|
auto checkItem =
|
||||||
[&]( BOARD_ITEM* item ) -> bool
|
[&]( BOARD_ITEM* item ) -> bool
|
||||||
{
|
{
|
||||||
|
if( !m_drcEngine->IsErrorLimitExceeded( DRCE_TEXT_ON_EDGECUTS )
|
||||||
|
&& item->GetLayer() == Edge_Cuts )
|
||||||
|
{
|
||||||
|
switch( item->Type() )
|
||||||
|
{
|
||||||
|
case PCB_TEXT_T:
|
||||||
|
case PCB_DIM_ALIGNED_T:
|
||||||
|
case PCB_DIM_CENTER_T:
|
||||||
|
case PCB_DIM_ORTHOGONAL_T:
|
||||||
|
case PCB_DIM_LEADER_T:
|
||||||
|
{
|
||||||
|
std::shared_ptr<DRC_ITEM> drc = DRC_ITEM::Create( DRCE_TEXT_ON_EDGECUTS );
|
||||||
|
drc->SetItems( item );
|
||||||
|
reportViolation( drc, item->GetPosition() );
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
if( m_drcEngine->IsErrorLimitExceeded( DRCE_ALLOWED_ITEMS ) )
|
if( m_drcEngine->IsErrorLimitExceeded( DRCE_ALLOWED_ITEMS ) )
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
|
|
|
@ -348,18 +348,14 @@ void BRDITEMS_PLOTTER::PlotBoardGraphicItems()
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case PCB_TEXT_T:
|
case PCB_TEXT_T:
|
||||||
if( item->GetLayer() != Edge_Cuts )
|
|
||||||
PlotPcbText( (PCB_TEXT*) item );
|
PlotPcbText( (PCB_TEXT*) item );
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case PCB_DIM_ALIGNED_T:
|
case PCB_DIM_ALIGNED_T:
|
||||||
case PCB_DIM_CENTER_T:
|
case PCB_DIM_CENTER_T:
|
||||||
case PCB_DIM_ORTHOGONAL_T:
|
case PCB_DIM_ORTHOGONAL_T:
|
||||||
case PCB_DIM_LEADER_T:
|
case PCB_DIM_LEADER_T:
|
||||||
if( item->GetLayer() != Edge_Cuts )
|
|
||||||
PlotDimension( (DIMENSION_BASE*) item );
|
PlotDimension( (DIMENSION_BASE*) item );
|
||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case PCB_TARGET_T:
|
case PCB_TARGET_T:
|
||||||
|
|
Loading…
Reference in New Issue