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Improve SNR and formatting.

This commit is contained in:
Jeff Young 2020-12-24 00:38:33 +00:00
parent d0429ced8d
commit 5fffde09d4
8 changed files with 68 additions and 74 deletions
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5
common/project/project_local_settings.cpp
View File

@ -157,8 +157,9 @@ PROJECT_LOCAL_SETTINGS::PROJECT_LOCAL_SETTINGS( PROJECT* aProject, const wxStrin
// TODO: move the rest of PCB_DISPLAY_OPTIONS that are project-specific in here
#if 0
m_params.emplace_back( new PARAM_ENUM<ZONE_DISPLAY_MODE>( "board.zone_display_mode",
&m_ZoneDisplayMode, ZONE_DISPLAY_MODE::SHOW_FILLED,
ZONE_DISPLAY_MODE::SHOW_OUTLINED, ZONE_DISPLAY_MODE::SHOW_FILLED ) );
&m_ZoneDisplayMode,
ZONE_DISPLAY_MODE::SHOW_FILLED, ZONE_DISPLAY_MODE::SHOW_FILLED_OUTLINE,
ZONE_DISPLAY_MODE::SHOW_FILLED ) );
#endif
m_params.emplace_back( new PARAM_LAMBDA<nlohmann::json>( "project.files",

6
include/project/board_project_settings.h
View File

@ -95,9 +95,9 @@ enum class HIGH_CONTRAST_MODE
///> Determines how zones should be displayed
enum class ZONE_DISPLAY_MODE
{
SHOW_FILLED, ///< Filled polygons are shown
HIDE_FILLED, ///< Only the zone outline is shown
SHOW_OUTLINED ///< Outlines of filled polygons are shown
SHOW_FILLED, ///< Filled polygons are shown
SHOW_ZONE_OUTLINE, ///< Only the zone outline is shown
SHOW_FILLED_OUTLINE ///< Outlines of filled polygons are shown
};
///> Determines how net color overrides should be applied

9
pcbnew/pcb_edit_frame.cpp
View File

@ -544,9 +544,12 @@ void PCB_EDIT_FRAME::setupUIConditions()
&& GetDisplayOptions().m_ZoneOpacity > 0.0;
};
mgr->SetConditions( PCB_ACTIONS::zoneDisplayEnable, ENABLE( enableZoneControlConition ).Check( cond.ZoneDisplayMode( ZONE_DISPLAY_MODE::SHOW_FILLED ) ) );
mgr->SetConditions( PCB_ACTIONS::zoneDisplayDisable, ENABLE( enableZoneControlConition ).Check( cond.ZoneDisplayMode( ZONE_DISPLAY_MODE::HIDE_FILLED ) ) );
mgr->SetConditions( PCB_ACTIONS::zoneDisplayOutlines, ENABLE( enableZoneControlConition ).Check( cond.ZoneDisplayMode( ZONE_DISPLAY_MODE::SHOW_OUTLINED ) ) );
mgr->SetConditions( PCB_ACTIONS::zoneDisplayEnable,
ENABLE( enableZoneControlConition ).Check( cond.ZoneDisplayMode( ZONE_DISPLAY_MODE::SHOW_FILLED ) ) );
mgr->SetConditions( PCB_ACTIONS::zoneDisplayDisable,
ENABLE( enableZoneControlConition ).Check( cond.ZoneDisplayMode( ZONE_DISPLAY_MODE::SHOW_ZONE_OUTLINE ) ) );
mgr->SetConditions( PCB_ACTIONS::zoneDisplayOutlines,
ENABLE( enableZoneControlConition ).Check( cond.ZoneDisplayMode( ZONE_DISPLAY_MODE::SHOW_FILLED_OUTLINE ) ) );
auto enableBoardSetupCondition =
[this] ( const SELECTION& )

28
pcbnew/pcb_painter.cpp
View File

@ -63,7 +63,7 @@ PCB_RENDER_SETTINGS::PCB_RENDER_SETTINGS()
m_netNamesOnVias = true;
m_zoneOutlines = true;
m_zoneDisplayMode = ZONE_DISPLAY_MODE::SHOW_FILLED;
m_clearance = CL_NONE;
m_clearanceDisplayFlags = CL_NONE;
m_sketchGraphics = false;
m_sketchText = false;
m_netColorMode = NET_COLOR_MODE::RATSNEST;
@ -184,29 +184,28 @@ void PCB_RENDER_SETTINGS::LoadDisplayOptions( const PCB_DISPLAY_OPTIONS& aOption
// Clearance settings
switch( aOptions.m_ShowTrackClearanceMode )
{
case PCB_DISPLAY_OPTIONS::DO_NOT_SHOW_CLEARANCE:
m_clearance = CL_NONE;
case PCB_DISPLAY_OPTIONS::DO_NOT_SHOW_CLEARANCE: m_clearanceDisplayFlags = CL_NONE;
break;
case PCB_DISPLAY_OPTIONS::SHOW_CLEARANCE_NEW_TRACKS:
m_clearance = CL_NEW | CL_TRACKS;
m_clearanceDisplayFlags = CL_NEW | CL_TRACKS;
break;
case PCB_DISPLAY_OPTIONS::SHOW_CLEARANCE_NEW_TRACKS_AND_VIA_AREAS:
m_clearance = CL_NEW | CL_TRACKS | CL_VIAS;
m_clearanceDisplayFlags = CL_NEW | CL_TRACKS | CL_VIAS;
break;
case PCB_DISPLAY_OPTIONS::SHOW_CLEARANCE_NEW_AND_EDITED_TRACKS_AND_VIA_AREAS:
m_clearance = CL_NEW | CL_EDITED | CL_TRACKS | CL_VIAS;
m_clearanceDisplayFlags = CL_NEW | CL_EDITED | CL_TRACKS | CL_VIAS;
break;
case PCB_DISPLAY_OPTIONS::SHOW_CLEARANCE_ALWAYS:
m_clearance = CL_NEW | CL_EDITED | CL_EXISTING | CL_TRACKS | CL_VIAS;
m_clearanceDisplayFlags = CL_NEW | CL_EDITED | CL_EXISTING | CL_TRACKS | CL_VIAS;
break;
}
if( aOptions.m_DisplayPadIsol )
m_clearance |= CL_PADS;
m_clearanceDisplayFlags |= CL_PADS;
m_contrastModeDisplay = aOptions.m_ContrastModeDisplay;
@ -563,7 +562,7 @@ void PCB_PAINTER::draw( const TRACK* aTrack, int aLayer )
// Clearance lines
constexpr int clearanceFlags = PCB_RENDER_SETTINGS::CL_EXISTING | PCB_RENDER_SETTINGS::CL_TRACKS;
if( ( m_pcbSettings.m_clearance & clearanceFlags ) == clearanceFlags )
if( ( m_pcbSettings.m_clearanceDisplayFlags & clearanceFlags ) == clearanceFlags )
{
int clearance = aTrack->GetOwnClearance( m_pcbSettings.GetActiveLayer() );
@ -602,7 +601,7 @@ void PCB_PAINTER::draw( const ARC* aArc, int aLayer )
// Clearance lines
constexpr int clearanceFlags = PCB_RENDER_SETTINGS::CL_EXISTING | PCB_RENDER_SETTINGS::CL_TRACKS;
if( ( m_pcbSettings.m_clearance & clearanceFlags ) == clearanceFlags )
if( ( m_pcbSettings.m_clearanceDisplayFlags & clearanceFlags ) == clearanceFlags )
{
int clearance = aArc->GetOwnClearance( m_pcbSettings.GetActiveLayer() );
@ -772,7 +771,7 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
// Clearance lines
constexpr int clearanceFlags = PCB_RENDER_SETTINGS::CL_EXISTING | PCB_RENDER_SETTINGS::CL_VIAS;
if( ( m_pcbSettings.m_clearance & clearanceFlags ) == clearanceFlags
if( ( m_pcbSettings.m_clearanceDisplayFlags & clearanceFlags ) == clearanceFlags
&& aLayer != LAYER_VIAS_HOLES )
{
PCB_LAYER_ID activeLayer = m_pcbSettings.GetActiveLayer();
@ -1090,7 +1089,7 @@ void PCB_PAINTER::draw( const PAD* aPad, int aLayer )
// Clearance outlines
constexpr int clearanceFlags = PCB_RENDER_SETTINGS::CL_PADS;
if( ( m_pcbSettings.m_clearance & clearanceFlags ) == clearanceFlags
if( ( m_pcbSettings.m_clearanceDisplayFlags & clearanceFlags ) == clearanceFlags
&& ( aLayer == LAYER_PAD_FR || aLayer == LAYER_PAD_BK || aLayer == LAYER_PADS_TH ) )
{
bool flashActiveLayer = aPad->FlashLayer( m_pcbSettings.GetActiveLayer() );
@ -1538,7 +1537,8 @@ void PCB_PAINTER::draw( const ZONE* aZone, int aLayer )
}
// Draw the filling
if( displayMode != ZONE_DISPLAY_MODE::HIDE_FILLED )
if( displayMode == ZONE_DISPLAY_MODE::SHOW_FILLED
|| displayMode == ZONE_DISPLAY_MODE::SHOW_FILLED_OUTLINE )
{
const SHAPE_POLY_SET& polySet = aZone->GetFilledPolysList( layer );
@ -1560,7 +1560,7 @@ void PCB_PAINTER::draw( const ZONE* aZone, int aLayer )
m_gal->SetIsFill( true );
m_gal->SetIsStroke( outline_thickness > 0 );
}
else if( displayMode == ZONE_DISPLAY_MODE::SHOW_OUTLINED )
else if( displayMode == ZONE_DISPLAY_MODE::SHOW_FILLED_OUTLINE )
{
m_gal->SetIsFill( false );
m_gal->SetIsStroke( true );

74
pcbnew/pcb_painter.h
View File

@ -2,7 +2,7 @@
* This program source code file is part of KiCad, a free EDA CAD application.
*
* Copyright (C) 2013 CERN
* Copyright (C) 2016 KiCad Developers, see AUTHORS.txt for contributors.
* Copyright (C) 2016-2020 KiCad Developers, see AUTHORS.txt for contributors.
* @author Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
* @author Maciej Suminski <maciej.suminski@cern.ch>
*
@ -24,8 +24,8 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
#ifndef __CLASS_PCB_PAINTER_H
#define __CLASS_PCB_PAINTER_H
#ifndef PCB_PAINTER_H
#define PCB_PAINTER_H
#include <painter.h>
#include <pcb_display_options.h>
@ -187,46 +187,30 @@ public:
void SetZoneDisplayMode( ZONE_DISPLAY_MODE mode ) { m_zoneDisplayMode = mode; }
protected:
///> Flag determining if items on a given layer should be drawn as an outline or a filled item
bool m_sketchMode[GAL_LAYER_ID_END];
///> Flag determining if graphic items should be outlined or stroked
bool m_sketchGraphics;
///> Flag determining if text items should be outlined or stroked
bool m_sketchText;
///> Flag determining if pad numbers should be visible
bool m_padNumbers;
///> Flag determining if net names should be visible for pads
bool m_netNamesOnPads;
///> Flag determining if net names should be visible for tracks
bool m_netNamesOnTracks;
///> Flag determining if net names should be visible for vias
bool m_netNamesOnVias;
///> Flag determining if zones should have outlines drawn
bool m_zoneOutlines;
///> Flag determining if ratsnest lines should be drawn curved
bool m_curvedRatsnestlines = true;
///> Flag determining if ratsnest lines are shown by default
bool m_globalRatsnestlines = true;
bool m_drawIndividualViaLayers = false;
///> Maximum font size for netnames (and other dynamically shown strings)
static const double MAX_FONT_SIZE;
///> Option for different display modes for zones
ZONE_DISPLAY_MODE m_zoneDisplayMode;
bool m_sketchMode[GAL_LAYER_ID_END];
bool m_sketchGraphics;
bool m_sketchText;
///> Clearance visibility settings
int m_clearance;
bool m_padNumbers;
bool m_netNamesOnPads;
bool m_netNamesOnTracks;
bool m_netNamesOnVias;
bool m_zoneOutlines;
bool m_curvedRatsnestlines = true;
bool m_globalRatsnestlines = true;
bool m_drawIndividualViaLayers = false;
ZONE_DISPLAY_MODE m_zoneDisplayMode;
HIGH_CONTRAST_MODE m_contrastModeDisplay;
RATSNEST_MODE m_ratsnestDisplayMode;
int m_clearanceDisplayFlags;
///> How to display nets and netclasses with color overrides
NET_COLOR_MODE m_netColorMode;
@ -240,11 +224,6 @@ protected:
///> Set of net codes that should not have their ratsnest displayed
std::set<int> m_hiddenNets;
///> How to display inactive layers (HIGH_CONTRAST_MODE:NORMAL, DIMMED or HIDDEN )
HIGH_CONTRAST_MODE m_contrastModeDisplay;
RATSNEST_MODE m_ratsnestDisplayMode;
// These opacity overrides multiply with any opacity in the base layer color
double m_trackOpacity; ///< Opacity override for all tracks
double m_viaOpacity; ///< Opacity override for all types of via
@ -278,8 +257,6 @@ public:
virtual bool Draw( const VIEW_ITEM* aItem, int aLayer ) override;
protected:
PCB_RENDER_SETTINGS m_pcbSettings;
// Drawing functions for various types of PCB-specific items
void draw( const TRACK* aTrack, int aLayer );
void draw( const ARC* aArc, int aLayer );
@ -318,7 +295,10 @@ protected:
* Return drill diameter for a via (internal units).
*/
virtual int getDrillSize( const VIA* aVia ) const;
protected:
PCB_RENDER_SETTINGS m_pcbSettings;
};
} // namespace KIGFX
#endif /* __CLASS_PAINTER_H */
#endif /* PCB_PAINTER_H */

6
pcbnew/pcbnew_printout.cpp
View File

@ -278,8 +278,10 @@ std::unique_ptr<KIGFX::PAINTER> PCBNEW_PRINTOUT::getPainter( KIGFX::GAL* aGal )
}
KIGFX::PCB_PRINT_PAINTER::PCB_PRINT_PAINTER( GAL* aGal )
: PCB_PAINTER( aGal ), m_drillMarkReal( false ), m_drillMarkSize( 0 )
KIGFX::PCB_PRINT_PAINTER::PCB_PRINT_PAINTER( GAL* aGal ) :
PCB_PAINTER( aGal ),
m_drillMarkReal( false ),
m_drillMarkSize( 0 )
{
m_pcbSettings.EnableZoneOutlines( false );
}

2
pcbnew/pcbnew_settings.cpp
View File

@ -172,7 +172,7 @@ PCBNEW_SETTINGS::PCBNEW_SETTINGS()
m_params.emplace_back( new PARAM_ENUM<ZONE_DISPLAY_MODE>( "pcb_display.zone_mode",
&m_Display.m_ZoneDisplayMode, ZONE_DISPLAY_MODE::SHOW_FILLED,
ZONE_DISPLAY_MODE::SHOW_OUTLINED, ZONE_DISPLAY_MODE::SHOW_FILLED ) );
ZONE_DISPLAY_MODE::SHOW_FILLED_OUTLINE, ZONE_DISPLAY_MODE::SHOW_FILLED ) );
m_params.emplace_back( new PARAM<int>( "pcb_display.origin_mode",
reinterpret_cast<int*>( &m_Display.m_DisplayOrigin ),

12
pcbnew/tools/pcb_control.cpp
View File

@ -186,18 +186,26 @@ int PCB_CONTROL::ZoneDisplayMode( const TOOL_EVENT& aEvent )
// Apply new display options to the GAL canvas
if( aEvent.IsAction( &PCB_ACTIONS::zoneDisplayEnable ) )
{
opts.m_ZoneDisplayMode = ZONE_DISPLAY_MODE::SHOW_FILLED;
}
else if( aEvent.IsAction( &PCB_ACTIONS::zoneDisplayDisable ) )
opts.m_ZoneDisplayMode = ZONE_DISPLAY_MODE::HIDE_FILLED;
{
opts.m_ZoneDisplayMode = ZONE_DISPLAY_MODE::SHOW_ZONE_OUTLINE;
}
else if( aEvent.IsAction( &PCB_ACTIONS::zoneDisplayOutlines ) )
opts.m_ZoneDisplayMode = ZONE_DISPLAY_MODE::SHOW_OUTLINED;
{
opts.m_ZoneDisplayMode = ZONE_DISPLAY_MODE::SHOW_FILLED_OUTLINE;
}
else if( aEvent.IsAction( &PCB_ACTIONS::zoneDisplayToggle ) )
{
int nextMode = ( static_cast<int>( opts.m_ZoneDisplayMode ) + 1 ) % 3;
opts.m_ZoneDisplayMode = static_cast<ZONE_DISPLAY_MODE>( nextMode );
}
else
{
wxFAIL;
}
m_frame->SetDisplayOptions( opts );