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To avoid mistakes between graphic layers for pads, holes and not plated holes, rename 3 GAL_LAYER_ID names: 

LAYER_NON_PLATED to LAYER_NON_PLATEDHOLES
LAYER_PADS_HOLES to LAYER_PADS_PLATEDHOLES
LAYER_PADS to LAYER_PADS_TH
and add comments and fix a render issue in gal mode for non plated holes.
This commit is contained in:
jean-pierre charras 2017-11-29 09:48:41 +01:00
parent f992d144d9
commit 68268973b7
8 changed files with 46 additions and 42 deletions
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2
3d-viewer/3d_rendering/3d_render_raytracing/c3d_render_createscene.cpp
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@ -1018,7 +1018,7 @@ void C3D_RENDER_RAYTRACING::insert3DPadHole( const D_PAD* aPad )
if( m_settings.GetFlag( FL_USE_REALISTIC_MODE ) ) if( m_settings.GetFlag( FL_USE_REALISTIC_MODE ) )
objColor = (SFVEC3F)m_settings.m_CopperColor; objColor = (SFVEC3F)m_settings.m_CopperColor;
else else
objColor = m_settings.GetItemColor( LAYER_PADS ); objColor = m_settings.GetItemColor( LAYER_PADS_TH );
const wxSize drillsize = aPad->GetDrillSize(); const wxSize drillsize = aPad->GetDrillSize();
const bool hasHole = drillsize.x && drillsize.y; const bool hasHole = drillsize.x && drillsize.y;

2
common/class_colors_design_settings.cpp
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@ -217,7 +217,7 @@ void COLORS_DESIGN_SETTINGS::setupConfigParams()
Add( "Color4DPadBackEx", ITEM_COLOR( LAYER_PAD_BK ), GREEN ); Add( "Color4DPadBackEx", ITEM_COLOR( LAYER_PAD_BK ), GREEN );
Add( "Color4DAnchorEx", ITEM_COLOR( LAYER_ANCHOR ), BLUE ); Add( "Color4DAnchorEx", ITEM_COLOR( LAYER_ANCHOR ), BLUE );
Add( "Color4DPadFrontEx", ITEM_COLOR( LAYER_PAD_FR ), RED ); Add( "Color4DPadFrontEx", ITEM_COLOR( LAYER_PAD_FR ), RED );
Add( "Color4DNonPlatedEx", ITEM_COLOR( LAYER_NON_PLATED ), YELLOW ); Add( "Color4DNonPlatedEx", ITEM_COLOR( LAYER_NON_PLATEDHOLES ), YELLOW );
Add( "Color4DPCBBackground", ITEM_COLOR( LAYER_PCB_BACKGROUND ), BLACK ); Add( "Color4DPCBBackground", ITEM_COLOR( LAYER_PCB_BACKGROUND ), BLACK );
Add( "Color4DPCBCursor", ITEM_COLOR( LAYER_CURSOR ), WHITE ); Add( "Color4DPCBCursor", ITEM_COLOR( LAYER_CURSOR ), WHITE );
Add( "Color4DAuxItems", ITEM_COLOR( LAYER_AUX_ITEMS ), WHITE ); Add( "Color4DAuxItems", ITEM_COLOR( LAYER_AUX_ITEMS ), WHITE );

13
include/layers_id_colors_and_visibility.h
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@ -171,7 +171,7 @@ enum GAL_LAYER_ID: int
LAYER_VIA_MICROVIA, ///< to draw micro vias LAYER_VIA_MICROVIA, ///< to draw micro vias
LAYER_VIA_BBLIND, ///< to draw blind/buried vias LAYER_VIA_BBLIND, ///< to draw blind/buried vias
LAYER_VIA_THROUGH, ///< to draw usual through hole vias LAYER_VIA_THROUGH, ///< to draw usual through hole vias
LAYER_NON_PLATED, ///< handle color for not plated holes LAYER_NON_PLATEDHOLES, ///< handle color for not plated holes (holes, not pads)
LAYER_MOD_TEXT_FR, LAYER_MOD_TEXT_FR,
LAYER_MOD_TEXT_BK, LAYER_MOD_TEXT_BK,
LAYER_MOD_TEXT_INVISIBLE, ///< text marked as invisible LAYER_MOD_TEXT_INVISIBLE, ///< text marked as invisible
@ -187,8 +187,8 @@ enum GAL_LAYER_ID: int
LAYER_MOD_VALUES, ///< show modules values (when texts are visibles) LAYER_MOD_VALUES, ///< show modules values (when texts are visibles)
LAYER_MOD_REFERENCES, ///< show modules references (when texts are visibles) LAYER_MOD_REFERENCES, ///< show modules references (when texts are visibles)
LAYER_TRACKS, LAYER_TRACKS,
LAYER_PADS, ///< multilayer pads, usually with holes LAYER_PADS_TH, ///< multilayer pads, usually with holes
LAYER_PADS_HOLES, ///< to draw pad holes (plated or not plated) LAYER_PADS_PLATEDHOLES, ///< to draw pad holes (plated)
LAYER_VIAS_HOLES, ///< to draw via holes (pad holes do not use this layer) LAYER_VIAS_HOLES, ///< to draw via holes (pad holes do not use this layer)
LAYER_DRC, ///< drc markers LAYER_DRC, ///< drc markers
LAYER_WORKSHEET, ///< worksheet frame LAYER_WORKSHEET, ///< worksheet frame
@ -303,8 +303,9 @@ enum GERBVIEW_LAYER_ID: int
// Here is a mask to set them visible, to be sure they are displayed // Here is a mask to set them visible, to be sure they are displayed
// after loading a board for instance // after loading a board for instance
#define MIN_VISIBILITY_MASK int( (1 << GAL_LAYER_INDEX( LAYER_TRACKS ) ) +\ #define MIN_VISIBILITY_MASK int( (1 << GAL_LAYER_INDEX( LAYER_TRACKS ) ) +\
( 1 << GAL_LAYER_INDEX( LAYER_PADS ) ) +\ ( 1 << GAL_LAYER_INDEX( LAYER_PADS_TH ) ) +\
( 1 << GAL_LAYER_INDEX( LAYER_PADS_HOLES ) ) +\ ( 1 << GAL_LAYER_INDEX( LAYER_PADS_PLATEDHOLES ) ) +\
( 1 << GAL_LAYER_INDEX( LAYER_NON_PLATEDHOLES ) ) +\
( 1 << GAL_LAYER_INDEX( LAYER_VIAS_HOLES ) ) +\ ( 1 << GAL_LAYER_INDEX( LAYER_VIAS_HOLES ) ) +\
( 1 << GAL_LAYER_INDEX( LAYER_DRC ) ) +\ ( 1 << GAL_LAYER_INDEX( LAYER_DRC ) ) +\
( 1 << GAL_LAYER_INDEX( LAYER_WORKSHEET ) ) +\ ( 1 << GAL_LAYER_INDEX( LAYER_WORKSHEET ) ) +\
@ -755,7 +756,7 @@ inline int GetNetnameLayer( int aLayer )
{ {
if( IsCopperLayer( aLayer ) ) if( IsCopperLayer( aLayer ) )
return NETNAMES_LAYER_INDEX( aLayer ); return NETNAMES_LAYER_INDEX( aLayer );
else if( aLayer == LAYER_PADS ) else if( aLayer == LAYER_PADS_TH )
return LAYER_PADS_NETNAMES; return LAYER_PADS_NETNAMES;
else if( aLayer == LAYER_PAD_FR ) else if( aLayer == LAYER_PAD_FR )
return LAYER_PAD_FR_NETNAMES; return LAYER_PAD_FR_NETNAMES;

11
pcbnew/class_pad.cpp
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@ -1215,14 +1215,17 @@ void D_PAD::ViewGetLayers( int aLayers[], int& aCount ) const
{ {
aCount = 0; aCount = 0;
// These types of pads contain a hole // These 2 types of pads contain a hole
if( m_Attribute == PAD_ATTRIB_STANDARD || m_Attribute == PAD_ATTRIB_HOLE_NOT_PLATED ) if( m_Attribute == PAD_ATTRIB_STANDARD )
aLayers[aCount++] = LAYER_PADS_HOLES; aLayers[aCount++] = LAYER_PADS_PLATEDHOLES;
if( m_Attribute == PAD_ATTRIB_HOLE_NOT_PLATED )
aLayers[aCount++] = LAYER_NON_PLATEDHOLES;
if( IsOnLayer( F_Cu ) && IsOnLayer( B_Cu ) ) if( IsOnLayer( F_Cu ) && IsOnLayer( B_Cu ) )
{ {
// Multi layer pad // Multi layer pad
aLayers[aCount++] = LAYER_PADS; aLayers[aCount++] = LAYER_PADS_TH;
aLayers[aCount++] = LAYER_PADS_NETNAMES; aLayers[aCount++] = LAYER_PADS_NETNAMES;
} }
else if( IsOnLayer( F_Cu ) ) else if( IsOnLayer( F_Cu ) )

4
pcbnew/class_pad_draw_functions.cpp
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@ -278,10 +278,10 @@ void D_PAD::Draw( EDA_DRAW_PANEL* aPanel, wxDC* aDC, GR_DRAWMODE aDraw_mode,
DisplayIsol = false; DisplayIsol = false;
if( ( GetAttribute() == PAD_ATTRIB_HOLE_NOT_PLATED ) && if( ( GetAttribute() == PAD_ATTRIB_HOLE_NOT_PLATED ) &&
brd->IsElementVisible( LAYER_NON_PLATED ) ) brd->IsElementVisible( LAYER_NON_PLATEDHOLES ) )
{ {
drawInfo.m_ShowNotPlatedHole = true; drawInfo.m_ShowNotPlatedHole = true;
drawInfo.m_NPHoleColor = cds.GetItemColor( LAYER_NON_PLATED ); drawInfo.m_NPHoleColor = cds.GetItemColor( LAYER_NON_PLATEDHOLES );
} }
drawInfo.m_DrawMode = aDraw_mode; drawInfo.m_DrawMode = aDraw_mode;

6
pcbnew/class_pcb_layer_widget.cpp
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@ -62,17 +62,17 @@ const LAYER_WIDGET::ROW PCB_LAYER_WIDGET::s_render_rows[] = {
RR( _( "Through Via" ), LAYER_VIA_THROUGH, WHITE, _( "Show through vias" ) ), RR( _( "Through Via" ), LAYER_VIA_THROUGH, WHITE, _( "Show through vias" ) ),
RR( _( "Bl/Buried Via" ), LAYER_VIA_BBLIND, WHITE, _( "Show blind or buried vias" ) ), RR( _( "Bl/Buried Via" ), LAYER_VIA_BBLIND, WHITE, _( "Show blind or buried vias" ) ),
RR( _( "Micro Via" ), LAYER_VIA_MICROVIA, WHITE, _( "Show micro vias") ), RR( _( "Micro Via" ), LAYER_VIA_MICROVIA, WHITE, _( "Show micro vias") ),
RR( _( "Non Plated Holes" ),LAYER_NON_PLATED, WHITE, _( "Show non plated holes in specific color") ), RR( _( "Non Plated Holes" ),LAYER_NON_PLATEDHOLES,WHITE, _( "Show non plated holes in specific color") ),
RR( _( "Plated Holes" ), LAYER_PADS, YELLOW, _( "Show plated holes in specific color") ),
RR( _( "Ratsnest" ), LAYER_RATSNEST, WHITE, _( "Show unconnected nets as a ratsnest") ), RR( _( "Ratsnest" ), LAYER_RATSNEST, WHITE, _( "Show unconnected nets as a ratsnest") ),
RR( _( "No-Connects" ), LAYER_NO_CONNECTS, BLUE, _( "Show a marker on pads which have no net connected" ) ), RR( _( "No-Connects" ), LAYER_NO_CONNECTS, BLUE, _( "Show a marker on pads which have no net connected" ) ),
RR( _( "Pads Front" ), LAYER_PAD_FR, WHITE, _( "Show footprint pads on board's front" ) ), RR( _( "Pads Front" ), LAYER_PAD_FR, WHITE, _( "Show footprint pads on board's front" ) ),
RR( _( "Through Hole Pads" ),LAYER_PADS_TH, YELLOW, _( "Show through hole pads in specific color") ),
RR( _( "Pads Back" ), LAYER_PAD_BK, WHITE, _( "Show footprint pads on board's back" ) ), RR( _( "Pads Back" ), LAYER_PAD_BK, WHITE, _( "Show footprint pads on board's back" ) ),
RR( _( "Text Front" ), LAYER_MOD_TEXT_FR, NOCOLOR, _( "Show footprint text on board's front" ) ), RR( _( "Text Front" ), LAYER_MOD_TEXT_FR, NOCOLOR, _( "Show footprint text on board's front" ) ),
RR( _( "Text Back" ), LAYER_MOD_TEXT_BK, NOCOLOR, _( "Show footprint text on board's back" ) ), RR( _( "Text Back" ), LAYER_MOD_TEXT_BK, NOCOLOR, _( "Show footprint text on board's back" ) ),
RR( _( "Hidden Text" ), LAYER_MOD_TEXT_INVISIBLE, WHITE, _( "Show footprint text marked as invisible" ) ), RR( _( "Hidden Text" ), LAYER_MOD_TEXT_INVISIBLE, WHITE, _( "Show footprint text marked as invisible" ) ),
RR( _( "Anchors" ), LAYER_ANCHOR, WHITE, _( "Show footprint and text origins as a cross" ) ), RR( _( "Anchors" ), LAYER_ANCHOR, WHITE, _( "Show footprint and text origins as a cross" ) ),
RR( _( "Grid" ), LAYER_GRID, WHITE, _( "Show the (x,y) grid dots" ) ), RR( _( "Grid" ), LAYER_GRID, WHITE, _( "Show the (x,y) grid dots" ) ),

20
pcbnew/pcb_draw_panel_gal.cpp
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@ -53,9 +53,9 @@ const LAYER_NUM GAL_LAYER_ORDER[] =
LAYER_MOD_REFERENCES, LAYER_MOD_VALUES, LAYER_MOD_REFERENCES, LAYER_MOD_VALUES,
LAYER_RATSNEST, LAYER_ANCHOR, LAYER_RATSNEST, LAYER_ANCHOR,
LAYER_VIAS_HOLES, LAYER_PADS_HOLES, LAYER_NON_PLATED, LAYER_VIAS_HOLES, LAYER_PADS_PLATEDHOLES, LAYER_NON_PLATEDHOLES,
LAYER_VIA_THROUGH, LAYER_VIA_BBLIND, LAYER_VIA_THROUGH, LAYER_VIA_BBLIND,
LAYER_VIA_MICROVIA, LAYER_PADS, LAYER_VIA_MICROVIA, LAYER_PADS_TH,
LAYER_PAD_FR_NETNAMES, LAYER_PAD_FR, LAYER_PAD_FR_NETNAMES, LAYER_PAD_FR,
NETNAMES_LAYER_INDEX( F_Cu ), F_Cu, F_Mask, F_SilkS, F_Paste, F_Adhes, NETNAMES_LAYER_INDEX( F_Cu ), F_Cu, F_Mask, F_SilkS, F_Paste, F_Adhes,
@ -199,8 +199,8 @@ void PCB_DRAW_PANEL_GAL::SetHighContrastLayer( PCB_LAYER_ID aLayer )
LAYER_NUM layers[] = { LAYER_NUM layers[] = {
GetNetnameLayer( aLayer ), GetNetnameLayer( aLayer ),
LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES, LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES,
LAYER_PADS, LAYER_PADS_HOLES, LAYER_PADS_NETNAMES, LAYER_PADS_TH, LAYER_PADS_PLATEDHOLES, LAYER_PADS_NETNAMES,
LAYER_NON_PLATED, LAYER_GP_OVERLAY, LAYER_RATSNEST LAYER_NON_PLATEDHOLES, LAYER_GP_OVERLAY, LAYER_RATSNEST
}; };
for( unsigned int i = 0; i < sizeof( layers ) / sizeof( LAYER_NUM ); ++i ) for( unsigned int i = 0; i < sizeof( layers ) / sizeof( LAYER_NUM ); ++i )
@ -234,8 +234,8 @@ void PCB_DRAW_PANEL_GAL::SetTopLayer( PCB_LAYER_ID aLayer )
// Layers that should always have on-top attribute enabled // Layers that should always have on-top attribute enabled
const LAYER_NUM layers[] = { const LAYER_NUM layers[] = {
LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES, LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES,
LAYER_PADS, LAYER_PADS_HOLES, LAYER_PADS_NETNAMES, LAYER_PADS_TH, LAYER_PADS_PLATEDHOLES, LAYER_PADS_NETNAMES,
LAYER_NON_PLATED, LAYER_GP_OVERLAY, LAYER_RATSNEST, LAYER_NON_PLATEDHOLES, LAYER_GP_OVERLAY, LAYER_RATSNEST,
LAYER_DRC LAYER_DRC
}; };
@ -300,7 +300,7 @@ void PCB_DRAW_PANEL_GAL::SyncLayersVisibility( const BOARD* aBoard )
} }
// Enable some layers that are GAL specific // Enable some layers that are GAL specific
m_view->SetLayerVisible( LAYER_PADS_HOLES, true ); m_view->SetLayerVisible( LAYER_PADS_PLATEDHOLES, true );
m_view->SetLayerVisible( LAYER_VIAS_HOLES, true ); m_view->SetLayerVisible( LAYER_VIAS_HOLES, true );
m_view->SetLayerVisible( LAYER_WORKSHEET, true ); m_view->SetLayerVisible( LAYER_WORKSHEET, true );
m_view->SetLayerVisible( LAYER_GP_OVERLAY, true ); m_view->SetLayerVisible( LAYER_GP_OVERLAY, true );
@ -411,9 +411,9 @@ void PCB_DRAW_PANEL_GAL::setDefaultLayerDeps()
// Some more required layers settings // Some more required layers settings
m_view->SetRequired( LAYER_VIAS_HOLES, LAYER_VIA_THROUGH ); m_view->SetRequired( LAYER_VIAS_HOLES, LAYER_VIA_THROUGH );
m_view->SetRequired( LAYER_VIAS_NETNAMES, LAYER_VIA_THROUGH ); m_view->SetRequired( LAYER_VIAS_NETNAMES, LAYER_VIA_THROUGH );
m_view->SetRequired( LAYER_PADS_HOLES, LAYER_PADS ); m_view->SetRequired( LAYER_PADS_PLATEDHOLES, LAYER_PADS_TH );
m_view->SetRequired( LAYER_NON_PLATED, LAYER_PADS ); m_view->SetRequired( LAYER_NON_PLATEDHOLES, LAYER_PADS_TH );
m_view->SetRequired( LAYER_PADS_NETNAMES, LAYER_PADS ); m_view->SetRequired( LAYER_PADS_NETNAMES, LAYER_PADS_TH );
// Front modules // Front modules
m_view->SetRequired( LAYER_PAD_FR, LAYER_MOD_FR ); m_view->SetRequired( LAYER_PAD_FR, LAYER_MOD_FR );

30
pcbnew/pcb_painter.cpp
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@ -89,13 +89,13 @@ void PCB_RENDER_SETTINGS::ImportLegacyColors( const COLORS_DESIGN_SETTINGS* aSet
// Default colors for specific layers (not really board layers). // Default colors for specific layers (not really board layers).
m_layerColors[LAYER_VIAS_HOLES] = COLOR4D( 0.5, 0.4, 0.0, 0.8 ); m_layerColors[LAYER_VIAS_HOLES] = COLOR4D( 0.5, 0.4, 0.0, 0.8 );
m_layerColors[LAYER_PADS_HOLES] = COLOR4D( 0.0, 0.0, 0.0, 1.0 ); m_layerColors[LAYER_PADS_PLATEDHOLES] = COLOR4D( 0.0, 0.0, 0.0, 1.0 );
m_layerColors[LAYER_PADS_NETNAMES] = COLOR4D( 1.0, 1.0, 1.0, 0.9 ); m_layerColors[LAYER_PADS_NETNAMES] = COLOR4D( 1.0, 1.0, 1.0, 0.9 );
m_layerColors[LAYER_PAD_FR_NETNAMES] = COLOR4D( 1.0, 1.0, 1.0, 0.9 ); m_layerColors[LAYER_PAD_FR_NETNAMES] = COLOR4D( 1.0, 1.0, 1.0, 0.9 );
m_layerColors[LAYER_PAD_BK_NETNAMES] = COLOR4D( 1.0, 1.0, 1.0, 0.9 ); m_layerColors[LAYER_PAD_BK_NETNAMES] = COLOR4D( 1.0, 1.0, 1.0, 0.9 );
m_layerColors[LAYER_DRC] = COLOR4D( 1.0, 0.0, 0.0, 0.8 ); m_layerColors[LAYER_DRC] = COLOR4D( 1.0, 0.0, 0.0, 0.8 );
// LAYER_PADS, LAYER_NON_PLATED, LAYER_ANCHOR],LAYER_RATSNEST, // LAYER_PADS_TH, LAYER_NON_PLATEDHOLES, LAYER_ANCHOR],LAYER_RATSNEST,
// LAYER_VIA_THROUGH], LAYER_VIA_BBLIND, LAYER_VIA_MICROVIA // LAYER_VIA_THROUGH], LAYER_VIA_BBLIND, LAYER_VIA_MICROVIA
// are initialized from aSettings // are initialized from aSettings
@ -133,7 +133,7 @@ void PCB_RENDER_SETTINGS::LoadDisplayOptions( const PCB_DISPLAY_OPTIONS* aOption
m_sketchFpGfx = !aOptions->m_DisplayModEdgeFill; m_sketchFpGfx = !aOptions->m_DisplayModEdgeFill;
// Whether to draw tracks, vias & pads filled or as outlines // Whether to draw tracks, vias & pads filled or as outlines
m_sketchMode[LAYER_PADS] = !aOptions->m_DisplayPadFill; m_sketchMode[LAYER_PADS_TH] = !aOptions->m_DisplayPadFill;
m_sketchMode[LAYER_VIA_THROUGH] = !aOptions->m_DisplayViaFill; m_sketchMode[LAYER_VIA_THROUGH] = !aOptions->m_DisplayViaFill;
m_sketchMode[LAYER_VIA_BBLIND] = !aOptions->m_DisplayViaFill; m_sketchMode[LAYER_VIA_BBLIND] = !aOptions->m_DisplayViaFill;
m_sketchMode[LAYER_VIA_MICROVIA] = !aOptions->m_DisplayViaFill; m_sketchMode[LAYER_VIA_MICROVIA] = !aOptions->m_DisplayViaFill;
@ -657,20 +657,20 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
COLOR4D color = m_pcbSettings.GetColor( aPad, aLayer ); COLOR4D color = m_pcbSettings.GetColor( aPad, aLayer );
// Pad holes color is specific // Pad holes color is specific
if( aLayer == LAYER_PADS_HOLES || aLayer == LAYER_NON_PLATED ) if( aLayer == LAYER_PADS_PLATEDHOLES || aLayer == LAYER_NON_PLATEDHOLES )
{ {
// Hole color is the background color for plated holes, but a specific color // Hole color is the background color for plated holes, but a specific color
// for not plated holes (LAYER_NON_PLATED color layer ) // for not plated holes (LAYER_NON_PLATEDHOLES color layer )
if( aPad->GetAttribute() == PAD_ATTRIB_HOLE_NOT_PLATED /*&& if( aPad->GetAttribute() == PAD_ATTRIB_HOLE_NOT_PLATED /*&&
brd->IsElementVisible( LAYER_NON_PLATED )*/ ) brd->IsElementVisible( LAYER_NON_PLATEDHOLES )*/ )
color = m_pcbSettings.GetColor( nullptr, LAYER_NON_PLATED ); color = m_pcbSettings.GetColor( nullptr, LAYER_NON_PLATEDHOLES );
else else
color = m_pcbSettings.GetBackgroundColor(); color = m_pcbSettings.GetBackgroundColor();
} }
VECTOR2D size; VECTOR2D size;
if( m_pcbSettings.m_sketchMode[LAYER_PADS] ) if( m_pcbSettings.m_sketchMode[LAYER_PADS_TH] )
{ {
// Outline mode // Outline mode
m_gal->SetIsFill( false ); m_gal->SetIsFill( false );
@ -693,7 +693,7 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
int custom_margin = 0; // a clearance/margin for custom shape, for solder paste/mask int custom_margin = 0; // a clearance/margin for custom shape, for solder paste/mask
// Choose drawing settings depending on if we are drawing a pad itself or a hole // Choose drawing settings depending on if we are drawing a pad itself or a hole
if( aLayer == LAYER_PADS_HOLES || aLayer == LAYER_NON_PLATED ) if( aLayer == LAYER_PADS_PLATEDHOLES || aLayer == LAYER_NON_PLATEDHOLES )
{ {
// Drawing hole: has same shape as PAD_CIRCLE or PAD_OVAL // Drawing hole: has same shape as PAD_CIRCLE or PAD_OVAL
size = VECTOR2D( aPad->GetDrillSize() ) / 2.0; size = VECTOR2D( aPad->GetDrillSize() ) / 2.0;
@ -738,7 +738,7 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
m = ( size.y - size.x ); m = ( size.y - size.x );
n = size.x; n = size.x;
if( m_pcbSettings.m_sketchMode[LAYER_PADS] ) if( m_pcbSettings.m_sketchMode[LAYER_PADS_TH] )
{ {
// Outline mode // Outline mode
m_gal->DrawArc( VECTOR2D( 0, -m ), n, -M_PI, 0 ); m_gal->DrawArc( VECTOR2D( 0, -m ), n, -M_PI, 0 );
@ -759,7 +759,7 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
m = ( size.x - size.y ); m = ( size.x - size.y );
n = size.y; n = size.y;
if( m_pcbSettings.m_sketchMode[LAYER_PADS] ) if( m_pcbSettings.m_sketchMode[LAYER_PADS_TH] )
{ {
// Outline mode // Outline mode
m_gal->DrawArc( VECTOR2D( -m, 0 ), n, M_PI / 2, 3 * M_PI / 2 ); m_gal->DrawArc( VECTOR2D( -m, 0 ), n, M_PI / 2, 3 * M_PI / 2 );
@ -790,7 +790,7 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
TransformRoundRectToPolygon( polySet, wxPoint( 0, 0 ), prsize, TransformRoundRectToPolygon( polySet, wxPoint( 0, 0 ), prsize,
0.0, corner_radius, segmentToCircleCount ); 0.0, corner_radius, segmentToCircleCount );
if( m_pcbSettings.m_sketchMode[LAYER_PADS] ) if( m_pcbSettings.m_sketchMode[LAYER_PADS_TH] )
{ {
if( polySet.OutlineCount() > 0 ) if( polySet.OutlineCount() > 0 )
m_gal->DrawPolyline( polySet.Outline( 0 ) ); m_gal->DrawPolyline( polySet.Outline( 0 ) );
@ -840,7 +840,7 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
} }
} }
if( m_pcbSettings.m_sketchMode[LAYER_PADS] ) if( m_pcbSettings.m_sketchMode[LAYER_PADS_TH] )
{ {
// Add the beginning point to close the outline // Add the beginning point to close the outline
pointList.push_back( pointList.front() ); pointList.push_back( pointList.front() );
@ -867,7 +867,7 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
polySet.Append( VECTOR2I( corners[2] ) ); polySet.Append( VECTOR2I( corners[2] ) );
polySet.Append( VECTOR2I( corners[3] ) ); polySet.Append( VECTOR2I( corners[3] ) );
if( m_pcbSettings.m_sketchMode[LAYER_PADS] ) if( m_pcbSettings.m_sketchMode[LAYER_PADS_TH] )
m_gal->DrawPolyline( polySet.COutline( 0 ) ); m_gal->DrawPolyline( polySet.COutline( 0 ) );
else else
m_gal->DrawPolygon( polySet ); m_gal->DrawPolygon( polySet );
@ -889,7 +889,7 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
if( ( m_pcbSettings.m_clearance & clearanceFlags ) == clearanceFlags if( ( m_pcbSettings.m_clearance & clearanceFlags ) == clearanceFlags
&& ( aLayer == LAYER_PAD_FR && ( aLayer == LAYER_PAD_FR
|| aLayer == LAYER_PAD_BK || aLayer == LAYER_PAD_BK
|| aLayer == LAYER_PADS ) ) || aLayer == LAYER_PADS_TH ) )
{ {
SHAPE_POLY_SET polySet; SHAPE_POLY_SET polySet;
constexpr int SEGCOUNT = 64; constexpr int SEGCOUNT = 64;