Performance for large hierarchies: ERC
Share constructs between ERC tests. Large SCH_SHEET_LISTs, in particular, can be very expensive to construct.
This commit is contained in:
Jeff Young
parent
9b8f1109e6
commit
68fbe98b1d
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@ -136,12 +136,9 @@ extern void CheckDuplicatePins( LIB_SYMBOL* aSymbol, std::vector<wxString>& aMes
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int ERC_TESTER::TestDuplicateSheetNames( bool aCreateMarker )
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{
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SCH_SCREEN* screen;
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int err_count = 0;
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int err_count = 0;
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SCH_SCREENS screenList( m_schematic->Root() );
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for( screen = screenList.GetFirst(); screen != nullptr; screen = screenList.GetNext() )
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for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
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{
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std::vector<SCH_SHEET*> list;
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@ -202,7 +199,7 @@ void ERC_TESTER::TestTextVars( DS_PROXY_VIEW_ITEM* aDrawingSheet )
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wsItems.BuildDrawItemsList( aDrawingSheet->GetPageInfo(), aDrawingSheet->GetTitleBlock() );
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}
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for( SCH_SHEET_PATH& sheet : m_schematic->GetSheets() )
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for( const SCH_SHEET_PATH& sheet : m_sheetList )
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{
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SCH_SCREEN* screen = sheet.LastScreen();
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@ -305,13 +302,11 @@ void ERC_TESTER::TestTextVars( DS_PROXY_VIEW_ITEM* aDrawingSheet )
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int ERC_TESTER::TestConflictingBusAliases()
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{
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wxString msg;
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int err_count = 0;
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wxString msg;
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int err_count = 0;
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std::vector<std::shared_ptr<BUS_ALIAS>> aliases;
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SCH_SCREENS screens( m_schematic->Root() );
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std::vector< std::shared_ptr<BUS_ALIAS> > aliases;
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for( SCH_SCREEN* screen = screens.GetFirst(); screen != nullptr; screen = screens.GetNext() )
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for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
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{
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const auto& screen_aliases = screen->GetBusAliases();
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@ -352,13 +347,9 @@ int ERC_TESTER::TestConflictingBusAliases()
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int ERC_TESTER::TestMultiunitFootprints()
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{
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SCH_SHEET_LIST sheets = m_schematic->GetSheets();
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int errors = 0;
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SCH_MULTI_UNIT_REFERENCE_MAP refMap;
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sheets.GetMultiUnitSymbols( refMap, true );
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for( std::pair<const wxString, SCH_REFERENCE_LIST>& symbol : refMap )
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for( std::pair<const wxString, SCH_REFERENCE_LIST>& symbol : m_refMap )
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{
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SCH_REFERENCE_LIST& refList = symbol.second;
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@ -417,14 +408,9 @@ int ERC_TESTER::TestMultiunitFootprints()
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int ERC_TESTER::TestMissingUnits()
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{
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ERC_SETTINGS& settings = m_schematic->ErcSettings();
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SCH_SHEET_LIST sheets = m_schematic->GetSheets();
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int errors = 0;
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SCH_MULTI_UNIT_REFERENCE_MAP refMap;
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sheets.GetMultiUnitSymbols( refMap, true );
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for( std::pair<const wxString, SCH_REFERENCE_LIST>& symbol : refMap )
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for( std::pair<const wxString, SCH_REFERENCE_LIST>& symbol : m_refMap )
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{
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SCH_REFERENCE_LIST& refList = symbol.second;
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@ -442,38 +428,38 @@ int ERC_TESTER::TestMissingUnits()
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std::set<int> instance_units;
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std::set<int> missing_units;
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auto report_missing = [&]( std::set<int>& aMissingUnits, wxString aErrorMsg,
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int aErrorCode )
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{
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wxString msg;
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wxString missing_pin_units = wxS( "[ " );
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int ii = 0;
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for( int missing_unit : aMissingUnits )
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{
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if( ii++ == 3 )
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auto report_missing =
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[&]( std::set<int>& aMissingUnits, wxString aErrorMsg, int aErrorCode )
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{
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missing_pin_units += wxS( "....." );
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break;
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}
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wxString msg;
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wxString missing_pin_units = wxS( "[ " );
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int ii = 0;
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missing_pin_units += libSymbol->GetUnitDisplayName( missing_unit ) + ", " ;
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}
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for( int missing_unit : aMissingUnits )
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{
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if( ii++ == 3 )
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{
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missing_pin_units += wxS( "....." );
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break;
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}
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missing_pin_units.Truncate( missing_pin_units.length() - 2 );
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missing_pin_units += wxS( " ]" );
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missing_pin_units += libSymbol->GetUnitDisplayName( missing_unit ) + ", " ;
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}
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msg.Printf( aErrorMsg, symbol.first, missing_pin_units );
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missing_pin_units.Truncate( missing_pin_units.length() - 2 );
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missing_pin_units += wxS( " ]" );
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std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( aErrorCode );
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ercItem->SetErrorMessage( msg );
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ercItem->SetItems( unit );
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msg.Printf( aErrorMsg, symbol.first, missing_pin_units );
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SCH_MARKER* marker = new SCH_MARKER( ercItem, unit->GetPosition() );
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base_ref.GetSheetPath().LastScreen()->Append( marker );
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std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( aErrorCode );
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ercItem->SetErrorMessage( msg );
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ercItem->SetItems( unit );
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++errors;
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};
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SCH_MARKER* marker = new SCH_MARKER( ercItem, unit->GetPosition() );
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base_ref.GetSheetPath().LastScreen()->Append( marker );
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++errors;
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};
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for( int ii = 1; ii <= libSymbol->GetUnitCount(); ++ii )
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lib_units.insert( lib_units.end(), ii );
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@ -485,7 +471,7 @@ int ERC_TESTER::TestMissingUnits()
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instance_units.begin(), instance_units.end(),
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std::inserter( missing_units, missing_units.begin() ) );
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if( !missing_units.empty() && settings.IsTestEnabled( ERCE_MISSING_UNIT ) )
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if( !missing_units.empty() && m_settings.IsTestEnabled( ERCE_MISSING_UNIT ) )
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{
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report_missing( missing_units, _( "Symbol %s has unplaced units %s" ),
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ERCE_MISSING_UNIT );
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@ -530,21 +516,21 @@ int ERC_TESTER::TestMissingUnits()
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}
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}
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if( !missing_power.empty() && settings.IsTestEnabled( ERCE_MISSING_POWER_INPUT_PIN ) )
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if( !missing_power.empty() && m_settings.IsTestEnabled( ERCE_MISSING_POWER_INPUT_PIN ) )
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{
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report_missing( missing_power,
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_( "Symbol %s has input power pins in units %s that are not placed." ),
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ERCE_MISSING_POWER_INPUT_PIN );
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}
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if( !missing_input.empty() && settings.IsTestEnabled( ERCE_MISSING_INPUT_PIN ) )
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if( !missing_input.empty() && m_settings.IsTestEnabled( ERCE_MISSING_INPUT_PIN ) )
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{
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report_missing( missing_input,
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_( "Symbol %s has input pins in units %s that are not placed." ),
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ERCE_MISSING_INPUT_PIN );
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}
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if( !missing_bidi.empty() && settings.IsTestEnabled( ERCE_MISSING_BIDI_PIN ) )
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if( !missing_bidi.empty() && m_settings.IsTestEnabled( ERCE_MISSING_BIDI_PIN ) )
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{
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report_missing( missing_bidi,
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_( "Symbol %s has bidirectional pins in units %s that are not "
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@ -578,7 +564,7 @@ int ERC_TESTER::TestMissingNetclasses()
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sheet.LastScreen()->Append( marker );
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};
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for( const SCH_SHEET_PATH& sheet : m_schematic->GetSheets() )
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for( const SCH_SHEET_PATH& sheet : m_sheetList )
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{
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for( SCH_ITEM* item : sheet.LastScreen()->Items() )
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{
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@ -614,7 +600,7 @@ int ERC_TESTER::TestFourWayJunction()
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{
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int err_count = 0;
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for( const SCH_SHEET_PATH& sheet : m_schematic->GetSheets() )
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for( const SCH_SHEET_PATH& sheet : m_sheetList )
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{
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std::map<VECTOR2I, std::vector<SCH_ITEM*>> connMap;
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SCH_SCREEN* screen = sheet.LastScreen();
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@ -668,7 +654,7 @@ int ERC_TESTER::TestNoConnectPins()
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{
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int err_count = 0;
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for( const SCH_SHEET_PATH& sheet : m_schematic->GetSheets() )
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for( const SCH_SHEET_PATH& sheet : m_sheetList )
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{
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std::map<VECTOR2I, std::vector<SCH_ITEM*>> pinMap;
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@ -735,12 +721,9 @@ int ERC_TESTER::TestNoConnectPins()
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int ERC_TESTER::TestPinToPin()
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{
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ERC_SETTINGS& settings = m_schematic->ErcSettings();
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const NET_MAP& nets = m_schematic->ConnectionGraph()->GetNetMap();
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int errors = 0;
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for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : nets )
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for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : m_nets )
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{
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std::vector<ERC_SCH_PIN_CONTEXT> pins;
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std::unordered_map<EDA_ITEM*, SCH_SCREEN*> pinToScreenMap;
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@ -836,9 +819,9 @@ int ERC_TESTER::TestPinToPin()
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else
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hasDriver |= DrivingPinTypes.contains( testType );
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PIN_ERROR erc = settings.GetPinMapValue( refType, testType );
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PIN_ERROR erc = m_settings.GetPinMapValue( refType, testType );
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if( erc != PIN_ERROR::OK && settings.IsTestEnabled( ERCE_PIN_TO_PIN_WARNING ) )
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if( erc != PIN_ERROR::OK && m_settings.IsTestEnabled( ERCE_PIN_TO_PIN_WARNING ) )
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{
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std::shared_ptr<ERC_ITEM> ercItem =
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ERC_ITEM::Create( erc == PIN_ERROR::WARNING ? ERCE_PIN_TO_PIN_WARNING :
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@ -863,7 +846,7 @@ int ERC_TESTER::TestPinToPin()
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{
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int err_code = ispowerNet ? ERCE_POWERPIN_NOT_DRIVEN : ERCE_PIN_NOT_DRIVEN;
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if( settings.IsTestEnabled( err_code ) )
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if( m_settings.IsTestEnabled( err_code ) )
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{
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std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( err_code );
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@ -884,13 +867,11 @@ int ERC_TESTER::TestPinToPin()
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int ERC_TESTER::TestMultUnitPinConflicts()
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{
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const NET_MAP& nets = m_schematic->ConnectionGraph()->GetNetMap();
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int errors = 0;
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std::unordered_map<wxString, std::pair<wxString, SCH_PIN*>> pinToNetMap;
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for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : nets )
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for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : m_nets )
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{
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const wxString& netName = net.first.Name;
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@ -943,13 +924,11 @@ int ERC_TESTER::TestMultUnitPinConflicts()
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int ERC_TESTER::TestSimilarLabels()
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{
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const NET_MAP& nets = m_schematic->ConnectionGraph()->GetNetMap();
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int errors = 0;
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std::unordered_map<wxString, std::pair<SCH_LABEL_BASE*, SCH_SHEET_PATH>> labelMap;
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for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : nets )
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for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : m_nets )
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{
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for( CONNECTION_SUBGRAPH* subgraph : net.second )
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{
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@ -1006,14 +985,11 @@ int ERC_TESTER::TestLibSymbolIssues()
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{
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wxCHECK( m_schematic, 0 );
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ERC_SETTINGS& settings = m_schematic->ErcSettings();
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SYMBOL_LIB_TABLE* libTable = PROJECT_SCH::SchSymbolLibTable( &m_schematic->Prj() );
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wxString msg;
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int err_count = 0;
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SCH_SCREENS screens( m_schematic->Root() );
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for( SCH_SCREEN* screen = screens.GetFirst(); screen != nullptr; screen = screens.GetNext() )
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for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
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{
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std::vector<SCH_MARKER*> markers;
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@ -1029,7 +1005,7 @@ int ERC_TESTER::TestLibSymbolIssues()
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if( !libTableRow )
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{
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if( settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
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if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
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{
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std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_LIB_SYMBOL_ISSUES );
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ercItem->SetItems( symbol );
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@ -1044,7 +1020,7 @@ int ERC_TESTER::TestLibSymbolIssues()
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}
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else if( !libTable->HasLibrary( libName, true ) )
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{
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if( settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
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if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
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{
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std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_LIB_SYMBOL_ISSUES );
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ercItem->SetItems( symbol );
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@ -1063,7 +1039,7 @@ int ERC_TESTER::TestLibSymbolIssues()
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if( libSymbol == nullptr )
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{
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if( settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
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if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
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{
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std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_LIB_SYMBOL_ISSUES );
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ercItem->SetItems( symbol );
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@ -1081,7 +1057,7 @@ int ERC_TESTER::TestLibSymbolIssues()
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std::unique_ptr<LIB_SYMBOL> flattenedSymbol = libSymbol->Flatten();
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constexpr int flags = SCH_ITEM::COMPARE_FLAGS::EQUALITY | SCH_ITEM::COMPARE_FLAGS::ERC;
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if( settings.IsTestEnabled( ERCE_LIB_SYMBOL_MISMATCH ) )
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if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_MISMATCH ) )
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{
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// We have to check for duplicate pins first as they will cause Compare() to fail.
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std::vector<wxString> messages;
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@ -1134,7 +1110,7 @@ int ERC_TESTER::TestFootprintLinkIssues( KIFACE* aCvPcb, PROJECT* aProject )
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TESTER_FN_PTR linkTester = (TESTER_FN_PTR) aCvPcb->IfaceOrAddress( KIFACE_TEST_FOOTPRINT_LINK );
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for( SCH_SHEET_PATH& sheet : m_schematic->GetSheets() )
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for( SCH_SHEET_PATH& sheet : m_sheetList )
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{
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std::vector<SCH_MARKER*> markers;
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@ -1206,11 +1182,9 @@ int ERC_TESTER::TestFootprintLinkIssues( KIFACE* aCvPcb, PROJECT* aProject )
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int ERC_TESTER::TestOffGridEndpoints()
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{
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const int gridSize = m_schematic->Settings().m_ConnectionGridSize;
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int err_count = 0;
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SCH_SCREENS screens( m_schematic->Root() );
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int err_count = 0;
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for( SCH_SCREEN* screen = screens.GetFirst(); screen != nullptr; screen = screens.GetNext() )
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for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
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{
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std::vector<SCH_MARKER*> markers;
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@ -1272,11 +1246,10 @@ int ERC_TESTER::TestSimModelIssues()
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{
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wxString msg;
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WX_STRING_REPORTER reporter( &msg );
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SCH_SHEET_LIST sheets = m_schematic->GetSheets();
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int err_count = 0;
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SIM_LIB_MGR libMgr( &m_schematic->Prj() );
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for( SCH_SHEET_PATH& sheet : sheets )
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for( SCH_SHEET_PATH& sheet : m_sheetList )
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{
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if( sheet.GetExcludedFromSim() )
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continue;
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@ -1324,17 +1297,14 @@ int ERC_TESTER::TestSimModelIssues()
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int ERC_TESTER::RunRuleAreaERC()
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{
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int numErrors = 0;
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ERC_SETTINGS& settings = m_schematic->ErcSettings();
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int numErrors = 0;
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if( !settings.IsTestEnabled( ERCE_OVERLAPPING_RULE_AREAS ) )
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if( !m_settings.IsTestEnabled( ERCE_OVERLAPPING_RULE_AREAS ) )
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return 0;
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std::map<SCH_SCREEN*, std::vector<SCH_RULE_AREA*>> allScreenRuleAreas;
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SCH_SCREENS screens( m_schematic->Root() );
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for( SCH_SCREEN* screen = screens.GetFirst(); screen != nullptr; screen = screens.GetNext() )
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for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
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{
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for( SCH_ITEM* item : screen->Items().OfType( SCH_RULE_AREA_T ) )
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{
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@ -1342,7 +1312,7 @@ int ERC_TESTER::RunRuleAreaERC()
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}
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}
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if( settings.IsTestEnabled( ERCE_OVERLAPPING_RULE_AREAS ) )
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if( m_settings.IsTestEnabled( ERCE_OVERLAPPING_RULE_AREAS ) )
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numErrors += TestRuleAreaOverlappingRuleAreasERC( allScreenRuleAreas );
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return numErrors;
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@ -1365,6 +1335,7 @@ int ERC_TESTER::TestRuleAreaOverlappingRuleAreasERC(
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for( std::size_t j = i + 1; j < ruleAreas.size(); ++j )
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{
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SHAPE_POLY_SET polySecond = ruleAreas[j]->GetPolyShape();
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if( polyFirst.Collide( &polySecond ) )
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{
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numErrors++;
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@ -27,18 +27,20 @@
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#define ERC_H
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#include <erc/erc_settings.h>
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#include <sch_sheet_path.h>
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#include <sch_screen.h>
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||||
#include <sch_reference_list.h>
|
||||
#include <connection_graph.h>
|
||||
#include <vector>
|
||||
#include <map>
|
||||
|
||||
|
||||
class SCH_SHEET_LIST;
|
||||
class SCHEMATIC;
|
||||
class DS_PROXY_VIEW_ITEM;
|
||||
class SCH_EDIT_FRAME;
|
||||
class PROGRESS_REPORTER;
|
||||
struct KIFACE;
|
||||
class PROJECT;
|
||||
class SCREEN;
|
||||
class SCH_RULE_AREA;
|
||||
|
||||
|
||||
|
|
@ -51,8 +53,13 @@ class ERC_TESTER
|
|||
public:
|
||||
|
||||
ERC_TESTER( SCHEMATIC* aSchematic ) :
|
||||
m_schematic( aSchematic )
|
||||
m_schematic( aSchematic ),
|
||||
m_settings( aSchematic->ErcSettings() ),
|
||||
m_sheetList( aSchematic->GetSheets() ),
|
||||
m_screens( aSchematic->Root() ),
|
||||
m_nets( aSchematic->ConnectionGraph()->GetNetMap() )
|
||||
{
|
||||
m_sheetList.GetMultiUnitSymbols( m_refMap, true );
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -158,15 +165,19 @@ public:
|
|||
/**
|
||||
* Runs ERC to check for overlapping rule areas
|
||||
*/
|
||||
int TestRuleAreaOverlappingRuleAreasERC(
|
||||
std::map<SCH_SCREEN*, std::vector<SCH_RULE_AREA*>>& allScreenRuleAreas );
|
||||
int TestRuleAreaOverlappingRuleAreasERC( std::map<SCH_SCREEN*,
|
||||
std::vector<SCH_RULE_AREA*>>& allScreenRuleAreas );
|
||||
|
||||
void RunTests( DS_PROXY_VIEW_ITEM* aDrawingSheet, SCH_EDIT_FRAME* aEditFrame,
|
||||
KIFACE* aCvPcb, PROJECT* aProject, PROGRESS_REPORTER* aProgressReporter );
|
||||
|
||||
private:
|
||||
|
||||
SCHEMATIC* m_schematic;
|
||||
SCHEMATIC* m_schematic;
|
||||
ERC_SETTINGS& m_settings;
|
||||
SCH_SHEET_LIST m_sheetList;
|
||||
SCH_SCREENS m_screens;
|
||||
SCH_MULTI_UNIT_REFERENCE_MAP m_refMap;
|
||||
const NET_MAP& m_nets;
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue