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router: Disable writing clearance cache for items in local variables. 

Fixes https://gitlab.com/kicad/code/kicad/issues/12907
This commit is contained in:
Alex 2022-11-16 21:19:46 +05:00
parent bb446c8d01
commit 6d71f27500
3 changed files with 24 additions and 5 deletions
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18
pcbnew/router/pns_kicad_iface.cpp
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@ -127,6 +127,8 @@ public:
int ClearanceEpsilon() const { return m_clearanceEpsilon; } int ClearanceEpsilon() const { return m_clearanceEpsilon; }
void SetCacheWriteEnabled( bool aEnabled ) override { m_cacheWriteEnabled = aEnabled; }
void ClearCacheForItem( const PNS::ITEM* aItem ) override; void ClearCacheForItem( const PNS::ITEM* aItem ) override;
private: private:
@ -150,6 +152,7 @@ private:
PCB_ARC m_dummyArcs[2]; PCB_ARC m_dummyArcs[2];
PCB_VIA m_dummyVias[2]; PCB_VIA m_dummyVias[2];
int m_clearanceEpsilon; int m_clearanceEpsilon;
bool m_cacheWriteEnabled;
std::unordered_map<CLEARANCE_CACHE_KEY, int> m_clearanceCache; std::unordered_map<CLEARANCE_CACHE_KEY, int> m_clearanceCache;
std::unordered_map<CLEARANCE_CACHE_KEY, int> m_holeClearanceCache; std::unordered_map<CLEARANCE_CACHE_KEY, int> m_holeClearanceCache;
@ -163,7 +166,8 @@ PNS_PCBNEW_RULE_RESOLVER::PNS_PCBNEW_RULE_RESOLVER( BOARD* aBoard,
m_board( aBoard ), m_board( aBoard ),
m_dummyTracks{ { aBoard }, { aBoard } }, m_dummyTracks{ { aBoard }, { aBoard } },
m_dummyArcs{ { aBoard }, { aBoard } }, m_dummyArcs{ { aBoard }, { aBoard } },
m_dummyVias{ { aBoard }, { aBoard } } m_dummyVias{ { aBoard }, { aBoard } },
m_cacheWriteEnabled( true )
{ {
if( aBoard ) if( aBoard )
m_clearanceEpsilon = aBoard->GetDesignSettings().GetDRCEpsilon(); m_clearanceEpsilon = aBoard->GetDesignSettings().GetDRCEpsilon();
@ -426,7 +430,9 @@ int PNS_PCBNEW_RULE_RESOLVER::Clearance( const PNS::ITEM* aA, const PNS::ITEM* a
if( aUseClearanceEpsilon ) if( aUseClearanceEpsilon )
rv -= m_clearanceEpsilon; rv -= m_clearanceEpsilon;
m_clearanceCache[ key ] = rv; if( m_cacheWriteEnabled )
m_clearanceCache[key] = rv;
return rv; return rv;
} }
@ -455,7 +461,9 @@ int PNS_PCBNEW_RULE_RESOLVER::HoleClearance( const PNS::ITEM* aA, const PNS::ITE
if( aUseClearanceEpsilon ) if( aUseClearanceEpsilon )
rv -= m_clearanceEpsilon; rv -= m_clearanceEpsilon;
m_holeClearanceCache[ key ] = rv; if( m_cacheWriteEnabled )
m_holeClearanceCache[key] = rv;
return rv; return rv;
} }
@ -484,7 +492,9 @@ int PNS_PCBNEW_RULE_RESOLVER::HoleToHoleClearance( const PNS::ITEM* aA, const PN
if( aUseClearanceEpsilon ) if( aUseClearanceEpsilon )
rv -= m_clearanceEpsilon; rv -= m_clearanceEpsilon;
m_holeToHoleClearanceCache[ key ] = rv; if( m_cacheWriteEnabled )
m_holeToHoleClearanceCache[key] = rv;
return rv; return rv;
} }

9
pcbnew/router/pns_node.cpp
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@ -477,6 +477,10 @@ NODE::OPT_OBSTACLE NODE::CheckColliding( const ITEM* aItemA, int aKindMask )
const LINE* line = static_cast<const LINE*>( aItemA ); const LINE* line = static_cast<const LINE*>( aItemA );
const SHAPE_LINE_CHAIN& l = line->CLine(); const SHAPE_LINE_CHAIN& l = line->CLine();
// s is a temporary item, we don't want to put it in the cache.
if( m_ruleResolver )
m_ruleResolver->SetCacheWriteEnabled( false );
for( int i = 0; i < l.SegmentCount(); i++ ) for( int i = 0; i < l.SegmentCount(); i++ )
{ {
const SEGMENT s( *line, l.CSegment( i ) ); const SEGMENT s( *line, l.CSegment( i ) );
@ -486,10 +490,13 @@ NODE::OPT_OBSTACLE NODE::CheckColliding( const ITEM* aItemA, int aKindMask )
return OPT_OBSTACLE( obs[0] ); return OPT_OBSTACLE( obs[0] );
} }
if( m_ruleResolver )
m_ruleResolver->SetCacheWriteEnabled( true );
if( line->EndsWithVia() ) if( line->EndsWithVia() )
{ {
n += QueryColliding( &line->Via(), obs, aKindMask, 1 ); n += QueryColliding( &line->Via(), obs, aKindMask, 1 );
if( n ) if( n )
return OPT_OBSTACLE( obs[0] ); return OPT_OBSTACLE( obs[0] );
} }

2
pcbnew/router/pns_node.h
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@ -102,6 +102,8 @@ public:
virtual wxString NetName( int aNet ) = 0; virtual wxString NetName( int aNet ) = 0;
virtual void SetCacheWriteEnabled( bool aEnabled ) = 0;
virtual void ClearCacheForItem( const ITEM* aItem ) {} virtual void ClearCacheForItem( const ITEM* aItem ) {}
}; };