Don't count removed zone layers
This does 3 things: 1) Removes unused zone layers on load 2) Does not save unused zone layers 3) Removes unused zone layers from connectivity calculation (1) Prevents existing boards from using unused zone layers for any connectivity or rendering. (2) Updates the contents of boards with removed zone layers to prevent them from propagating. (3) updates the connectivity while running pcbnew and removing a zone layer Fixes https://gitlab.com/kicad/code/kicad/-/issues/17288
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@ -195,7 +195,12 @@ bool CN_CONNECTIVITY_ALGO::Add( BOARD_ITEM* aItem )
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m_itemMap[zone] = ITEM_MAP_ENTRY();
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for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
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// Don't check for connections on layers that only exist in the zone but
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// were disabled in the board
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BOARD* board = zone->GetBoard();
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LSET layerset = board->GetEnabledLayers() & zone->GetLayerSet();
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for( PCB_LAYER_ID layer : layerset.Seq() )
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{
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for( CN_ITEM* zitem : m_itemList.Add( zone, layer ) )
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m_itemMap[zone].Link( zitem );
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@ -446,13 +451,15 @@ void CN_CONNECTIVITY_ALGO::Build( BOARD* aBoard, PROGRESS_REPORTER* aReporter )
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m_itemMap[zone] = ITEM_MAP_ENTRY();
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markItemNetAsDirty( zone );
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for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
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// Don't check for connections on layers that only exist in the zone but
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// were disabled in the board
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BOARD* board = zone->GetBoard();
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LSET layerset = board->GetEnabledLayers() & zone->GetLayerSet() & LSET::AllCuMask();
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for( PCB_LAYER_ID layer : layerset.Seq() )
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{
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if( IsCopperLayer( layer ) )
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{
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for( int j = 0; j < zone->GetFilledPolysList( layer )->OutlineCount(); j++ )
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zitems.push_back( new CN_ZONE_LAYER( zone, layer, j ) );
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}
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for( int j = 0; j < zone->GetFilledPolysList( layer )->OutlineCount(); j++ )
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zitems.push_back( new CN_ZONE_LAYER( zone, layer, j ) );
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}
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}
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}
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@ -2283,9 +2283,14 @@ void PCB_IO_KICAD_SEXPR::format( const ZONE* aZone, int aNestLevel ) const
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KICAD_FORMAT::FormatBool( m_out, 0, "locked", aZone->IsLocked() );
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// If a zone exists on multiple layers, format accordingly
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if( aZone->GetLayerSet().count() > 1 )
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LSET layers = aZone->GetLayerSet();
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if( aZone->GetBoard() )
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layers &= aZone->GetBoard()->GetEnabledLayers();
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if( layers.count() > 1 )
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{
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formatLayers( aZone->GetLayerSet() );
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formatLayers( layers );
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}
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else
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{
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@ -1172,6 +1172,18 @@ BOARD* PCB_IO_KICAD_SEXPR_PARSER::parseBOARD_unchecked()
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}
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}
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// Clear unused zone data
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{
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LSET layers = m_board->GetEnabledLayers();
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for( BOARD_ITEM* zone : m_board->Zones() )
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{
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ZONE* z = static_cast<ZONE*>( zone );
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z->SetLayerSet( z->GetLayerSet() & layers );
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}
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}
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return m_board;
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}
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@ -610,7 +610,10 @@ bool ZONE_FILLER::Fill( std::vector<ZONE*>& aZones, bool aCheck, wxWindow* aPare
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for( ZONE* zone : aZones )
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{
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LSET zoneCopperLayers = zone->GetLayerSet() & LSET::AllCuMask( MAX_CU_LAYERS );
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// Don't check for connections on layers that only exist in the zone but
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// were disabled in the board
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BOARD* board = zone->GetBoard();
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LSET zoneCopperLayers = zone->GetLayerSet() & LSET::AllCuMask() & board->GetEnabledLayers();
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// Min-thickness is the web thickness. On the other hand, a blob min-thickness by
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// min-thickness is not useful. Since there's no obvious definition of web vs. blob, we
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