Remove some duplicate work when loading a board

This commit is contained in:
Jon Evans 2021-11-24 22:04:16 -05:00
parent 5e6da9f964
commit 6ecdbbb1da
3 changed files with 12 additions and 5 deletions

View File

@ -747,7 +747,8 @@ bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, in
// compiled. // compiled.
Raise(); Raise();
SetBoard( loadedBoard ); // Skip (possibly expensive) connectivity build here; we build it below after load
SetBoard( loadedBoard, false );
if( GFootprintList.GetCount() == 0 ) if( GFootprintList.GetCount() == 0 )
GFootprintList.ReadCacheFromFile( Prj().GetProjectPath() + "fp-info-cache" ); GFootprintList.ReadCacheFromFile( Prj().GetProjectPath() + "fp-info-cache" );
@ -911,7 +912,6 @@ bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, in
// Rebuild list of nets (full ratsnest rebuild) // Rebuild list of nets (full ratsnest rebuild)
GetBoard()->BuildConnectivity(); GetBoard()->BuildConnectivity();
Compile_Ratsnest( true );
// Load project settings after setting up board; some of them depend on the nets list // Load project settings after setting up board; some of them depend on the nets list
LoadProjectSettings(); LoadProjectSettings();

View File

@ -387,7 +387,7 @@ PCB_EDIT_FRAME::~PCB_EDIT_FRAME()
} }
void PCB_EDIT_FRAME::SetBoard( BOARD* aBoard ) void PCB_EDIT_FRAME::SetBoard( BOARD* aBoard, bool aBuildConnectivity )
{ {
if( m_pcb ) if( m_pcb )
m_pcb->ClearProject(); m_pcb->ClearProject();
@ -395,7 +395,9 @@ void PCB_EDIT_FRAME::SetBoard( BOARD* aBoard )
PCB_BASE_EDIT_FRAME::SetBoard( aBoard ); PCB_BASE_EDIT_FRAME::SetBoard( aBoard );
aBoard->SetProject( &Prj() ); aBoard->SetProject( &Prj() );
aBoard->GetConnectivity()->Build( aBoard );
if( aBuildConnectivity )
aBoard->GetConnectivity()->Build( aBoard );
// reload the drawing-sheet // reload the drawing-sheet
SetPageSettings( aBoard->GetPageSettings() ); SetPageSettings( aBoard->GetPageSettings() );

View File

@ -398,7 +398,12 @@ public:
bool Clear_Pcb( bool aQuery, bool aFinal = false ); bool Clear_Pcb( bool aQuery, bool aFinal = false );
///< @copydoc PCB_BASE_FRAME::SetBoard() ///< @copydoc PCB_BASE_FRAME::SetBoard()
void SetBoard( BOARD* aBoard ) override; void SetBoard( BOARD* aBoard ) override
{
SetBoard( aBoard, true );
}
void SetBoard( BOARD* aBoard, bool aBuildConnectivity );
///< @copydoc PCB_BASE_FRAME::GetModel() ///< @copydoc PCB_BASE_FRAME::GetModel()
BOARD_ITEM_CONTAINER* GetModel() const override; BOARD_ITEM_CONTAINER* GetModel() const override;