haskal
/
kicad
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Retire the two-item version of BOARD_CONNECTED_ITEM::GetClearance().

This commit is contained in:
Jeff Young 2020-10-12 18:40:03 +01:00
parent af90642440
commit 70c3c5c514
9 changed files with 26 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
pcbnew/autorouter/ar_autoplacer.cpp
View File

@ -360,7 +360,7 @@ void AR_AUTOPLACER::buildFpAreas( MODULE* aFootprint, int aFpClearance )
// Trace pads + clearance areas.
for( D_PAD* pad : aFootprint->Pads() )
{
int margin = (m_matrix.m_GridRouting / 2) + pad->GetClearance( pad->GetLayer() );
int margin = (m_matrix.m_GridRouting / 2) + pad->GetOwnClearance( pad->GetLayer() );
addPad( pad, margin );
}
}
@ -414,7 +414,7 @@ void AR_AUTOPLACER::genModuleOnRoutingMatrix( MODULE* Module )
// Trace pads + clearance areas.
for( D_PAD* pad : Module->Pads() )
{
int margin = (m_matrix.m_GridRouting / 2) + pad->GetClearance( pad->GetLayer() );
int margin = (m_matrix.m_GridRouting / 2) + pad->GetOwnClearance( pad->GetLayer() );
m_matrix.PlacePad( pad, CELL_IS_MODULE, margin, AR_MATRIX::WRITE_OR_CELL );
}

12
pcbnew/board_connected_item.cpp
View File

@ -73,15 +73,9 @@ NETCLASS* BOARD_CONNECTED_ITEM::GetEffectiveNetclass() const
/*
* Clearances exist in a hiearchy. If a given level is specified then the remaining levels
* are NOT consulted.
*
* LEVEL 1: (highest priority) local overrides (pad, footprint, etc.)
* LEVEL 2: Rules
* LEVEL 3: Accumulated local settings, netclass settings, & board design settings
* Returns the item's "own" clearance (ie: that not affected by other items).
*/
int BOARD_CONNECTED_ITEM::GetClearance( PCB_LAYER_ID aLayer, BOARD_ITEM* aItem,
wxString* aSource ) const
int BOARD_CONNECTED_ITEM::GetOwnClearance( PCB_LAYER_ID aLayer, wxString* aSource ) const
{
DRC_CONSTRAINT constraint;
@ -90,7 +84,7 @@ int BOARD_CONNECTED_ITEM::GetClearance( PCB_LAYER_ID aLayer, BOARD_ITEM* aItem,
BOARD_DESIGN_SETTINGS& bds = GetBoard()->GetDesignSettings();
constraint = bds.m_DRCEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, this,
aItem, aLayer );
nullptr, aLayer );
}
if( constraint.Value().HasMin() )

9
pcbnew/board_connected_item.h
View File

@ -158,17 +158,12 @@ public:
/**
* Function GetClearance
* returns the clearance in internal units. If \a aItem is not NULL then the
* returned clearance is the greater of this object's NETCLASS clearance and
* aItem's NETCLASS clearance. If \a aItem is NULL, then this objects clearance
* is returned.
* returns an item's "own" clearance in internal units.
* @param aLayer the layer in question
* @param aItem is an optional BOARD_ITEM
* @param aSource [out] optionally reports the source as a user-readable string
* @return int - the clearance in internal units.
*/
virtual int GetClearance( PCB_LAYER_ID aLayer, BOARD_ITEM* aItem = nullptr,
wxString* aSource = nullptr ) const;
virtual int GetOwnClearance( PCB_LAYER_ID aLayer, wxString* aSource = nullptr ) const;
/**
* Function GetLocalClearanceOverrides

2
pcbnew/class_pad.cpp
View File

@ -894,7 +894,7 @@ void D_PAD::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PANEL_ITEM>
}
wxString source;
int clearance = GetClearance( GetLayer(), nullptr, &source );
int clearance = GetOwnClearance( GetLayer(), &source );
msg.Printf( _( "Min Clearance: %s" ), MessageTextFromValue( units, clearance ) );
msg2.Printf( _( "(from %s)" ), source );

6
pcbnew/class_track.cpp
View File

@ -528,7 +528,7 @@ double TRACK::ViewGetLOD( int aLayer, KIGFX::VIEW* aView ) const
const BOX2I TRACK::ViewBBox() const
{
BOX2I bbox = GetBoundingBox();
bbox.Inflate( 2 * GetClearance( GetLayer() ) );
bbox.Inflate( 2 * GetOwnClearance( GetLayer() ) );
return bbox;
}
@ -649,7 +649,7 @@ void TRACK::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PANEL_ITEM>
}
}
int clearance = GetClearance( GetLayer(), nullptr, &source );
int clearance = GetOwnClearance( GetLayer(), &source );
msg.Printf( _( "Min Clearance: %s" ), MessageTextFromValue( units, clearance ) );
msg2.Printf( _( "(from %s)" ), source );
@ -698,7 +698,7 @@ void VIA::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PANEL_ITEM>&
aList.emplace_back( _( "Drill" ), msg, RED );
int clearance = GetClearance( GetLayer(), nullptr, &source );
int clearance = GetOwnClearance( GetLayer(), &source );
msg.Printf( _( "Min Clearance: %s" ), MessageTextFromValue( units, clearance ) );
msg2.Printf( _( "(from %s)" ), source );

2
pcbnew/class_zone.cpp
View File

@ -622,7 +622,7 @@ void ZONE_CONTAINER::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PA
aList.emplace_back( _( "Filled Area" ), msg, BLUE );
wxString source;
int clearance = GetClearance( GetLayer(), nullptr, &source );
int clearance = GetOwnClearance( GetLayer(), &source );
msg.Printf( _( "Min Clearance: %s" ), MessageTextFromValue( units, clearance ) );
msg2.Printf( _( "(from %s)" ), source );

4
pcbnew/exporters/gerber_jobfile_writer.cpp
View File

@ -469,7 +469,7 @@ void GERBER_JOBFILE_WRITER::addJSONDesignRules()
{
for( PCB_LAYER_ID layer : pad->GetLayerSet().Seq() )
{
int padClearance = pad->GetClearance( layer );
int padClearance = pad->GetOwnClearance( layer );
if( layer == B_Cu || layer == F_Cu )
minPadClearanceOuter = std::min( minPadClearanceOuter, padClearance );
@ -520,7 +520,7 @@ void GERBER_JOBFILE_WRITER::addJSONDesignRules()
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
{
int zclerance = zone->GetClearance( layer );
int zclerance = zone->GetOwnClearance( layer );
if( layer == B_Cu || layer == F_Cu )
minclearanceOuter = std::min( minclearanceOuter, zclerance );

12
pcbnew/pcb_painter.cpp
View File

@ -529,7 +529,7 @@ void PCB_PAINTER::draw( const TRACK* aTrack, int aLayer )
if( ( m_pcbSettings.m_clearance & clearanceFlags ) == clearanceFlags )
{
int clearance = aTrack->GetClearance( m_pcbSettings.GetActiveLayer() );
int clearance = aTrack->GetOwnClearance( m_pcbSettings.GetActiveLayer() );
m_gal->SetLineWidth( m_pcbSettings.m_outlineWidth );
m_gal->SetIsFill( false );
@ -574,7 +574,7 @@ void PCB_PAINTER::draw( const ARC* aArc, int aLayer )
m_gal->SetStrokeColor( color );
m_gal->DrawArcSegment( center, radius, start_angle, start_angle + angle,
width + aArc->GetClearance( ToLAYER_ID( aLayer ) ) * 2 );
width + aArc->GetOwnClearance( ToLAYER_ID( aLayer ) ) * 2 );
}
}
}
@ -716,7 +716,9 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
if( ( m_pcbSettings.m_clearance & clearanceFlags ) == clearanceFlags
&& aLayer != LAYER_VIAS_HOLES )
{
if( !aVia->FlashLayer( m_pcbSettings.GetActiveLayer() ) )
PCB_LAYER_ID activeLayer = m_pcbSettings.GetActiveLayer();
if( !aVia->FlashLayer( activeLayer ) )
{
radius = getDrillSize( aVia ) / 2.0 +
aVia->GetBoard()->GetDesignSettings().GetHolePlatingThickness();
@ -726,7 +728,7 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
m_gal->SetIsFill( false );
m_gal->SetIsStroke( true );
m_gal->SetStrokeColor( color );
m_gal->DrawCircle( center, radius + aVia->GetClearance( m_pcbSettings.GetActiveLayer() ) );
m_gal->DrawCircle( center, radius + aVia->GetOwnClearance( activeLayer ) );
}
}
@ -946,7 +948,7 @@ void PCB_PAINTER::draw( const D_PAD* aPad, int aLayer )
m_gal->SetIsFill( false );
m_gal->SetStrokeColor( color );
int clearance = aPad->GetClearance( m_pcbSettings.GetActiveLayer() );
int clearance = aPad->GetOwnClearance( m_pcbSettings.GetActiveLayer() );
if( flashLayer )
{

8
pcbnew/tools/drawing_tool.cpp
View File

@ -2034,7 +2034,7 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
if( TRACK* track = dyn_cast<TRACK*>( item ) )
{
int max_clearance = std::max( clearance,
track->GetClearance( track->GetLayer() ) );
track->GetOwnClearance( track->GetLayer() ) );
if( TestSegmentHit( position, track->GetStart(), track->GetEnd(),
( track->GetWidth() + aVia->GetWidth() ) / 2 + max_clearance ) )
@ -2043,7 +2043,7 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
return true;
net = track->GetNetCode();
clearance = track->GetClearance( track->GetLayer() );
clearance = track->GetOwnClearance( track->GetLayer() );
}
}
@ -2061,7 +2061,7 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
{
for( PCB_LAYER_ID layer : pad->GetLayerSet().Seq() )
{
int max_clearance = std::max( clearance, pad->GetClearance( layer ) );
int max_clearance = std::max( clearance, pad->GetOwnClearance( layer ) );
if( pad->HitTest( aVia->GetBoundingBox(), false, max_clearance ) )
{
@ -2069,7 +2069,7 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
return true;
net = pad->GetNetCode();
clearance = pad->GetClearance( layer );
clearance = pad->GetOwnClearance( layer );
}
if( pad->GetDrillSize().x && pad->GetDrillShape() == PAD_DRILL_SHAPE_CIRCLE )