Update demos

This commit is contained in:
jean-pierre charras 2020-11-08 16:58:34 +01:00
parent 64876a2761
commit 74dc7571d7
51 changed files with 34997 additions and 12451 deletions

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EESchema Schematic File Version 5
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 2 3
Title "Complex hierarchy: demo"
Date "2017-01-15"
Rev "1"
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
Comment5 ""
Comment6 ""
Comment7 ""
Comment8 ""
Comment9 ""
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 7300 3300
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 5450 2400
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 7900 3700
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 3600 2000
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 2850 2000
Wire Wire Line
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Connection ~ 5150 3000
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 8100 4800
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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F 0 "R21" V 5150 6400 50 0000 C CNN
F 1 "4,7K" V 5250 6400 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 5100 6400 10 0000 C CNN
F 3 "" H 5250 6400 60 0001 C CNN
1 5250 6400
0 1 1 0
$EndComp
$Comp
L complex_hierarchy_schlib:GND #PWR030
U 1 1 4B3A1361
P 5050 6400
AR Path="/4B3A13A4/4B3A1361" Ref="#PWR030" Part="1"
AR Path="/4B3A1333/4B3A1361" Ref="#PWR046" Part="1"
F 0 "#PWR030" H 5050 6400 30 0001 C CNN
F 1 "GND" H 5050 6330 30 0001 C CNN
F 2 "" H 5050 6400 10 0001 C CNN
F 3 "" H 5050 6400 60 0001 C CNN
1 5050 6400
0 1 1 0
$EndComp
$Comp
L complex_hierarchy_schlib:MPSA92 Q5
U 1 1 4B3A1360
P 7800 3300
AR Path="/4B3A13A4/4B3A1360" Ref="Q5" Part="1"
AR Path="/4B3A1333/4B3A1360" Ref="Q1" Part="1"
F 0 "Q5" H 7800 3150 60 0000 R CNN
F 1 "MPSA92" H 7800 3450 60 0000 R CNN
F 2 "Package_TO_SOT_THT:TO-92_HandSolder" H 7750 3100 10 0000 C CNN
F 3 "" H 7800 3300 60 0001 C CNN
1 7800 3300
1 0 0 1
$EndComp
$Comp
L complex_hierarchy_schlib:HT #PWR031
U 1 1 4B3A135F
P 7300 2650
AR Path="/4B3A13A4/4B3A135F" Ref="#PWR031" Part="1"
AR Path="/4B3A1333/4B3A135F" Ref="#PWR047" Part="1"
F 0 "#PWR031" H 7300 2770 20 0001 C CNN
F 1 "HT" H 7300 2740 40 0000 C CNN
F 2 "" H 7300 2650 10 0001 C CNN
F 3 "" H 7300 2650 60 0001 C CNN
1 7300 2650
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:HT #PWR032
U 1 1 4B3A135E
P 7900 2550
AR Path="/4B3A13A4/4B3A135E" Ref="#PWR032" Part="1"
AR Path="/4B3A1333/4B3A135E" Ref="#PWR048" Part="1"
F 0 "#PWR032" H 7900 2670 20 0001 C CNN
F 1 "HT" H 7900 2640 40 0000 C CNN
F 2 "" H 7900 2550 10 0001 C CNN
F 3 "" H 7900 2550 60 0001 C CNN
1 7900 2550
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:HT #PWR033
U 1 1 4B3A135D
P 8600 3300
AR Path="/4B3A13A4/4B3A135D" Ref="#PWR033" Part="1"
AR Path="/4B3A1333/4B3A135D" Ref="#PWR049" Part="1"
F 0 "#PWR033" H 8600 3420 20 0001 C CNN
F 1 "HT" H 8600 3390 40 0000 C CNN
F 2 "" H 8600 3300 10 0001 C CNN
F 3 "" H 8600 3300 60 0001 C CNN
1 8600 3300
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:LM358N U4
U 2 1 4B3A135C
P 4850 2400
AR Path="/4B3A13A4/4B3A135C" Ref="U4" Part="2"
AR Path="/4B3A1333/4B3A135C" Ref="U3" Part="2"
F 0 "U4" H 4900 2600 60 0000 C CNN
F 1 "LM358N" H 5000 2200 50 0000 C CNN
F 2 "Package_DIP:DIP-8_W7.62mm_LongPads" H 5100 2150 10 0000 C CNN
F 3 "" H 4850 2400 60 0001 C CNN
2 4850 2400
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:+12V #U034
U 1 1 4B3A135B
P 4750 1950
AR Path="/4B3A13A4/4B3A135B" Ref="#U034" Part="1"
AR Path="/4B3A1333/4B3A135B" Ref="#U050" Part="1"
F 0 "#U034" H 4750 1900 20 0001 C CNN
F 1 "+12V" H 4750 2050 40 0000 C CNN
F 2 "" H 4750 1950 10 0001 C CNN
F 3 "" H 4750 1950 60 0001 C CNN
1 4750 1950
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:R R17
U 1 1 4B3A1359
P 3950 2000
AR Path="/4B3A13A4/4B3A1359" Ref="R17" Part="1"
AR Path="/4B3A1333/4B3A1359" Ref="R7" Part="1"
F 0 "R17" V 3850 2000 50 0000 C CNN
F 1 "22K" V 3950 2000 50 0000 C CNN
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal" V 3800 2000 10 0000 C CNN
F 3 "" H 3950 2000 60 0001 C CNN
1 3950 2000
0 1 1 0
$EndComp
$Comp
L complex_hierarchy_schlib:C C6
U 1 1 4B3A1358
P 4350 1600
AR Path="/4B3A13A4/4B3A1358" Ref="C6" Part="1"
AR Path="/4B3A1333/4B3A1358" Ref="C3" Part="1"
F 0 "C6" V 4200 1600 50 0000 C CNN
F 1 "15nF" V 4500 1600 50 0000 C CNN
F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" V 4150 1600 10 0000 C CNN
F 3 "" H 4350 1600 60 0001 C CNN
1 4350 1600
0 1 1 0
$EndComp
Text Notes 2600 2950 0 80 Italic 16
Filter:\nFc =1000Hz
$Comp
L complex_hierarchy_schlib:POT RV2
U 1 1 4B3A1357
P 5850 6400
AR Path="/4B3A13A4/4B3A1357" Ref="RV2" Part="1"
AR Path="/4B3A1333/4B3A1357" Ref="RV1" Part="1"
F 0 "RV2" H 5850 6300 50 0000 C CNN
F 1 "4,7K" H 5850 6400 50 0000 C CNN
F 2 "Potentiometer_THT:Potentiometer_Bourns_3266W_Vertical" H 5850 6250 10 0000 C CNN
F 3 "" H 5850 6400 60 0001 C CNN
1 5850 6400
1 0 0 -1
$EndComp
Wire Wire Line
7900 4100 7900 4400
Wire Wire Line
8600 4450 8900 4450
Wire Wire Line
8600 4450 8600 4600
Wire Wire Line
8600 4150 9100 4150
Wire Wire Line
8600 4150 8600 3900
Wire Wire Line
2850 2450 2850 2400
Wire Wire Line
4350 2000 4350 2200
Wire Wire Line
4350 2200 4000 2200
Wire Wire Line
4000 2200 4000 2400
Connection ~ 4350 2200
Wire Wire Line
4000 2750 4000 2700
Wire Wire Line
4750 2850 4750 2800
Wire Wire Line
4750 1950 4750 2000
Wire Wire Line
7300 2700 7300 2650
Wire Wire Line
7900 2550 7900 2600
Wire Wire Line
7900 4800 8100 4800
Connection ~ 7900 4800
Wire Wire Line
8100 5900 8100 5950
Wire Wire Line
6300 4950 6300 5000
Wire Wire Line
6300 5850 6300 5800
Wire Wire Line
5050 6400 5100 6400
Wire Wire Line
7100 5100 7000 5100
Wire Wire Line
7300 3000 7300 2900
Wire Wire Line
9100 4150 9300 4150
Wire Wire Line
7300 3300 7300 3450
Wire Wire Line
5450 2400 5450 1600
Wire Wire Line
7900 3700 7900 3900
Wire Wire Line
3600 2000 3800 2000
Wire Wire Line
2850 2000 3100 2000
Wire Wire Line
5150 3000 5450 3000
Wire Wire Line
8100 4800 8300 4800
Wire Wire Line
9800 4300 9800 4450
Wire Wire Line
8900 4450 9300 4450
Wire Wire Line
8900 5400 8900 6400
Wire Wire Line
4350 2200 4350 2300
Wire Wire Line
7900 4800 7900 4900
$EndSCHEMATC

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,429 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
"copper_line_width": 0.3,
"copper_text_italic": false,
"copper_text_size_h": 2.0,
"copper_text_size_v": 2.0,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 1,
"dimension_units": 0,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.19999999999999998,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.19999999999999998,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.508
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"version": 1
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_too_small": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"keepout": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_too_small": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "error",
"silk_overlap": "error",
"skew_out_of_range": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"via_hole_larger_than_pad": "error",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.01,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.508,
"min_microvia_drill": 0.2032,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.508,
"min_track_width": 0.2032,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.889,
"solder_mask_clearance": 0.254,
"solder_mask_min_width": 0.0,
"solder_paste_clearance": 0.0,
"solder_paste_margin_ratio": -0.0
},
"track_widths": [
0.4
],
"via_dimensions": [
{
"diameter": 1.651,
"drill": 0.6
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
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0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_sheet_names": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "complex_hierarchy.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.3,
"diff_pair_gap": 0.35,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.4,
"line_style": 0,
"microvia_diameter": 0.508,
"microvia_drill": 0.2032,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.4,
"via_diameter": 1.651,
"via_drill": 0.6,
"wire_width": 6.0
},
{
"bus_width": 12.0,
"clearance": 0.3,
"diff_pair_gap": 0.35,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.4,
"line_style": 0,
"microvia_diameter": 0.508,
"microvia_drill": 0.2032,
"name": "power",
"nets": [
"+12C",
"-VAA",
"/12Vext",
"GND",
"HT",
"VCC"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.6,
"via_diameter": 1.651,
"via_drill": 0.6,
"wire_width": 6.0
}
],
"meta": {
"version": 0
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vmrl": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"drawing": {
"default_bus_thickness": 12.0,
"default_junction_size": 40.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"default_wire_thickness": 6.0,
"field_names": [],
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.3
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 0
},
"net_format_name": "Pcbnew",
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"f6cd0548-235d-4376-9e58-c3692344bb95",
""
],
[
"00000000-0000-0000-0000-00004b3a1333",
"ampli_ht_vertical"
],
[
"00000000-0000-0000-0000-00004b3a13a4",
"ampli_ht_horizontal"
]
],
"text_variables": {}
}

File diff suppressed because it is too large Load Diff

View File

@ -1,798 +0,0 @@
(export (version D)
(design
(source F:\kicad-launchpad\git_testing\demos\complex_hierarchy\complex_hierarchy.sch)
(date "13/01/2017 17:15:21")
(tool "Eeschema (2017-01-12 revision 9bc2bb2)-master")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date "21 mar 2015")
(source complex_hierarchy.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value ""))))
(sheet (number 2) (name /ampli_ht_horizontal/) (tstamps /4B3A13A4/)
(title_block
(title)
(company)
(rev)
(date "21 mar 2015")
(source ampli_ht.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value ""))))
(sheet (number 3) (name /ampli_ht_vertical/) (tstamps /4B3A1333/)
(title_block
(title)
(company)
(rev)
(date "21 mar 2015")
(source ampli_ht.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref C10)
(value 10uF)
(footprint Discret:CP6)
(libsource (lib complex_hierarchy_schlib) (part CP))
(sheetpath (names /) (tstamps /))
(tstamp 4B4B15E7))
(comp (ref C11)
(value 10uF)
(footprint Discret:CP6)
(libsource (lib complex_hierarchy_schlib) (part CP))
(sheetpath (names /) (tstamps /))
(tstamp 4B4B15D9))
(comp (ref U2)
(value 78L05)
(footprint Discret:LM78LXX)
(libsource (lib complex_hierarchy_schlib) (part 7805))
(sheetpath (names /) (tstamps /))
(tstamp 4B4B1532))
(comp (ref U1)
(value ICL7660)
(footprint Housings_DIP:DIP-8_W7.62mm_LongPads)
(libsource (lib complex_hierarchy_schlib) (part ICL7660))
(sheetpath (names /) (tstamps /))
(tstamp 4B4B1230))
(comp (ref C9)
(value 47uF/63V)
(footprint Discret:CP8)
(libsource (lib complex_hierarchy_schlib) (part CP))
(sheetpath (names /) (tstamps /))
(tstamp 4B3A1558))
(comp (ref P1)
(value CONN_2)
(footprint Connect:bornier2)
(libsource (lib complex_hierarchy_schlib) (part CONN_2))
(sheetpath (names /) (tstamps /))
(tstamp 4B3A12F4))
(comp (ref C1)
(value 47uF)
(footprint Discret:CP6)
(libsource (lib complex_hierarchy_schlib) (part CP))
(sheetpath (names /) (tstamps /))
(tstamp 4B03CEC2))
(comp (ref C2)
(value 47uF/20V)
(footprint Discret:CP6)
(libsource (lib complex_hierarchy_schlib) (part CP))
(sheetpath (names /) (tstamps /))
(tstamp 4AE173CF))
(comp (ref D1)
(value 1N4007)
(footprint Discret:D5)
(libsource (lib complex_hierarchy_schlib) (part D_Small))
(sheetpath (names /) (tstamps /))
(tstamp 4AE172F4))
(comp (ref P2)
(value CONN_2)
(footprint Connect:bornier2)
(libsource (lib complex_hierarchy_schlib) (part CONN_2))
(sheetpath (names /) (tstamps /))
(tstamp 4AD71B06))
(comp (ref R28)
(value 220K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B617B88))
(comp (ref R27)
(value 47)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B616B96))
(comp (ref D9)
(value 1N4148)
(footprint Discret:D3)
(libsource (lib complex_hierarchy_schlib) (part D_Small))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B616AFA))
(comp (ref R20)
(value 5,6K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B61688C))
(comp (ref C14)
(value 150nF)
(footprint Discret:C2)
(libsource (lib complex_hierarchy_schlib) (part C))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B4F3641))
(comp (ref R24)
(value 1K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B4F363E))
(comp (ref Q6)
(value MPAS42)
(footprint Discret:TO92-CBE)
(libsource (lib complex_hierarchy_schlib) (part MPSA42))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A137D))
(comp (ref Q7)
(value MPAS92)
(footprint Discret:TO92-CBE)
(libsource (lib complex_hierarchy_schlib) (part MPSA92))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A137C))
(comp (ref D7)
(value 1N4148)
(footprint Discret:D3)
(libsource (lib complex_hierarchy_schlib) (part D_Small))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A137B))
(comp (ref Q8)
(value MPAS42)
(footprint Discret:TO92-CBE)
(libsource (lib complex_hierarchy_schlib) (part MPSA42))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1379))
(comp (ref D6)
(value 1N4148)
(footprint Discret:D3)
(libsource (lib complex_hierarchy_schlib) (part D_Small))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1377))
(comp (ref R13)
(value 470)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1376))
(comp (ref D5)
(value 1N4148)
(footprint Discret:D3)
(libsource (lib complex_hierarchy_schlib) (part D_Small))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1375))
(comp (ref R14)
(value 220K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1374))
(comp (ref R18)
(value 1K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1371))
(comp (ref R22)
(value 220K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1370))
(comp (ref R19)
(value 1K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A136D))
(comp (ref P5)
(value CONN_2)
(footprint Connect:bornier2)
(libsource (lib complex_hierarchy_schlib) (part CONN_2))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A136C))
(comp (ref R16)
(value 22K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A136B))
(comp (ref U4)
(value LM358N)
(footprint Housings_DIP:DIP-8_W7.62mm_LongPads)
(libsource (lib complex_hierarchy_schlib) (part LM358N))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1368))
(comp (ref P6)
(value CONN_2)
(footprint Connect:bornier2)
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(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1367))
(comp (ref C7)
(value 4.7nF)
(footprint Discret:C2)
(libsource (lib complex_hierarchy_schlib) (part C))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1366))
(comp (ref C8)
(value 820pF)
(footprint Discret:C2)
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(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1365))
(comp (ref R15)
(value 47)
(footprint Discret:R3-LARGE_PADS)
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(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1364))
(comp (ref R21)
(value 4,7K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1362))
(comp (ref Q5)
(value MPAS92)
(footprint Discret:TO92-CBE)
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(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1360))
(comp (ref R17)
(value 22K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1359))
(comp (ref C6)
(value 15nF)
(footprint Discret:C2)
(libsource (lib complex_hierarchy_schlib) (part C))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1358))
(comp (ref RV2)
(value 4,7K)
(footprint Discret:RV2)
(libsource (lib complex_hierarchy_schlib) (part POT))
(sheetpath (names /ampli_ht_horizontal/) (tstamps /4B3A13A4/))
(tstamp 4B3A1357))
(comp (ref R26)
(value 220K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B617B88))
(comp (ref R25)
(value 47)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B616B96))
(comp (ref D8)
(value 1N4148)
(footprint Discret:D3)
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(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B616AFA))
(comp (ref R10)
(value 5,6K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B61688C))
(comp (ref C12)
(value 150nF)
(footprint Discret:C2)
(libsource (lib complex_hierarchy_schlib) (part C))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B4F3641))
(comp (ref R23)
(value 1K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B4F363E))
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(value MPAS42)
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(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A137D))
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(value MPAS92)
(footprint Discret:TO92-CBE)
(libsource (lib complex_hierarchy_schlib) (part MPSA92))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A137C))
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(tstamp 4B3A137B))
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(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1379))
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(footprint Discret:D3)
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(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1377))
(comp (ref R3)
(value 470)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1376))
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(value 1N4148)
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(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1375))
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(value 220K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1374))
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(value 1K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1371))
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(value 220K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
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(tstamp 4B3A1370))
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(value 1K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A136D))
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(value CONN_2)
(footprint Connect:bornier2)
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(tstamp 4B3A136C))
(comp (ref R6)
(value 22K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A136B))
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(footprint Housings_DIP:DIP-8_W7.62mm_LongPads)
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(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1368))
(comp (ref P4)
(value CONN_2)
(footprint Connect:bornier2)
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(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1367))
(comp (ref C4)
(value 4.7nF)
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(libsource (lib complex_hierarchy_schlib) (part C))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1366))
(comp (ref C5)
(value 820pF)
(footprint Discret:C2)
(libsource (lib complex_hierarchy_schlib) (part C))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1365))
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(value 47)
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(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1364))
(comp (ref R11)
(value 4,7K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1362))
(comp (ref Q1)
(value MPAS92)
(footprint Discret:TO92-CBE)
(libsource (lib complex_hierarchy_schlib) (part MPSA92))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1360))
(comp (ref R7)
(value 22K)
(footprint Discret:R3-LARGE_PADS)
(libsource (lib complex_hierarchy_schlib) (part R))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1359))
(comp (ref C3)
(value 15nF)
(footprint Discret:C2)
(libsource (lib complex_hierarchy_schlib) (part C))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1358))
(comp (ref RV1)
(value 4,7K)
(footprint Discret:RV2)
(libsource (lib complex_hierarchy_schlib) (part POT))
(sheetpath (names /ampli_ht_vertical/) (tstamps /4B3A1333/))
(tstamp 4B3A1357)))
(libparts
(libpart (lib complex_hierarchy_schlib) (part 7805)
(aliases
(alias LM7805)
(alias LM7812)
(alias 78L05))
(fields
(field (name Reference) U)
(field (name Value) 7805))
(pins
(pin (num GND) (name GND) (type input))
(pin (num VI) (name VI) (type input))
(pin (num VO) (name VO) (type power_out))))
(libpart (lib complex_hierarchy_schlib) (part C)
(footprints
(fp C?)
(fp C_????_*)
(fp C_????)
(fp SMD*_c)
(fp Capacitor*))
(fields
(field (name Reference) C)
(field (name Value) C))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
(libpart (lib complex_hierarchy_schlib) (part CONN_2)
(fields
(field (name Reference) P)
(field (name Value) CONN_2))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name PM) (type passive))))
(libpart (lib complex_hierarchy_schlib) (part CP)
(footprints
(fp CP*)
(fp Elko*)
(fp TantalC*)
(fp C*elec)
(fp c_elec*)
(fp SMD*_Pol))
(fields
(field (name Reference) C)
(field (name Value) CP))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
(libpart (lib complex_hierarchy_schlib) (part D_Small)
(footprints
(fp Diode_*)
(fp D-Pak_TO252AA)
(fp *SingleDiode)
(fp *SingleDiode*)
(fp *_Diode_*))
(fields
(field (name Reference) D)
(field (name Value) D_Small))
(pins
(pin (num 1) (name K) (type passive))
(pin (num 2) (name A) (type passive))))
(libpart (lib complex_hierarchy_schlib) (part ICL7660)
(fields
(field (name Reference) U)
(field (name Value) ICL7660))
(pins
(pin (num 2) (name CAP+) (type input))
(pin (num 3) (name GND) (type power_in))
(pin (num 4) (name CAP-) (type input))
(pin (num 5) (name VOUT) (type power_out))
(pin (num 6) (name LV) (type input))
(pin (num 7) (name OSC) (type input))
(pin (num 8) (name V+) (type power_in))))
(libpart (lib complex_hierarchy_schlib) (part LM358)
(aliases
(alias LMC6062)
(alias LMC6082)
(alias LM358N)
(alias TL072)
(alias TL082))
(fields
(field (name Reference) U)
(field (name Value) LM358))
(pins
(pin (num 1) (name ~) (type output))
(pin (num 2) (name -) (type input))
(pin (num 3) (name +) (type input))
(pin (num 4) (name V-) (type power_in))
(pin (num 5) (name +) (type input))
(pin (num 6) (name -) (type input))
(pin (num 7) (name ~) (type output))
(pin (num 8) (name V+) (type power_in))))
(libpart (lib complex_hierarchy_schlib) (part MPSA42)
(footprints
(fp TO92-CBE))
(fields
(field (name Reference) Q)
(field (name Value) MPSA42)
(field (name Footprint) TO92-CBE))
(pins
(pin (num B) (name B) (type input))
(pin (num C) (name C) (type passive))
(pin (num E) (name E) (type passive))))
(libpart (lib complex_hierarchy_schlib) (part MPSA92)
(footprints
(fp TO92-CBE))
(fields
(field (name Reference) Q)
(field (name Value) MPSA92)
(field (name Footprint) TO92-CBE))
(pins
(pin (num B) (name B) (type input))
(pin (num C) (name C) (type passive))
(pin (num E) (name E) (type passive))))
(libpart (lib complex_hierarchy_schlib) (part POT)
(fields
(field (name Reference) RV)
(field (name Value) POT))
(pins
(pin (num 1) (name 1) (type passive))
(pin (num 2) (name 2) (type passive))
(pin (num 3) (name 3) (type passive))))
(libpart (lib complex_hierarchy_schlib) (part R)
(footprints
(fp R_*)
(fp Resistor_*))
(fields
(field (name Reference) R)
(field (name Value) R))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive)))))
(libraries
(library (logical complex_hierarchy_schlib)
(uri F:\kicad-launchpad\git_testing\demos\complex_hierarchy\complex_hierarchy_schlib.lib)))
(nets
(net (code 1) (name GND)
(node (ref R14) (pin 2))
(node (ref P4) (pin 2))
(node (ref C4) (pin 2))
(node (ref C5) (pin 2))
(node (ref U2) (pin GND))
(node (ref U1) (pin 3))
(node (ref R11) (pin 2))
(node (ref P5) (pin 2))
(node (ref C11) (pin 1))
(node (ref R18) (pin 2))
(node (ref C7) (pin 2))
(node (ref C12) (pin 2))
(node (ref C8) (pin 2))
(node (ref P6) (pin 2))
(node (ref Q3) (pin C))
(node (ref R4) (pin 2))
(node (ref R8) (pin 2))
(node (ref P3) (pin 2))
(node (ref P1) (pin 2))
(node (ref R21) (pin 2))
(node (ref C9) (pin 2))
(node (ref Q7) (pin C))
(node (ref C2) (pin 2))
(node (ref P2) (pin 2))
(node (ref C1) (pin 2))
(node (ref C14) (pin 2)))
(net (code 2) (name "Net-(U1-Pad7)")
(node (ref U1) (pin 7)))
(net (code 3) (name "Net-(U1-Pad6)")
(node (ref U1) (pin 6)))
(net (code 4) (name "Net-(C10-Pad2)")
(node (ref U1) (pin 4))
(node (ref C10) (pin 2)))
(net (code 5) (name HT)
(node (ref R3) (pin 1))
(node (ref C9) (pin 1))
(node (ref P1) (pin 1))
(node (ref Q6) (pin C))
(node (ref D5) (pin 2))
(node (ref Q2) (pin C))
(node (ref D2) (pin 2))
(node (ref R13) (pin 1)))
(net (code 6) (name /12Vext)
(node (ref P2) (pin 1))
(node (ref D1) (pin 2)))
(net (code 7) (name +12C)
(node (ref U3) (pin 8))
(node (ref D1) (pin 1))
(node (ref C2) (pin 1))
(node (ref U4) (pin 8))
(node (ref U2) (pin VI)))
(net (code 8) (name VCC)
(node (ref U2) (pin VO))
(node (ref C1) (pin 1))
(node (ref U1) (pin 8)))
(net (code 9) (name -VAA)
(node (ref U4) (pin 4))
(node (ref U3) (pin 4))
(node (ref U1) (pin 5))
(node (ref C11) (pin 2)))
(net (code 10) (name "Net-(C10-Pad1)")
(node (ref U1) (pin 2))
(node (ref C10) (pin 1)))
(net (code 11) (name "Net-(C5-Pad1)")
(node (ref C5) (pin 1))
(node (ref R10) (pin 2)))
(net (code 12) (name "Net-(Q4-PadE)")
(node (ref Q4) (pin E))
(node (ref R9) (pin 1)))
(net (code 13) (name "Net-(D8-Pad2)")
(node (ref D8) (pin 2))
(node (ref Q2) (pin B))
(node (ref Q1) (pin C)))
(net (code 14) (name "Net-(Q4-PadB)")
(node (ref R8) (pin 1))
(node (ref Q4) (pin B)))
(net (code 15) (name "Net-(D4-Pad2)")
(node (ref D4) (pin 2))
(node (ref D8) (pin 1)))
(net (code 16) (name "Net-(Q3-PadE)")
(node (ref Q3) (pin E))
(node (ref R12) (pin 2))
(node (ref R25) (pin 2)))
(net (code 17) (name "Net-(Q2-PadE)")
(node (ref R5) (pin 2))
(node (ref Q2) (pin E))
(node (ref R26) (pin 2)))
(net (code 18) (name /ampli_ht_vertical/PIEZO_IN)
(node (ref R23) (pin 2))
(node (ref P4) (pin 1)))
(net (code 19) (name "Net-(R9-Pad2)")
(node (ref R9) (pin 2))
(node (ref U3) (pin 1)))
(net (code 20) (name "Net-(D3-Pad1)")
(node (ref Q1) (pin B))
(node (ref R4) (pin 1))
(node (ref D3) (pin 1)))
(net (code 21) (name "Net-(R11-Pad1)")
(node (ref RV1) (pin 1))
(node (ref R11) (pin 1)))
(net (code 22) (name "Net-(Q1-PadE)")
(node (ref Q1) (pin E))
(node (ref R3) (pin 2)))
(net (code 23) (name "Net-(RV1-Pad2)")
(node (ref RV1) (pin 2))
(node (ref U3) (pin 2)))
(net (code 24) (name /ampli_ht_vertical/PIEZO_OUT)
(node (ref R25) (pin 1))
(node (ref R5) (pin 1))
(node (ref P3) (pin 1)))
(net (code 25) (name "Net-(D2-Pad1)")
(node (ref D3) (pin 2))
(node (ref D2) (pin 1)))
(net (code 26) (name /ampli_ht_vertical/Vpil_0_3,3V)
(node (ref C3) (pin 1))
(node (ref U3) (pin 7))
(node (ref U3) (pin 6))
(node (ref U3) (pin 3)))
(net (code 27) (name "Net-(C12-Pad1)")
(node (ref R23) (pin 1))
(node (ref R6) (pin 2))
(node (ref C12) (pin 1)))
(net (code 28) (name "Net-(C3-Pad2)")
(node (ref R6) (pin 1))
(node (ref R7) (pin 2))
(node (ref C3) (pin 2)))
(net (code 29) (name "Net-(D4-Pad1)")
(node (ref R10) (pin 1))
(node (ref Q3) (pin B))
(node (ref D4) (pin 1))
(node (ref Q4) (pin C)))
(net (code 30) (name "Net-(C4-Pad1)")
(node (ref C4) (pin 1))
(node (ref R7) (pin 1))
(node (ref U3) (pin 5)))
(net (code 31) (name /ampli_ht_vertical/S_OUT+)
(node (ref R26) (pin 1))
(node (ref RV1) (pin 3))
(node (ref R12) (pin 1)))
(net (code 32) (name "Net-(C8-Pad1)")
(node (ref C8) (pin 1))
(node (ref R20) (pin 2)))
(net (code 33) (name "Net-(Q8-PadE)")
(node (ref Q8) (pin E))
(node (ref R19) (pin 1)))
(net (code 34) (name "Net-(Q8-PadB)")
(node (ref R18) (pin 1))
(node (ref Q8) (pin B)))
(net (code 35) (name "Net-(D7-Pad2)")
(node (ref D9) (pin 1))
(node (ref D7) (pin 2)))
(net (code 36) (name "Net-(Q7-PadE)")
(node (ref R22) (pin 2))
(node (ref Q7) (pin E))
(node (ref R27) (pin 2)))
(net (code 37) (name "Net-(Q6-PadE)")
(node (ref R15) (pin 2))
(node (ref Q6) (pin E))
(node (ref R28) (pin 2)))
(net (code 38) (name /ampli_ht_horizontal/PIEZO_IN)
(node (ref R24) (pin 2))
(node (ref P6) (pin 1)))
(net (code 39) (name "Net-(Q5-PadE)")
(node (ref R13) (pin 2))
(node (ref Q5) (pin E)))
(net (code 40) (name "Net-(D6-Pad1)")
(node (ref D6) (pin 1))
(node (ref Q5) (pin B))
(node (ref R14) (pin 1)))
(net (code 41) (name "Net-(R21-Pad1)")
(node (ref R21) (pin 1))
(node (ref RV2) (pin 1)))
(net (code 42) (name "Net-(D9-Pad2)")
(node (ref Q6) (pin B))
(node (ref Q5) (pin C))
(node (ref D9) (pin 2)))
(net (code 43) (name "Net-(R19-Pad2)")
(node (ref R19) (pin 2))
(node (ref U4) (pin 1)))
(net (code 44) (name "Net-(RV2-Pad2)")
(node (ref U4) (pin 2))
(node (ref RV2) (pin 2)))
(net (code 45) (name /ampli_ht_horizontal/PIEZO_OUT)
(node (ref R15) (pin 1))
(node (ref P5) (pin 1))
(node (ref R27) (pin 1)))
(net (code 46) (name /ampli_ht_horizontal/Vpil_0_3,3V)
(node (ref U4) (pin 6))
(node (ref U4) (pin 7))
(node (ref C6) (pin 1))
(node (ref U4) (pin 3)))
(net (code 47) (name "Net-(C14-Pad1)")
(node (ref R16) (pin 2))
(node (ref R24) (pin 1))
(node (ref C14) (pin 1)))
(net (code 48) (name "Net-(C6-Pad2)")
(node (ref R17) (pin 2))
(node (ref C6) (pin 2))
(node (ref R16) (pin 1)))
(net (code 49) (name "Net-(D7-Pad1)")
(node (ref D7) (pin 1))
(node (ref Q7) (pin B))
(node (ref Q8) (pin C))
(node (ref R20) (pin 1)))
(net (code 50) (name "Net-(C7-Pad1)")
(node (ref C7) (pin 1))
(node (ref R17) (pin 1))
(node (ref U4) (pin 5)))
(net (code 51) (name /ampli_ht_horizontal/S_OUT+)
(node (ref R28) (pin 1))
(node (ref RV2) (pin 3))
(node (ref R22) (pin 1)))
(net (code 52) (name "Net-(D5-Pad1)")
(node (ref D5) (pin 1))
(node (ref D6) (pin 2)))))

View File

@ -1,272 +0,0 @@
update=Tue 21 Jan 2020 12:19:00 PM EST
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[general]
version=1
[eeschema]
version=1
LibDir=
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
LastSTEPExportPath=
LastIDFExportPath=
LastVRMLExportPath=
LastSpecctraDSNExportPath=
LastGenCADExportPath=
CopperLayerCount=2
BoardThickness=1.6002
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2032
MinViaDiameter=0.889
MinViaDrill=0.508
MinMicroViaDiameter=0.508
MinMicroViaDrill=0.2032
MinHoleToHole=0.25
CopperEdgeClearance=0.01
TrackWidth1=0.4
ViaDiameter1=1.651
ViaDrill1=0.6
dPairWidth1=0.4
dPairGap1=0.35
dPairViaGap1=0.25
SilkLineWidth=0.2
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.2
SilkTextItalic=0
SilkTextUpright=0
CopperLineWidth=0.3
CopperTextSizeV=2
CopperTextSizeH=2
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=0
EdgeCutLineWidth=0.09999999999999999
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=0
DimensionUnits=0
DimensionPrecision=1
SolderMaskClearance=0.254
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=top_copper
Type=1
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=bottom_copper
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.3
TrackWidth=0.4
ViaDiameter=1.651
ViaDrill=0.6
uViaDiameter=0.508
uViaDrill=0.2032
dPairWidth=0.4
dPairGap=0.35
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=power
Clearance=0.3
TrackWidth=0.6
ViaDiameter=1.651
ViaDrill=0.6
uViaDiameter=0.508
uViaDrill=0.2032
dPairWidth=0.4
dPairGap=0.35
dPairViaGap=0.25
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_WriteFile=0
ERC_TestSimilarLabels=1
ERC_CheckUniqueGlobalLabels=1
ERC_CheckBusDriverConflicts=1
ERC_CheckBusEntryConflicts=1
ERC_CheckBusToBusConflicts=1
ERC_CheckBusToNetConflicts=1

View File

@ -1,445 +0,0 @@
EESchema Schematic File Version 5
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 3
Title "Complex hierarchy: demo"
Date "2017-01-15"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
Comment5 ""
Comment6 ""
Comment7 ""
Comment8 ""
Comment9 ""
$EndDescr
NoConn ~ 8800 3050
Connection ~ 9200 2750
Wire Wire Line
9200 2650 9200 2750
Wire Wire Line
6650 2900 6650 3000
Wire Wire Line
6650 3000 7050 3000
Wire Wire Line
7050 3000 7050 2850
Wire Wire Line
7050 2850 7100 2850
Wire Wire Line
9200 2350 9200 2250
Connection ~ 2500 1300
Wire Wire Line
8300 1300 9200 1300
Wire Wire Line
2800 2500 3000 2500
Wire Wire Line
2500 1250 2500 1300
Wire Wire Line
3800 2500 3800 2450
Wire Wire Line
2100 2800 2100 2700
Wire Wire Line
2100 2700 2000 2700
Wire Wire Line
2000 2500 2600 2500
Wire Wire Line
3200 2900 3200 3000
Wire Wire Line
3200 2500 3200 2600
Connection ~ 3200 2500
Wire Wire Line
3550 2450 3550 2500
Connection ~ 3550 2500
Wire Wire Line
3000 2500 3000 2450
Connection ~ 3000 2500
Wire Wire Line
7400 1250 7400 1300
Wire Wire Line
7400 1300 7500 1300
Wire Wire Line
9200 1750 9200 1800
Wire Wire Line
9200 1250 9200 1300
Connection ~ 9200 1300
Wire Wire Line
2200 1650 2200 1700
Wire Wire Line
2500 1650 2500 1700
Wire Wire Line
6650 2600 6650 2500
Wire Wire Line
6650 2500 7050 2500
Wire Wire Line
7050 2500 7050 2650
Wire Wire Line
7050 2650 7100 2650
Wire Wire Line
8800 2750 9200 2750
$Comp
L complex_hierarchy_schlib:CP C10
U 1 1 4B4B15E7
P 6650 2750
F 0 "C10" H 6800 2800 50 0000 L CNN
F 1 "10uF" H 6800 2750 50 0000 L TNN
F 2 "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" H 6800 2650 10 0000 C CNN
F 3 "" H 6650 2750 60 0001 C CNN
1 6650 2750
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:GND #PWR01
U 1 1 4B4B15DA
P 9050 2300
F 0 "#PWR01" H 9050 2300 30 0001 C CNN
F 1 "GND" H 9050 2230 30 0001 C CNN
F 2 "" H 9050 2300 10 0001 C CNN
F 3 "" H 9050 2300 60 0001 C CNN
1 9050 2300
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:CP C11
U 1 1 4B4B15D9
P 9200 2500
F 0 "C11" H 9350 2550 50 0000 L CNN
F 1 "10uF" H 9350 2500 50 0000 L TNN
F 2 "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" H 9550 2400 10 0000 C CNN
F 3 "" H 9200 2500 60 0001 C CNN
1 9200 2500
1 0 0 -1
$EndComp
NoConn ~ 7100 3050
$Comp
L complex_hierarchy_schlib:-VAA #PWR02
U 1 1 4B4B1578
P 9350 2750
F 0 "#PWR02" H 9350 2850 20 0001 C CNN
F 1 "-VAA" V 9350 2950 40 0000 C CNN
F 2 "" H 9350 2750 10 0001 C CNN
F 3 "" H 9350 2750 60 0001 C CNN
1 9350 2750
0 1 1 0
$EndComp
$Comp
L complex_hierarchy_schlib:7805 U2
U 1 1 4B4B1532
P 7900 1350
F 0 "U2" H 7900 1650 60 0000 C CNN
F 1 "78L05" H 7900 1550 60 0000 C CNN
F 2 "Package_TO_SOT_THT:TO-92_HandSolder" H 8150 1150 10 0000 C CNN
F 3 "" H 7900 1350 60 0001 C CNN
1 7900 1350
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:VCC #PWR03
U 1 1 4B4B1253
P 7900 2200
F 0 "#PWR03" H 7900 2300 30 0001 C CNN
F 1 "VCC" H 7900 2300 40 0000 C CNN
F 2 "" H 7900 2200 10 0001 C CNN
F 3 "" H 7900 2200 60 0001 C CNN
1 7900 2200
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:VCC #PWR04
U 1 1 4B4B124E
P 9200 1250
F 0 "#PWR04" H 9200 1350 30 0001 C CNN
F 1 "VCC" H 9200 1350 40 0000 C CNN
F 2 "" H 9200 1250 10 0001 C CNN
F 3 "" H 9200 1250 60 0001 C CNN
1 9200 1250
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:GND #PWR05
U 1 1 4B4B1237
P 7900 3600
F 0 "#PWR05" H 7900 3600 30 0001 C CNN
F 1 "GND" H 7900 3530 30 0001 C CNN
F 2 "" H 7900 3600 10 0001 C CNN
F 3 "" H 7900 3600 60 0001 C CNN
1 7900 3600
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:ICL7660 U1
U 1 1 4B4B1230
P 7950 2900
F 0 "U1" H 7400 3300 70 0000 L CNN
F 1 "ICL7660" H 8500 2450 70 0000 R CNN
F 2 "Package_DIP:DIP-8_W7.62mm_LongPads" H 8250 2350 10 0000 C CNN
F 3 "" H 7950 2900 60 0001 C CNN
1 7950 2900
1 0 0 -1
$EndComp
Text Label 2150 2500 0 60 ~ 0
12Vext
$Comp
L complex_hierarchy_schlib:CP C9
U 1 1 4B3A1558
P 2500 1500
F 0 "C9" H 2650 1550 50 0000 L CNN
F 1 "47uF/63V" H 2650 1500 50 0000 L TNN
F 2 "Capacitor_THT:CP_Axial_L11.0mm_D6.0mm_P18.00mm_Horizontal" H 2800 1400 10 0000 C CNN
F 3 "" H 2500 1500 60 0001 C CNN
1 2500 1500
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:GND #PWR06
U 1 1 4B3A1557
P 2500 1700
F 0 "#PWR06" H 2500 1700 30 0001 C CNN
F 1 "GND" H 2500 1630 30 0001 C CNN
F 2 "" H 2500 1700 10 0001 C CNN
F 3 "" H 2500 1700 60 0001 C CNN
1 2500 1700
1 0 0 -1
$EndComp
$Sheet
S 6100 4400 2000 1450
U 4B3A13A4
F0 "ampli_ht_horizontal" 60
F1 "ampli_ht.sch" 60
$EndSheet
$Sheet
S 2800 4400 2000 1450
U 4B3A1333
F0 "ampli_ht_vertical" 60
F1 "ampli_ht.sch" 60
$EndSheet
$Comp
L complex_hierarchy_schlib:GND #PWR07
U 1 1 4B3A1302
P 2200 1750
F 0 "#PWR07" H 2200 1750 30 0001 C CNN
F 1 "GND" H 2200 1680 30 0001 C CNN
F 2 "" H 2200 1750 10 0001 C CNN
F 3 "" H 2200 1750 60 0001 C CNN
1 2200 1750
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:CONN_2 P1
U 1 1 4B3A12F4
P 1650 1400
F 0 "P1" V 1600 1400 40 0000 C CNN
F 1 "CONN_2" V 1700 1400 40 0000 C CNN
F 2 "TerminalBlock_Altech:Altech_AK300_1x02_P5.00mm_45-Degree" H 1650 1200 10 0000 C CNN
F 3 "" H 1650 1400 60 0001 C CNN
1 1650 1400
-1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:HT #PWR08
U 1 1 4B0FA68B
P 2500 1250
F 0 "#PWR08" H 2500 1370 20 0001 C CNN
F 1 "HT" H 2500 1340 30 0000 C CNN
F 2 "" H 2500 1250 10 0001 C CNN
F 3 "" H 2500 1250 60 0001 C CNN
1 2500 1250
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:CP C1
U 1 1 4B03CEC2
P 9200 1600
F 0 "C1" H 9350 1650 50 0000 L CNN
F 1 "47uF" H 9350 1600 50 0000 L TNN
F 2 "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" H 9500 1500 10 0000 C CNN
F 3 "" H 9200 1600 60 0001 C CNN
1 9200 1600
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:GND #PWR09
U 1 1 4B03CEC1
P 9200 1800
F 0 "#PWR09" H 9200 1800 30 0001 C CNN
F 1 "GND" H 9200 1730 30 0001 C CNN
F 2 "" H 9200 1800 10 0001 C CNN
F 3 "" H 9200 1800 60 0001 C CNN
1 9200 1800
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:GND #PWR010
U 1 1 4B03CE88
P 7900 1650
F 0 "#PWR010" H 7900 1650 30 0001 C CNN
F 1 "GND" H 7900 1580 30 0001 C CNN
F 2 "" H 7900 1650 10 0001 C CNN
F 3 "" H 7900 1650 60 0001 C CNN
1 7900 1650
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:+12C #PWR011
U 1 1 4B03CE6C
P 7400 1250
F 0 "#PWR011" H 7400 1220 30 0001 C CNN
F 1 "+12C" H 7400 1360 40 0000 C CNN
F 2 "" H 7400 1250 10 0001 C CNN
F 3 "" H 7400 1250 60 0001 C CNN
1 7400 1250
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:PWR_FLAG #U012
U 1 1 4B03CAA3
P 2200 1250
F 0 "#U012" H 2200 1520 30 0001 C CNN
F 1 "PWR_FLAG" H 2200 1480 30 0000 C CNN
F 2 "" H 2200 1250 10 0001 C CNN
F 3 "" H 2200 1250 60 0001 C CNN
1 2200 1250
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:PWR_FLAG #U013
U 1 1 4B03C9F9
P 3000 2450
F 0 "#U013" H 3000 2720 30 0001 C CNN
F 1 "PWR_FLAG" H 3000 2680 30 0000 C CNN
F 2 "" H 3000 2450 10 0001 C CNN
F 3 "" H 3000 2450 60 0001 C CNN
1 3000 2450
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:+12C #PWR014
U 1 1 4B03C68D
P 3800 2450
F 0 "#PWR014" H 3800 2420 30 0001 C CNN
F 1 "+12C" H 3800 2560 40 0000 C CNN
F 2 "" H 3800 2450 10 0001 C CNN
F 3 "" H 3800 2450 60 0001 C CNN
1 3800 2450
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:PWR_FLAG #U015
U 1 1 4AE17C31
P 2200 1650
F 0 "#U015" H 2200 1920 30 0001 C CNN
F 1 "PWR_FLAG" H 2200 1880 30 0000 C CNN
F 2 "" H 2200 1650 10 0001 C CNN
F 3 "" H 2200 1650 60 0001 C CNN
1 2200 1650
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:+12V #U016
U 1 1 4AE173EF
P 3550 2450
F 0 "#U016" H 3550 2400 20 0001 C CNN
F 1 "+12V" H 3550 2550 40 0000 C CNN
F 2 "" H 3550 2450 10 0001 C CNN
F 3 "" H 3550 2450 60 0001 C CNN
1 3550 2450
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:GND #PWR017
U 1 1 4AE173D0
P 3200 3000
F 0 "#PWR017" H 3200 3000 30 0001 C CNN
F 1 "GND" H 3200 2930 30 0001 C CNN
F 2 "" H 3200 3000 10 0001 C CNN
F 3 "" H 3200 3000 60 0001 C CNN
1 3200 3000
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:CP C2
U 1 1 4AE173CF
P 3200 2750
F 0 "C2" H 3350 2800 50 0000 L CNN
F 1 "47uF/20V" H 3350 2700 50 0000 L TNN
F 2 "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" H 3550 2600 10 0000 C CNN
F 3 "" H 3200 2750 60 0001 C CNN
1 3200 2750
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:D_Small D1
U 1 1 4AE172F4
P 2700 2500
F 0 "D1" H 2700 2400 40 0000 C CNN
F 1 "1N4007" H 2700 2600 40 0000 C CNN
F 2 "Diode_THT:D_DO-41_SOD81_P12.70mm_Horizontal" H 2700 2350 10 0000 C CNN
F 3 "" H 2700 2500 60 0001 C CNN
1 2700 2500
-1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:GND #PWR018
U 1 1 4AD71B8E
P 2100 2800
F 0 "#PWR018" H 2100 2800 30 0001 C CNN
F 1 "GND" H 2100 2730 30 0001 C CNN
F 2 "" H 2100 2800 10 0001 C CNN
F 3 "" H 2100 2800 60 0001 C CNN
1 2100 2800
1 0 0 -1
$EndComp
$Comp
L complex_hierarchy_schlib:CONN_2 P2
U 1 1 4AD71B06
P 1650 2600
F 0 "P2" V 1600 2600 40 0000 C CNN
F 1 "CONN_2" V 1700 2600 40 0000 C CNN
F 2 "TerminalBlock_Altech:Altech_AK300_1x02_P5.00mm_45-Degree" H 1650 2400 10 0000 C CNN
F 3 "" H 1650 2600 60 0001 C CNN
1 1650 2600
-1 0 0 -1
$EndComp
Wire Wire Line
2200 1250 2200 1300
Connection ~ 2200 1300
Wire Wire Line
2000 1300 2200 1300
Wire Wire Line
2000 1500 2100 1500
Wire Wire Line
2100 1500 2100 1700
Wire Wire Line
2100 1700 2200 1700
Connection ~ 2200 1700
Wire Wire Line
9050 2300 9050 2250
Wire Wire Line
9050 2250 9200 2250
Wire Wire Line
7900 2200 7900 2250
Wire Wire Line
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View File

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(property "Reference" "#PWR" (id 0) (at 0 -3.81 0)
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View File

@ -1,3 +1,3 @@
(sym_lib_table
(lib (name complex_hierarchy_schlib)(type Legacy)(uri ${KIPRJMOD}/complex_hierarchy_schlib.lib)(options "")(descr ""))
(lib (name "complex_hierarchy_schlib")(type "KiCad")(uri "${KIPRJMOD}/complex_hierarchy_schlib.kicad_sym")(options "")(descr ""))
)

View File

@ -1,183 +0,0 @@
EESchema-DOCLIB Version 2.0 Date: 24/11/2004-17:23:54
#
$CMP A_1KVA
D Absorbeur d'ondes 1KVA
K Parafoudre
$ENDCMP
#
$CMP B_8
D Boite de connexion
K Boite
$ENDCMP
#
$CMP C_3x1.5mm2
D Cable 3 conducteurs 1,5 mm2
K Cable
$ENDCMP
#
$CMP C_3x2.5mm2
D Cable 3 conducteurs 2,5 mm2
K Cable
$ENDCMP
#
$CMP C_3x6mm2
D Cable 3 conducteurs 6 mm2
K Cable
$ENDCMP
#
$CMP D_06A
D Disjoncteur thermique 6A
K Disjoncteur
$ENDCMP
#
$CMP D_10A
D Disjoncteur thermique 10A
K Disjoncteur
$ENDCMP
#
$CMP D_16A
D Disjoncteur thermique 16A
K Disjoncteur
$ENDCMP
#
$CMP D_32A
D Disjoncteur thermique 32A
K Disjoncteur
$ENDCMP
#
$CMP E_09W
D Eclairage 9W (basse consommation)
K Eclairage
$ENDCMP
#
$CMP F_10A
D Fusible 10A
K Fusible
$ENDCMP
#
$CMP G_Th_3KVA
D Groupe electrogene diesel 3KVA
K Groupe
$ENDCMP
#
$CMP I_25A_LUM
D Interrupteur 6A
K Interrupteur
$ENDCMP
#
$CMP I_6A
D Interrupteur 6A
K Interrupteur
$ENDCMP
#
$CMP J_40A_30mA
D Interrupteur 40A differentiel 30mA avec signalisation
K Interrupteur
$ENDCMP
#
$CMP M_1.5KVA
D Moteur electrique 1,5 KVA
K Moteur
$ENDCMP
#
$CMP O_600VA
D Onduleur 600VA batterie 24V 48A (1100W)
K Onduleur
$ENDCMP
#
$CMP O_900VA
D Onduleur 900VA batterie 24V 48A (1100W)
K Onduleur
$ENDCMP
#
$CMP P_10A
D Prise 10A
K Prise
$ENDCMP
#
$CMP P_10A_LUM
D Prise 10A avec temoin
K Prise
$ENDCMP
#
$CMP P_10A_ROU
D Prise 10A rouge (circuit protege)
K Prise
$ENDCMP
#
$CMP P_16A
D Prise 16A
K Prise
$ENDCMP
#
$CMP Q_25A_2F2O
D Contacteur 25A 2 fermes et 2 ouverts avec signalisation
K Contacteur
$ENDCMP
#
$CMP Q_2A_12O_40KV
D Contacteur 2A 12 ouverts a grand cartement 40000V
K Contacteur
$ENDCMP
#
$CMP R_16A_30mA
D Disjoncteur 16A differentiel 30mA avec motorisation et signalisation
K Disjoncteur
$ENDCMP
#
$CMP R_45A_500mA
D Disjoncteur 45A differentiel 500mA avec motorisation et signalisation
K Disjoncteur
$ENDCMP
#
$CMP S_63A
D Sectionneur 63A avec signalisation
K Sectionneur
$ENDCMP
#
$CMP V_A10A
D Amperemetre 10A
K Mesure
$ENDCMP
#
$CMP V_F50Hz
D Frequencemetre 50Hz
K Mesure
$ENDCMP
#
$CMP V_U400V
D Voltmetre 400V
K Mesure
$ENDCMP
#
$CMP W_15KA
D Parafoudre 15 KA avec signalisation
K Parafoudre
$ENDCMP
#
$CMP W_40KA
D Parafoudre 40KA avec signalisation
K Parafoudre
$ENDCMP
#
$CMP W_65KA
D Parafoudre 65KA avec signalisation
K Parafoudre
$ENDCMP
#
$CMP X_Sati
D Bloc de secours SATI
K Secours
$ENDCMP
#
$CMP Y_ELC
D Terre electrique
K Terre
$ENDCMP
#
$CMP Y_RAD
D Terre radio
K Terre
$ENDCMP
#
#End Doc Library

File diff suppressed because it is too large Load Diff

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@ -1,696 +0,0 @@
EESchema-LIBRARY Version 2.2 Date: 24/11/2004-17:23:54
#
# A_1KVA
#
DEF A_1KVA EA 0 10 N Y 1 0 N
F0 "EA" -90 200 50 H V C C
F1 "A_1KVA" 0 130 50 H V C C
DRAW
S -120 60 120 -60 0 1 0 N
X ~ 3 0 -100 50 U 10 50 1 1 I
X ~ 1 200 0 100 L 10 40 1 1 w
X ~ 2 -200 0 100 R 10 40 1 1 w
P 5 0 1 0 0 -30 -20 -50 20 -50 0 -30 0 -30 F
P 4 0 1 0 50 10 80 10 100 0 100 0 N
P 2 0 0 0 200 -200 200 -200 N
P 4 0 1 0 -100 0 -80 10 -50 10 -50 10 N
C 20 10 31 0 1 0 N
C -20 10 31 0 1 0 N
ENDDRAW
ENDDEF
#
# B_8
#
DEF B_8 EB 0 10 N Y 1 0 N
F0 "EB" -280 160 50 H V C C
F1 "B_8" 0 0 50 H V C C
DRAW
S -100 100 -100 100 0 0 0 N
S -100 100 100 -100 0 0 0 N
S -100 100 -100 100 0 0 0 N
X ~ 7 -50 150 50 D 10 40 1 1 U
X ~ 6 -150 50 50 R 10 40 1 1 U
X ~ 8 50 150 50 D 10 40 1 1 U
X ~ 5 -150 -50 50 R 10 40 1 1 U
X ~ 1 150 50 50 L 10 40 1 1 U
X ~ 2 150 -50 50 L 10 40 1 1 U
X ~ 3 50 -150 50 U 10 40 1 1 U
X ~ 4 -50 -150 50 U 10 40 1 1 U
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# C_3x1.5mm2
#
DEF C_3x1.5mm2 EC 0 10 N Y 1 0 N
F0 "EC" -170 130 50 H V C C
F1 "C_3x1.5mm2" 0 -100 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 100 L 10 40 1 1 W
P 3 0 1 0 -110 50 -30 -50 -30 -50 N
P 3 0 1 0 -30 50 50 -50 50 -50 N
P 3 0 1 0 -130 50 -90 50 -90 50 N
P 3 0 1 0 10 50 90 -50 90 -50 N
P 4 0 1 0 -100 0 100 0 100 0 100 0 N
P 2 0 0 0 200 -200 200 -200 N
C -30 50 10 0 1 0 F
ENDDRAW
ENDDEF
#
# C_3x2.5mm2
#
DEF C_3x2.5mm2 EC 0 10 N Y 1 0 N
F0 "EC" -170 130 50 H V C C
F1 "C_3x2.5mm2" 0 -100 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 100 L 10 40 1 1 W
P 3 0 1 0 -110 50 -30 -50 -30 -50 N
P 3 0 1 0 -30 50 50 -50 50 -50 N
P 3 0 1 0 -130 50 -90 50 -90 50 N
P 3 0 1 0 10 50 90 -50 90 -50 N
P 4 0 1 0 -100 0 100 0 100 0 100 0 N
P 2 0 0 0 200 -200 200 -200 N
C -30 50 10 0 1 0 F
ENDDRAW
ENDDEF
#
# C_3x6mm2
#
DEF C_3x6mm2 EC 0 10 N Y 1 0 N
F0 "EC" -170 130 50 H V C C
F1 "C_3x6mm2" 0 -100 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 100 L 10 40 1 1 W
P 3 0 1 0 -110 50 -30 -50 -30 -50 N
P 3 0 1 0 -30 50 50 -50 50 -50 N
P 3 0 1 0 -130 50 -90 50 -90 50 N
P 3 0 1 0 10 50 90 -50 90 -50 N
P 4 0 1 0 -100 0 100 0 100 0 100 0 N
P 2 0 0 0 200 -200 200 -200 N
C -30 50 10 0 1 0 F
ENDDRAW
ENDDEF
#
# D_06A
#
DEF D_06A ED 0 10 N Y 1 0 N
F0 "ED" -160 120 50 H V C C
F1 "D_06A" -100 -80 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 120 L 10 40 1 1 W
P 3 0 1 0 60 20 100 -20 100 -20 N
P 3 0 1 0 100 20 60 -20 60 -20 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# D_10A
#
DEF D_10A ED 0 10 N Y 1 0 N
F0 "ED" -160 120 50 H V C C
F1 "D_10A" -100 -80 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 120 L 10 40 1 1 W
P 3 0 1 0 60 20 100 -20 100 -20 N
P 3 0 1 0 100 20 60 -20 60 -20 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# D_16A
#
DEF D_16A ED 0 10 N Y 1 0 N
F0 "ED" -160 120 50 H V C C
F1 "D_16A" -100 -80 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 120 L 10 40 1 1 W
P 3 0 1 0 60 20 100 -20 100 -20 N
P 3 0 1 0 100 20 60 -20 60 -20 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# D_32A
#
DEF D_32A ED 0 10 N Y 1 0 N
F0 "ED" -160 120 50 H V C C
F1 "D_32A" -100 -80 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 120 L 10 40 1 1 W
P 3 0 1 0 60 20 100 -20 100 -20 N
P 3 0 1 0 100 20 60 -20 60 -20 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# E_09W
#
DEF E_09W EE 0 10 N Y 1 0 N
F0 "EE" -160 120 50 H V C C
F1 "E_09W" -80 -140 50 H V C C
DRAW
X ~ 1 200 0 118 L 10 40 1 1 W
P 3 0 1 0 -60 -60 60 60 60 60 N
P 4 0 1 0 -60 60 60 -60 60 -60 60 -60 N
P 2 0 0 0 200 -200 200 -200 N
C 0 0 84 0 1 0 N
ENDDRAW
ENDDEF
#
# F_10A
#
DEF F_10A EF 0 10 N Y 1 0 N
F0 "EF" -180 80 50 H V C C
F1 "F_10A" -100 -80 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 120 L 10 40 1 1 W
P 6 0 1 0 -100 20 -100 -20 80 -20 80 20 -100 20 -100 20 N
P 4 0 1 0 80 0 -100 0 -100 0 -100 0 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# G_Th_3KVA
#
DEF G_Th_3KVA EG 0 10 N Y 1 0 N
F0 "EG" -160 120 50 H V C C
F1 "G_Th_3KVA" 0 -120 50 H V C C
DRAW
X ~ 1 200 0 118 L 10 40 1 1 w
T 0 0 0 70 0 0 0 G
P 2 0 0 0 200 -200 200 -200 N
C 0 0 84 0 1 0 N
ENDDRAW
ENDDEF
#
# I_25A_LUM
#
DEF I_25A_LUM EI 0 10 N Y 1 0 N
F0 "EI" -160 120 50 H V C C
F1 "I_25A_LUM" 0 -100 50 H V C C
DRAW
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 120 L 10 40 1 1 W
P 3 0 1 0 30 20 -30 -20 -30 -20 N
P 4 0 1 0 -20 30 20 -30 20 -30 20 -30 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 2 0 0 0 200 -200 200 -200 N
C 0 0 36 0 1 0 N
ENDDRAW
ENDDEF
#
# I_6A
#
DEF I_6A EI 0 10 N Y 1 0 N
F0 "EI" -160 120 50 H V C C
F1 "I_6A" -120 -80 50 H V C C
DRAW
X ~ 1 200 0 120 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
P 3 0 1 0 -100 0 60 100 60 100 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# J_40A_30mA
#
DEF J_40A_30mA EJ 0 10 N Y 1 0 N
F0 "EJ" -210 180 50 H V C C
F1 "J_40A_30mA" -20 -120 50 H V C C
DRAW
A -120 60 20 1799 1 0 1 0 N
X ~ 1 250 0 130 L 10 40 1 1 W
X ~ 2 -250 0 110 R 10 40 1 1 w
X ~ 3 250 200 70 L 10 10 1 1 O
T 0 120 200 20 0 0 0 OFS
P 3 0 1 0 -140 0 -60 0 -60 0 N
P 5 0 0 0 120 20 120 -20 120 -20 120 -20 120 -20 N
P 5 0 1 0 -100 60 -100 -60 -100 -40 -100 -40 -100 -40 N
P 5 0 1 0 -140 -60 -100 -60 -100 -60 -100 -60 -100 -60 N
P 6 0 1 0 -120 80 -120 120 40 120 40 60 40 60 40 60 N
P 3 0 1 0 -60 0 100 100 100 100 N
P 10 0 1 0 60 80 60 200 80 200 80 220 160 220 180 200 160 180 80 180 80 200 80 200 N
P 3 0 1 0 -140 60 -140 -60 -140 -60 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# M_1.5KVA
#
DEF M_1.5KVA EM 0 10 N Y 1 0 N
F0 "EM" -160 120 50 H V C C
F1 "M_1.5KVA" -20 -140 50 H V C C
DRAW
X ~ 1 200 0 118 L 10 40 1 1 W
T 0 0 0 70 0 0 0 M
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 -80 0 -80 0 N
C 0 0 84 0 1 0 N
ENDDRAW
ENDDEF
#
# O_600VA
#
DEF O_600VA EO 0 10 N Y 1 0 N
F0 "EO" -70 120 50 H V C C
F1 "O_600VA" -40 -150 50 H V C C
DRAW
S -110 40 120 -90 0 1 0 N
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 100 L 10 40 1 1 W
P 3 0 1 0 10 -50 10 -70 10 -70 N
P 3 0 1 0 50 0 100 0 100 0 N
P 3 0 1 0 70 -50 70 -70 70 -70 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -30 -50 -30 -70 -30 -70 N
P 3 0 1 0 100 -40 100 -80 100 -80 N
P 3 0 1 0 20 -40 20 -80 20 -80 N
P 3 0 1 0 50 -50 50 -70 50 -70 N
P 3 0 1 0 80 -40 80 -80 80 -80 N
P 3 0 1 0 -50 -50 -50 -70 -50 -70 N
P 5 0 1 0 -100 -60 100 -60 100 -60 100 -60 100 -60 N
P 3 0 1 0 -70 -50 -70 -70 -70 -70 N
P 3 0 1 0 -40 -40 -40 -80 -40 -80 N
P 3 0 1 0 -90 -50 -90 -70 -90 -70 N
P 4 0 1 0 90 -50 90 -70 90 -70 90 -70 N
P 3 0 1 0 -100 0 -50 0 -50 0 N
P 3 0 1 0 -80 -40 -80 -80 -80 -80 N
P 3 0 1 0 60 -40 60 -80 60 -80 N
P 3 0 1 0 -20 -40 -20 -80 -20 -80 N
P 3 0 1 0 -60 -40 -60 -80 -60 -80 N
P 3 0 1 0 40 -40 40 -80 40 -80 N
P 3 0 1 0 -10 -50 -10 -70 -10 -70 N
P 3 0 1 0 30 -50 30 -70 30 -70 N
P 3 0 1 0 0 -40 0 -80 0 -80 N
C 20 0 31 0 1 0 N
C -20 0 31 0 1 0 N
ENDDRAW
ENDDEF
#
# O_900VA
#
DEF O_900VA EO 0 10 N Y 1 0 N
F0 "EO" -70 120 50 H V C C
F1 "O_900VA" -40 -150 50 H V C C
DRAW
S -110 40 120 -90 0 1 0 N
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 1 200 0 100 L 10 40 1 1 W
P 3 0 1 0 10 -50 10 -70 10 -70 N
P 3 0 1 0 50 0 100 0 100 0 N
P 3 0 1 0 70 -50 70 -70 70 -70 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -30 -50 -30 -70 -30 -70 N
P 3 0 1 0 100 -40 100 -80 100 -80 N
P 3 0 1 0 20 -40 20 -80 20 -80 N
P 3 0 1 0 50 -50 50 -70 50 -70 N
P 3 0 1 0 80 -40 80 -80 80 -80 N
P 3 0 1 0 -50 -50 -50 -70 -50 -70 N
P 5 0 1 0 -100 -60 100 -60 100 -60 100 -60 100 -60 N
P 3 0 1 0 -70 -50 -70 -70 -70 -70 N
P 3 0 1 0 -40 -40 -40 -80 -40 -80 N
P 3 0 1 0 -90 -50 -90 -70 -90 -70 N
P 4 0 1 0 90 -50 90 -70 90 -70 90 -70 N
P 3 0 1 0 -100 0 -50 0 -50 0 N
P 3 0 1 0 -80 -40 -80 -80 -80 -80 N
P 3 0 1 0 60 -40 60 -80 60 -80 N
P 3 0 1 0 -20 -40 -20 -80 -20 -80 N
P 3 0 1 0 -60 -40 -60 -80 -60 -80 N
P 3 0 1 0 40 -40 40 -80 40 -80 N
P 3 0 1 0 -10 -50 -10 -70 -10 -70 N
P 3 0 1 0 30 -50 30 -70 30 -70 N
P 3 0 1 0 0 -40 0 -80 0 -80 N
C 20 0 31 0 1 0 N
C -20 0 31 0 1 0 N
ENDDRAW
ENDDEF
#
# P_10A
#
DEF P_10A EP 0 10 N Y 1 0 N
F0 "EP" -160 120 50 H V C C
F1 "P_10A" -80 -140 50 H V C C
DRAW
A 0 0 80 891 -891 0 0 0 N
X ~ 1 200 0 120 L 10 40 1 1 W
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# P_10A_LUM
#
DEF P_10A_LUM EP 0 10 N Y 1 0 N
F0 "EP" -160 120 50 H V C C
F1 "P_10A_LUM" -80 -140 50 H V C C
DRAW
A 0 0 80 891 -891 0 0 0 N
X ~ 1 200 0 120 L 10 40 1 1 W
P 3 0 0 0 -20 -20 20 20 20 20 N
P 3 0 0 0 -20 20 20 -20 20 -20 N
P 4 0 0 0 30 0 80 0 80 0 80 0 N
P 2 0 0 0 200 -200 200 -200 N
C 0 0 28 0 0 0 N
ENDDRAW
ENDDEF
#
# P_10A_ROU
#
DEF P_10A_ROU EP 0 10 N Y 1 0 N
F0 "EP" -160 120 50 H V C C
F1 "P_10A_ROU" 0 -140 50 H V C C
DRAW
A 0 0 80 891 -891 0 0 0 f
X ~ 1 200 0 120 L 10 40 1 1 W
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# P_16A
#
DEF P_16A EP 0 10 N Y 1 0 N
F0 "EP" -160 120 50 H V C C
F1 "P_16A" -80 -140 50 H V C C
DRAW
A 0 0 80 891 -891 0 0 0 N
X ~ 1 200 0 120 L 10 40 1 1 W
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# Q_25A_2F2O
#
DEF Q_25A_2F2O EQ 0 10 N Y 1 0 N
F0 "EQ" -160 120 50 H V C C
F1 "Q_25A_2F2O" 0 -140 50 H V C C
DRAW
S -100 -30 100 -70 0 0 0 N
X ~ 1 -200 0 100 R 10 40 1 1 U
X ~ 2 200 50 100 L 10 40 1 1 U
X ~ 3 200 0 120 L 10 40 1 1 U
X ~ 4 200 -50 100 L 10 40 1 1 I
X ~ 5 200 150 60 L 10 40 1 1 U
T 0 90 150 20 0 0 0 O+F
P 3 0 0 0 40 100 40 90 40 90 N
P 3 0 0 0 20 100 20 60 20 60 N
P 12 0 1 0 40 100 40 150 50 150 50 160 50 170 120 170 140 150 120 130 60 130 50 130 50 150 50 150 N
P 3 0 0 0 0 60 0 -60 0 -60 N
P 5 0 1 0 20 60 20 50 100 50 100 50 100 50 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 4 0 0 0 -100 -30 -100 -30 100 -70 100 -70 N
ENDDRAW
ENDDEF
#
# Q_2A_12O_40KV
#
DEF Q_2A_12O_40KV EQ 0 10 N Y 1 0 N
F0 "EQ" -160 120 50 H V C C
F1 "Q_2A_12O_40KV" 0 -730 50 H V C C
DRAW
S -100 -580 100 -620 0 0 0 N
X ~ 22 200 -500 120 L 10 40 1 1 U
X ~ 18 200 -400 120 L 10 40 1 1 U
X ~ 7 -200 -150 100 R 10 50 1 1 U
X ~ 23 -200 -550 100 R 10 50 1 1 U
X ~ 14 200 -300 120 L 10 40 1 1 U
X ~ 19 -200 -450 100 R 10 50 1 1 U
X ~ 10 200 -200 120 L 10 40 1 1 U
X ~ 11 -200 -250 100 R 10 50 1 1 U
X ~ 6 200 -100 120 L 10 40 1 1 U
X ~ 15 -200 -350 100 R 10 50 1 1 U
X ~ 24 200 -550 120 L 10 40 1 1 U
X ~ 20 200 -450 120 L 10 40 1 1 U
X ~ 16 200 -350 120 L 10 40 1 1 U
X ~ 12 200 -250 120 L 10 40 1 1 U
X ~ 8 200 -150 120 L 10 40 1 1 U
X ~ 4 200 -50 120 L 10 50 1 1 U
X ~ 21 -200 -500 100 R 10 50 1 1 U
X ~ 17 -200 -400 100 R 10 50 1 1 U
X ~ 13 -200 -300 100 R 10 50 1 1 U
X ~ 9 -200 -200 100 R 10 50 1 1 U
X ~ 5 -200 -100 100 R 10 50 1 1 U
X ~ 3 -200 -50 100 R 10 50 1 1 U
X ~ 2 200 0 120 L 10 40 1 1 U
X ~ 25 200 -600 100 L 10 40 1 1 I
X ~ 1 -200 0 100 R 10 40 1 1 U
P 3 0 1 0 -100 -550 80 -520 80 -520 N
P 5 0 1 0 -100 0 80 30 80 30 80 30 80 30 N
P 3 0 1 0 -100 -250 80 -220 80 -220 N
P 3 0 1 0 -100 -500 80 -470 80 -470 N
P 4 0 0 0 -100 -580 -100 -580 100 -620 100 -620 N
P 3 0 1 0 -100 -450 80 -420 80 -420 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 -350 80 -320 80 -320 N
P 3 0 1 0 -100 -200 80 -170 80 -170 N
P 3 0 1 0 -100 -300 80 -270 80 -270 N
P 3 0 1 0 -100 -400 80 -370 80 -370 N
P 3 0 1 0 -100 -150 80 -120 80 -120 N
P 3 0 1 0 -100 -100 80 -70 80 -70 N
P 3 0 1 0 0 -580 0 20 0 20 N
P 6 0 1 0 -100 -50 80 -20 80 -20 80 -20 80 -20 80 -20 N
ENDDRAW
ENDDEF
#
# R_16A_30mA
#
DEF R_16A_30mA ER 0 10 N Y 1 0 N
F0 "ER" -210 180 50 H V C C
F1 "R_16A_30mA" 0 -200 50 H V C C
DRAW
A -120 60 20 1799 1 0 1 0 N
X ~ 3 250 200 70 L 10 10 1 1 O
X ~ 1 250 0 130 L 10 40 1 1 W
X ~ 2 -250 0 110 R 10 40 1 1 w
X ~ 4 250 -100 180 L 10 50 1 1 I
T 0 20 -100 50 0 0 0 M
T 0 120 200 20 0 0 0 OF
P 3 0 0 0 20 -50 20 50 20 50 N
P 10 0 1 0 60 80 60 200 80 200 80 220 160 220 180 200 160 180 80 180 80 200 80 200 N
P 3 0 1 0 -60 0 100 100 100 100 N
P 6 0 1 0 -120 80 -120 120 40 120 40 60 40 60 40 60 N
P 3 0 1 0 -140 0 -60 0 -60 0 N
P 3 0 1 0 140 20 100 -20 100 -20 N
P 5 0 1 0 -140 -60 -100 -60 -100 -60 -100 -60 -100 -60 N
P 3 0 1 0 -140 60 -140 -60 -140 -60 N
P 2 0 0 0 400 -200 400 -200 N
P 5 0 1 0 -100 60 -100 -60 -100 -40 -100 -40 -100 -40 N
P 2 0 0 0 200 -200 200 -200 N
P 4 0 1 0 100 20 140 -20 140 -20 140 -20 N
C 20 -100 50 0 1 0 N
ENDDRAW
ENDDEF
#
# R_45A_500mA
#
DEF R_45A_500mA ER 0 10 N Y 1 0 N
F0 "ER" -210 180 50 H V C C
F1 "R_45A_500mA" 0 -200 50 H V C C
DRAW
A -120 60 20 1799 1 0 1 0 N
X ~ 3 250 200 70 L 10 10 1 1 O
X ~ 1 250 0 130 L 10 40 1 1 W
X ~ 2 -250 0 110 R 10 40 1 1 w
X ~ 4 250 -100 180 L 10 50 1 1 I
T 0 20 -100 50 0 0 0 M
T 0 120 200 20 0 0 0 OF
P 3 0 0 0 20 -50 20 50 20 50 N
P 10 0 1 0 60 80 60 200 80 200 80 220 160 220 180 200 160 180 80 180 80 200 80 200 N
P 3 0 1 0 -60 0 100 100 100 100 N
P 6 0 1 0 -120 80 -120 120 40 120 40 60 40 60 40 60 N
P 3 0 1 0 -140 0 -60 0 -60 0 N
P 3 0 1 0 140 20 100 -20 100 -20 N
P 5 0 1 0 -140 -60 -100 -60 -100 -60 -100 -60 -100 -60 N
P 3 0 1 0 -140 60 -140 -60 -140 -60 N
P 2 0 0 0 400 -200 400 -200 N
P 5 0 1 0 -100 60 -100 -60 -100 -40 -100 -40 -100 -40 N
P 2 0 0 0 200 -200 200 -200 N
P 4 0 1 0 100 20 140 -20 140 -20 140 -20 N
C 20 -100 50 0 1 0 N
ENDDRAW
ENDDEF
#
# S_63A
#
DEF S_63A ES 0 10 N Y 1 0 N
F0 "ES" -210 180 50 H V C C
F1 "S_63A" 0 -110 50 H V C C
DRAW
X ~ 1 250 0 130 L 10 40 1 1 W
X ~ 2 -250 0 100 R 10 40 1 1 w
X ~ 3 250 200 70 L 10 10 1 1 O
T 0 120 200 20 0 0 0 OFS
P 3 0 1 0 -140 0 -60 0 -60 0 N
P 3 0 0 0 120 20 120 -20 120 -20 N
P 3 0 0 0 -150 0 -100 0 -100 0 N
P 3 0 1 0 -60 0 100 100 100 100 N
P 10 0 1 0 60 80 60 200 80 200 80 220 160 220 180 200 160 180 80 180 80 200 80 200 N
P 2 0 0 0 200 -200 200 -200 N
P 6 0 1 0 -120 80 -120 120 40 120 40 60 40 60 40 60 N
P 3 0 1 0 -120 60 -120 80 -120 80 N
P 3 0 1 0 -140 60 -140 -60 -140 -60 N
P 3 0 1 0 -140 60 -100 60 -100 60 N
P 2 0 0 0 400 -200 400 -200 N
P 5 0 1 0 -100 60 -100 -60 -100 -40 -100 -40 -100 -40 N
P 5 0 1 0 -140 -60 -100 -60 -100 -60 -100 -60 -100 -60 N
ENDDRAW
ENDDEF
#
# V_A10A
#
DEF V_A10A EV 0 10 N Y 1 0 N
F0 "EV" -160 120 50 H V C C
F1 "V_A10A" -60 -140 50 H V C C
DRAW
X ~ 2 200 0 118 L 10 40 1 1 w
X ~ 1 -200 0 100 R 10 40 1 1 W
T 0 0 0 70 0 0 0 A
P 3 0 1 0 -100 0 -80 0 -80 0 N
P 2 0 0 0 200 -200 200 -200 N
C 0 0 84 0 1 0 N
ENDDRAW
ENDDEF
#
# V_F50Hz
#
DEF V_F50Hz EV 0 10 N Y 1 0 N
F0 "EV" -160 120 50 H V C C
F1 "V_F50Hz" -40 -140 50 H V C C
DRAW
X ~ 1 200 0 118 L 10 40 1 1 W
T 0 0 0 50 0 0 0 Hz
P 2 0 0 0 200 -200 200 -200 N
C 0 0 84 0 1 0 N
ENDDRAW
ENDDEF
#
# V_U400V
#
DEF V_U400V EV 0 10 N Y 1 0 N
F0 "EV" -160 120 50 H V C C
F1 "V_U400V" -60 -140 50 H V C C
DRAW
X ~ 1 200 0 118 L 10 40 1 1 W
T 0 0 0 70 0 0 0 V
P 2 0 0 0 200 -200 200 -200 N
C 0 0 84 0 1 0 N
ENDDRAW
ENDDEF
#
# W_15KA
#
DEF W_15KA EW 0 10 N Y 1 0 N
F0 "EW" -160 120 50 H V C C
F1 "W_15KA" -50 -210 50 H V C C
DRAW
S -10 -40 10 -60 0 1 0 N
S -120 60 120 -60 0 1 0 N
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 3 0 -100 50 U 10 50 1 1 O
P 7 0 1 0 -80 0 -40 0 -80 40 -80 0 -80 -40 -40 0 -40 0 F
P 8 0 1 0 80 0 40 0 80 40 80 -40 80 0 80 -40 40 0 40 0 F
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 -80 0 -80 0 N
ENDDRAW
ENDDEF
#
# W_40KA
#
DEF W_40KA EW 0 10 N Y 1 0 N
F0 "EW" -160 120 50 H V C C
F1 "W_40KA" -50 -210 50 H V C C
DRAW
S -10 -40 10 -60 0 1 0 N
S -120 60 120 -60 0 1 0 N
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 3 0 -100 50 U 10 50 1 1 O
P 7 0 1 0 -80 0 -40 0 -80 40 -80 0 -80 -40 -40 0 -40 0 F
P 8 0 1 0 80 0 40 0 80 40 80 -40 80 0 80 -40 40 0 40 0 F
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 -80 0 -80 0 N
ENDDRAW
ENDDEF
#
# W_65KA
#
DEF W_65KA EW 0 10 N Y 1 0 N
F0 "EW" -160 120 50 H V C C
F1 "W_65KA" -50 -210 50 H V C C
DRAW
S -10 -40 10 -60 0 1 0 N
S -120 60 120 -60 0 1 0 N
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 3 0 -100 50 U 10 50 1 1 O
P 7 0 1 0 -80 0 -40 0 -80 40 -80 0 -80 -40 -40 0 -40 0 F
P 8 0 1 0 80 0 40 0 80 40 80 -40 80 0 80 -40 40 0 40 0 F
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 -80 0 -80 0 N
ENDDRAW
ENDDEF
#
# X_Sati
#
DEF X_Sati EX 0 10 N Y 1 0 N
F0 "EX" -160 120 50 H V C C
F1 "X_Sati" -80 -120 50 H V C C
DRAW
S -80 80 80 -80 0 1 0 N
X ~ 1 200 0 120 L 10 40 1 1 W
P 3 0 1 0 -80 -80 80 80 80 80 N
P 3 0 1 0 -80 80 80 -80 80 -80 N
P 2 0 0 0 200 -200 200 -200 N
C 0 0 10 0 1 0 F
ENDDRAW
ENDDEF
#
# Y_ELC
#
DEF Y_ELC EY 0 10 N Y 1 0 N
F0 "EY" -10 120 50 H V C C
F1 "Y_ELC" 60 -120 50 H V C C
DRAW
X ~ 1 200 0 118 L 10 40 1 1 W
P 4 0 0 0 -60 0 70 0 80 0 70 0 N
P 3 0 0 0 -50 10 -50 -10 -50 -10 N
P 3 0 0 0 -40 20 -40 -20 -40 -20 N
P 3 0 0 0 -10 50 -10 -50 -10 -50 N
P 3 0 0 0 -30 30 -30 -30 -30 -30 N
P 4 0 0 0 -20 40 -20 -40 -20 -40 -20 -40 N
P 4 0 0 0 0 60 0 60 0 -60 0 -60 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
# Y_RAD
#
DEF Y_RAD EY 0 10 N Y 1 0 N
F0 "EY" -10 120 50 H V C C
F1 "Y_RAD" 60 -120 50 H V C C
DRAW
X ~ 1 200 0 118 L 10 40 1 1 W
P 4 0 0 0 -60 0 70 0 80 0 70 0 N
P 3 0 0 0 -50 10 -50 -10 -50 -10 N
P 3 0 0 0 -40 20 -40 -20 -40 -20 N
P 3 0 0 0 -10 50 -10 -50 -10 -50 N
P 3 0 0 0 -30 30 -30 -30 -30 -30 N
P 4 0 0 0 -20 40 -20 -40 -20 -40 -20 -40 N
P 4 0 0 0 0 60 0 60 0 -60 0 -60 N
P 2 0 0 0 200 -200 200 -200 N
ENDDRAW
ENDDEF
#
#End Library

View File

@ -1,529 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# elec-unifil:A_1KVA
#
DEF elec-unifil:A_1KVA EA 0 10 N Y 1 F N
F0 "EA" -90 200 50 H V C CNN
F1 "elec-unifil:A_1KVA" 0 130 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C -20 10 31 0 1 0 N
C 20 10 31 0 1 0 N
S -120 60 120 -60 0 1 0 N
P 2 0 0 0 200 -200 200 -200 N
P 4 0 1 0 -100 0 -80 10 -50 10 -50 10 N
P 4 0 1 0 50 10 80 10 100 0 100 0 N
P 5 0 1 0 0 -30 -20 -50 20 -50 0 -30 0 -30 F
X ~ 1 200 0 100 L 10 40 1 1 w
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 3 0 -100 50 U 10 50 1 1 I
ENDDRAW
ENDDEF
#
# elec-unifil:C_3x1.5mm2
#
DEF elec-unifil:C_3x1.5mm2 EC 0 10 N Y 1 F N
F0 "EC" -170 130 50 H V C CNN
F1 "elec-unifil:C_3x1.5mm2" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C -30 50 10 0 1 0 F
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -130 50 -90 50 -90 50 N
P 3 0 1 0 -110 50 -30 -50 -30 -50 N
P 3 0 1 0 -30 50 50 -50 50 -50 N
P 3 0 1 0 10 50 90 -50 90 -50 N
P 4 0 1 0 -100 0 100 0 100 0 100 0 N
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:C_3x2.5mm2
#
DEF elec-unifil:C_3x2.5mm2 EC 0 10 N Y 1 F N
F0 "EC" -170 130 50 H V C CNN
F1 "elec-unifil:C_3x2.5mm2" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C -30 50 10 0 1 0 F
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -130 50 -90 50 -90 50 N
P 3 0 1 0 -110 50 -30 -50 -30 -50 N
P 3 0 1 0 -30 50 50 -50 50 -50 N
P 3 0 1 0 10 50 90 -50 90 -50 N
P 4 0 1 0 -100 0 100 0 100 0 100 0 N
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:C_3x6mm2
#
DEF elec-unifil:C_3x6mm2 EC 0 10 N Y 1 F N
F0 "EC" -170 130 50 H V C CNN
F1 "elec-unifil:C_3x6mm2" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C -30 50 10 0 1 0 F
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -130 50 -90 50 -90 50 N
P 3 0 1 0 -110 50 -30 -50 -30 -50 N
P 3 0 1 0 -30 50 50 -50 50 -50 N
P 3 0 1 0 10 50 90 -50 90 -50 N
P 4 0 1 0 -100 0 100 0 100 0 100 0 N
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:D_06A
#
DEF elec-unifil:D_06A ED 0 10 N Y 1 F N
F0 "ED" -160 120 50 H V C CNN
F1 "elec-unifil:D_06A" -100 -80 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 3 0 1 0 60 20 100 -20 100 -20 N
P 3 0 1 0 100 20 60 -20 60 -20 N
X ~ 1 200 0 120 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:D_10A
#
DEF elec-unifil:D_10A ED 0 10 N Y 1 F N
F0 "ED" -160 120 50 H V C CNN
F1 "elec-unifil:D_10A" -100 -80 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 3 0 1 0 60 20 100 -20 100 -20 N
P 3 0 1 0 100 20 60 -20 60 -20 N
X ~ 1 200 0 120 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:D_16A
#
DEF elec-unifil:D_16A ED 0 10 N Y 1 F N
F0 "ED" -160 120 50 H V C CNN
F1 "elec-unifil:D_16A" -100 -80 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 3 0 1 0 60 20 100 -20 100 -20 N
P 3 0 1 0 100 20 60 -20 60 -20 N
X ~ 1 200 0 120 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:D_32A
#
DEF elec-unifil:D_32A ED 0 10 N Y 1 F N
F0 "ED" -160 120 50 H V C CNN
F1 "elec-unifil:D_32A" -100 -80 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 3 0 1 0 60 20 100 -20 100 -20 N
P 3 0 1 0 100 20 60 -20 60 -20 N
X ~ 1 200 0 120 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:G_Th_3KVA
#
DEF elec-unifil:G_Th_3KVA EG 0 10 N Y 1 F N
F0 "EG" -160 120 50 H V C CNN
F1 "elec-unifil:G_Th_3KVA" 0 -120 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 0 84 0 1 0 N
T 0 0 0 70 0 0 0 G Normal 0 C C
P 2 0 0 0 200 -200 200 -200 N
X ~ 1 200 0 118 L 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:I_25A_LUM
#
DEF elec-unifil:I_25A_LUM EI 0 10 N Y 1 F N
F0 "EI" -160 120 50 H V C CNN
F1 "elec-unifil:I_25A_LUM" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 0 36 0 1 0 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 3 0 1 0 30 20 -30 -20 -30 -20 N
P 4 0 1 0 -20 30 20 -30 20 -30 20 -30 N
X ~ 1 200 0 120 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:J_40A_30mA
#
DEF elec-unifil:J_40A_30mA EJ 0 10 N Y 1 F N
F0 "EJ" -210 180 50 H V C CNN
F1 "elec-unifil:J_40A_30mA" -20 -120 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
A -120 60 20 1799 1 0 1 0 N -140 60 -100 60
T 0 120 200 20 0 0 0 OFS Normal 0 C C
P 2 0 0 0 200 -200 200 -200 N
P 5 0 0 0 120 20 120 -20 120 -20 120 -20 120 -20 N
P 3 0 1 0 -140 0 -60 0 -60 0 N
P 3 0 1 0 -140 60 -140 -60 -140 -60 N
P 3 0 1 0 -60 0 100 100 100 100 N
P 5 0 1 0 -140 -60 -100 -60 -100 -60 -100 -60 -100 -60 N
P 5 0 1 0 -100 60 -100 -60 -100 -40 -100 -40 -100 -40 N
P 6 0 1 0 -120 80 -120 120 40 120 40 60 40 60 40 60 N
P 10 0 1 0 60 80 60 200 80 200 80 220 160 220 180 200 160 180 80 180 80 200 80 200 N
X ~ 1 250 0 130 L 10 40 1 1 W
X ~ 2 -250 0 110 R 10 40 1 1 w
X ~ 3 250 200 70 L 10 10 1 1 O
ENDDRAW
ENDDEF
#
# elec-unifil:O_600VA
#
DEF elec-unifil:O_600VA EO 0 10 N Y 1 F N
F0 "EO" -70 120 50 H V C CNN
F1 "elec-unifil:O_600VA" -40 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C -20 0 31 0 1 0 N
C 20 0 31 0 1 0 N
S -110 40 120 -90 0 1 0 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 -50 0 -50 0 N
P 3 0 1 0 -90 -50 -90 -70 -90 -70 N
P 3 0 1 0 -80 -40 -80 -80 -80 -80 N
P 3 0 1 0 -70 -50 -70 -70 -70 -70 N
P 3 0 1 0 -60 -40 -60 -80 -60 -80 N
P 3 0 1 0 -50 -50 -50 -70 -50 -70 N
P 3 0 1 0 -40 -40 -40 -80 -40 -80 N
P 3 0 1 0 -30 -50 -30 -70 -30 -70 N
P 3 0 1 0 -20 -40 -20 -80 -20 -80 N
P 3 0 1 0 -10 -50 -10 -70 -10 -70 N
P 3 0 1 0 0 -40 0 -80 0 -80 N
P 3 0 1 0 10 -50 10 -70 10 -70 N
P 3 0 1 0 20 -40 20 -80 20 -80 N
P 3 0 1 0 30 -50 30 -70 30 -70 N
P 3 0 1 0 40 -40 40 -80 40 -80 N
P 3 0 1 0 50 -50 50 -70 50 -70 N
P 3 0 1 0 50 0 100 0 100 0 N
P 3 0 1 0 60 -40 60 -80 60 -80 N
P 3 0 1 0 70 -50 70 -70 70 -70 N
P 3 0 1 0 80 -40 80 -80 80 -80 N
P 3 0 1 0 100 -40 100 -80 100 -80 N
P 4 0 1 0 90 -50 90 -70 90 -70 90 -70 N
P 5 0 1 0 -100 -60 100 -60 100 -60 100 -60 100 -60 N
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:O_900VA
#
DEF elec-unifil:O_900VA EO 0 10 N Y 1 F N
F0 "EO" -70 120 50 H V C CNN
F1 "elec-unifil:O_900VA" -40 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C -20 0 31 0 1 0 N
C 20 0 31 0 1 0 N
S -110 40 120 -90 0 1 0 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 -50 0 -50 0 N
P 3 0 1 0 -90 -50 -90 -70 -90 -70 N
P 3 0 1 0 -80 -40 -80 -80 -80 -80 N
P 3 0 1 0 -70 -50 -70 -70 -70 -70 N
P 3 0 1 0 -60 -40 -60 -80 -60 -80 N
P 3 0 1 0 -50 -50 -50 -70 -50 -70 N
P 3 0 1 0 -40 -40 -40 -80 -40 -80 N
P 3 0 1 0 -30 -50 -30 -70 -30 -70 N
P 3 0 1 0 -20 -40 -20 -80 -20 -80 N
P 3 0 1 0 -10 -50 -10 -70 -10 -70 N
P 3 0 1 0 0 -40 0 -80 0 -80 N
P 3 0 1 0 10 -50 10 -70 10 -70 N
P 3 0 1 0 20 -40 20 -80 20 -80 N
P 3 0 1 0 30 -50 30 -70 30 -70 N
P 3 0 1 0 40 -40 40 -80 40 -80 N
P 3 0 1 0 50 -50 50 -70 50 -70 N
P 3 0 1 0 50 0 100 0 100 0 N
P 3 0 1 0 60 -40 60 -80 60 -80 N
P 3 0 1 0 70 -50 70 -70 70 -70 N
P 3 0 1 0 80 -40 80 -80 80 -80 N
P 3 0 1 0 100 -40 100 -80 100 -80 N
P 4 0 1 0 90 -50 90 -70 90 -70 90 -70 N
P 5 0 1 0 -100 -60 100 -60 100 -60 100 -60 100 -60 N
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:P_10A
#
DEF elec-unifil:P_10A EP 0 10 N Y 1 F N
F0 "EP" -160 120 50 H V C CNN
F1 "elec-unifil:P_10A" -80 -140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
A 0 0 80 891 -891 0 0 0 N 1 80 1 -80
P 2 0 0 0 200 -200 200 -200 N
X ~ 1 200 0 120 L 10 40 1 1 W
ENDDRAW
ENDDEF
#
# elec-unifil:Q_25A_2F2O
#
DEF elec-unifil:Q_25A_2F2O EQ 0 10 N Y 1 F N
F0 "EQ" -160 120 50 H V C CNN
F1 "elec-unifil:Q_25A_2F2O" 0 -140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
T 0 90 150 20 0 0 0 O+F Normal 0 C C
S -100 -30 100 -70 0 0 0 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 0 0 0 60 0 -60 0 -60 N
P 3 0 0 0 20 100 20 60 20 60 N
P 3 0 0 0 40 100 40 90 40 90 N
P 4 0 0 0 -100 -30 -100 -30 100 -70 100 -70 N
P 3 0 1 0 -100 0 60 100 60 100 N
P 5 0 1 0 20 60 20 50 100 50 100 50 100 50 N
P 12 0 1 0 40 100 40 150 50 150 50 160 50 170 120 170 140 150 120 130 60 130 50 130 50 150 50 150 N
X ~ 1 -200 0 100 R 10 40 1 1 U
X ~ 2 200 50 100 L 10 40 1 1 U
X ~ 3 200 0 120 L 10 40 1 1 U
X ~ 4 200 -50 100 L 10 40 1 1 I
X ~ 5 200 150 60 L 10 40 1 1 U
ENDDRAW
ENDDEF
#
# elec-unifil:Q_2A_12O_40KV
#
DEF elec-unifil:Q_2A_12O_40KV EQ 0 10 N Y 1 F N
F0 "EQ" -160 120 50 H V C CNN
F1 "elec-unifil:Q_2A_12O_40KV" 0 -730 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -100 -580 100 -620 0 0 0 N
P 2 0 0 0 200 -200 200 -200 N
P 4 0 0 0 -100 -580 -100 -580 100 -620 100 -620 N
P 3 0 1 0 -100 -550 80 -520 80 -520 N
P 3 0 1 0 -100 -500 80 -470 80 -470 N
P 3 0 1 0 -100 -450 80 -420 80 -420 N
P 3 0 1 0 -100 -400 80 -370 80 -370 N
P 3 0 1 0 -100 -350 80 -320 80 -320 N
P 3 0 1 0 -100 -300 80 -270 80 -270 N
P 3 0 1 0 -100 -250 80 -220 80 -220 N
P 3 0 1 0 -100 -200 80 -170 80 -170 N
P 3 0 1 0 -100 -150 80 -120 80 -120 N
P 3 0 1 0 -100 -100 80 -70 80 -70 N
P 3 0 1 0 0 -580 0 20 0 20 N
P 5 0 1 0 -100 0 80 30 80 30 80 30 80 30 N
P 6 0 1 0 -100 -50 80 -20 80 -20 80 -20 80 -20 80 -20 N
X ~ 1 -200 0 100 R 10 40 1 1 U
X ~ 10 200 -200 120 L 10 40 1 1 U
X ~ 11 -200 -250 100 R 10 50 1 1 U
X ~ 12 200 -250 120 L 10 40 1 1 U
X ~ 13 -200 -300 100 R 10 50 1 1 U
X ~ 14 200 -300 120 L 10 40 1 1 U
X ~ 15 -200 -350 100 R 10 50 1 1 U
X ~ 16 200 -350 120 L 10 40 1 1 U
X ~ 17 -200 -400 100 R 10 50 1 1 U
X ~ 18 200 -400 120 L 10 40 1 1 U
X ~ 19 -200 -450 100 R 10 50 1 1 U
X ~ 2 200 0 120 L 10 40 1 1 U
X ~ 20 200 -450 120 L 10 40 1 1 U
X ~ 21 -200 -500 100 R 10 50 1 1 U
X ~ 22 200 -500 120 L 10 40 1 1 U
X ~ 23 -200 -550 100 R 10 50 1 1 U
X ~ 24 200 -550 120 L 10 40 1 1 U
X ~ 25 200 -600 100 L 10 40 1 1 I
X ~ 3 -200 -50 100 R 10 50 1 1 U
X ~ 4 200 -50 120 L 10 50 1 1 U
X ~ 5 -200 -100 100 R 10 50 1 1 U
X ~ 6 200 -100 120 L 10 40 1 1 U
X ~ 7 -200 -150 100 R 10 50 1 1 U
X ~ 8 200 -150 120 L 10 40 1 1 U
X ~ 9 -200 -200 100 R 10 50 1 1 U
ENDDRAW
ENDDEF
#
# elec-unifil:R_16A_30mA
#
DEF elec-unifil:R_16A_30mA ER 0 10 N Y 1 F N
F0 "ER" -210 180 50 H V C CNN
F1 "elec-unifil:R_16A_30mA" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
A -120 60 20 1799 1 0 1 0 N -140 60 -100 60
C 20 -100 50 0 1 0 N
T 0 20 -100 50 0 0 0 M Normal 0 C C
T 0 120 200 20 0 0 0 OF Normal 0 C C
P 2 0 0 0 200 -200 200 -200 N
P 2 0 0 0 400 -200 400 -200 N
P 3 0 0 0 20 -50 20 50 20 50 N
P 3 0 1 0 -140 0 -60 0 -60 0 N
P 3 0 1 0 -140 60 -140 -60 -140 -60 N
P 3 0 1 0 -60 0 100 100 100 100 N
P 3 0 1 0 140 20 100 -20 100 -20 N
P 4 0 1 0 100 20 140 -20 140 -20 140 -20 N
P 5 0 1 0 -140 -60 -100 -60 -100 -60 -100 -60 -100 -60 N
P 5 0 1 0 -100 60 -100 -60 -100 -40 -100 -40 -100 -40 N
P 6 0 1 0 -120 80 -120 120 40 120 40 60 40 60 40 60 N
P 10 0 1 0 60 80 60 200 80 200 80 220 160 220 180 200 160 180 80 180 80 200 80 200 N
X ~ 1 250 0 130 L 10 40 1 1 W
X ~ 2 -250 0 110 R 10 40 1 1 w
X ~ 3 250 200 70 L 10 10 1 1 O
X ~ 4 250 -100 180 L 10 50 1 1 I
ENDDRAW
ENDDEF
#
# elec-unifil:S_63A
#
DEF elec-unifil:S_63A ES 0 10 N Y 1 F N
F0 "ES" -210 180 50 H V C CNN
F1 "elec-unifil:S_63A" 0 -110 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
T 0 120 200 20 0 0 0 OFS Normal 0 C C
P 2 0 0 0 200 -200 200 -200 N
P 2 0 0 0 400 -200 400 -200 N
P 3 0 0 0 -150 0 -100 0 -100 0 N
P 3 0 0 0 120 20 120 -20 120 -20 N
P 3 0 1 0 -140 0 -60 0 -60 0 N
P 3 0 1 0 -140 60 -140 -60 -140 -60 N
P 3 0 1 0 -140 60 -100 60 -100 60 N
P 3 0 1 0 -120 60 -120 80 -120 80 N
P 3 0 1 0 -60 0 100 100 100 100 N
P 5 0 1 0 -140 -60 -100 -60 -100 -60 -100 -60 -100 -60 N
P 5 0 1 0 -100 60 -100 -60 -100 -40 -100 -40 -100 -40 N
P 6 0 1 0 -120 80 -120 120 40 120 40 60 40 60 40 60 N
P 10 0 1 0 60 80 60 200 80 200 80 220 160 220 180 200 160 180 80 180 80 200 80 200 N
X ~ 1 250 0 130 L 10 40 1 1 W
X ~ 2 -250 0 100 R 10 40 1 1 w
X ~ 3 250 200 70 L 10 10 1 1 O
ENDDRAW
ENDDEF
#
# elec-unifil:V_A10A
#
DEF elec-unifil:V_A10A EV 0 10 N Y 1 F N
F0 "EV" -160 120 50 H V C CNN
F1 "elec-unifil:V_A10A" -60 -140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 0 84 0 1 0 N
T 0 0 0 70 0 0 0 A Normal 0 C C
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 -80 0 -80 0 N
X ~ 1 -200 0 100 R 10 40 1 1 W
X ~ 2 200 0 118 L 10 40 1 1 w
ENDDRAW
ENDDEF
#
# elec-unifil:V_F50Hz
#
DEF elec-unifil:V_F50Hz EV 0 10 N Y 1 F N
F0 "EV" -160 120 50 H V C CNN
F1 "elec-unifil:V_F50Hz" -40 -140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 0 84 0 1 0 N
T 0 0 0 50 0 0 0 Hz Normal 0 C C
P 2 0 0 0 200 -200 200 -200 N
X ~ 1 200 0 118 L 10 40 1 1 W
ENDDRAW
ENDDEF
#
# elec-unifil:V_U400V
#
DEF elec-unifil:V_U400V EV 0 10 N Y 1 F N
F0 "EV" -160 120 50 H V C CNN
F1 "elec-unifil:V_U400V" -60 -140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 0 84 0 1 0 N
T 0 0 0 70 0 0 0 V Normal 0 C C
P 2 0 0 0 200 -200 200 -200 N
X ~ 1 200 0 118 L 10 40 1 1 W
ENDDRAW
ENDDEF
#
# elec-unifil:W_15KA
#
DEF elec-unifil:W_15KA EW 0 10 N Y 1 F N
F0 "EW" -160 120 50 H V C CNN
F1 "elec-unifil:W_15KA" -50 -210 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -120 60 120 -60 0 1 0 N
S -10 -40 10 -60 0 1 0 N
P 2 0 0 0 200 -200 200 -200 N
P 3 0 1 0 -100 0 -80 0 -80 0 N
P 7 0 1 0 -80 0 -40 0 -80 40 -80 0 -80 -40 -40 0 -40 0 F
P 8 0 1 0 80 0 40 0 80 40 80 -40 80 0 80 -40 40 0 40 0 F
X ~ 1 200 0 100 L 10 40 1 1 W
X ~ 2 -200 0 100 R 10 40 1 1 w
X ~ 3 0 -100 50 U 10 50 1 1 O
ENDDRAW
ENDDEF
#
# elec-unifil:Y_ELC
#
DEF elec-unifil:Y_ELC EY 0 10 N Y 1 F N
F0 "EY" -10 120 50 H V C CNN
F1 "elec-unifil:Y_ELC" 60 -120 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 0 0 200 -200 200 -200 N
P 3 0 0 0 -50 10 -50 -10 -50 -10 N
P 3 0 0 0 -40 20 -40 -20 -40 -20 N
P 3 0 0 0 -30 30 -30 -30 -30 -30 N
P 3 0 0 0 -10 50 -10 -50 -10 -50 N
P 4 0 0 0 -60 0 70 0 80 0 70 0 N
P 4 0 0 0 -20 40 -20 -40 -20 -40 -20 -40 N
P 4 0 0 0 0 60 0 60 0 -60 0 -60 N
X ~ 1 200 0 118 L 10 40 1 1 W
ENDDRAW
ENDDEF
#
#End Library

View File

@ -0,0 +1,380 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.508
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"version": 1
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_too_small": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"keepout": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_too_small": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "error",
"silk_overlap": "error",
"skew_out_of_range": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"via_hole_larger_than_pad": "error",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.01,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_paste_clearance": 0.0,
"solder_paste_margin_ratio": 0.0
},
"track_widths": [],
"via_dimensions": [],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
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1,
0,
0,
0,
0,
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],
[
1,
1,
1,
1,
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1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_sheet_names": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "electric.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 0
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"drawing": {
"default_bus_thickness": 12.0,
"default_junction_size": 40.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"default_wire_thickness": 6.0,
"field_names": [],
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.3
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 0
},
"net_format_name": "",
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
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File diff suppressed because it is too large Load Diff

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@ -1,9 +0,0 @@
update=01/02/2018 13:06:29
last_client=kicad
[general]
version=1
RootSch=electric.sch
BoardNm=electric.brd
[eeschema]
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LibDir=

File diff suppressed because it is too large Load Diff

View File

@ -1,3 +1,3 @@
(sym_lib_table
(lib (name elec-unifil)(type Legacy)(uri ${KIPRJMOD}/elec-unifil.lib)(options "")(descr ""))
(lib (name "elec-unifil")(type "KiCad")(uri "${KIPRJMOD}/elec-unifil.kicad_sym")(options "")(descr ""))
)

View File

@ -1,166 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Generic_Opamp
#
DEF Generic_Opamp U 0 20 Y Y 1 F N
F0 "U" 0 250 50 H V L CNN
F1 "Generic_Opamp" 0 150 50 H V L CNN
F2 "" -100 -100 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X - 2 -300 -100 100 R 50 50 1 1 I
X V+ 3 -100 300 150 D 50 50 1 1 W
X V- 4 -100 -300 150 U 50 50 1 1 W
X ~ 5 300 0 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# LED
#
DEF LED D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "LED" 0 -100 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
LED-3MM
LED-5MM
LED-10MM
LED-0603
LED-0805
LED-1206
LEDV
$ENDFPLIST
DRAW
P 2 0 1 0 -50 50 -50 -50 N
P 3 0 1 0 -80 -25 -125 -65 -120 -40 N
P 3 0 1 0 -65 -40 -110 -80 -105 -55 N
P 3 0 1 0 50 50 -50 0 50 -50 F
X K 1 -200 0 150 R 40 40 1 1 P
X A 2 200 0 150 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# Q_NPN_CBE
#
DEF Q_NPN_CBE Q 0 0 Y N 1 F N
F0 "Q" 300 50 50 H V R CNN
F1 "Q_NPN_CBE" 600 -50 50 H V R CNN
F2 "" 200 100 29 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
X C 1 100 200 100 D 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 I
X E 3 100 -200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 30 V V C CNN
F3 "" 0 0 30 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 60 60 1 1 P
X ~ 2 0 -150 50 U 60 60 1 1 P
ENDDRAW
ENDDEF
#
# VDD
#
DEF VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VDD" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# VSS
#
DEF VSS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VSS" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VSS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

View File

@ -0,0 +1,285 @@
{
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"other_line_width": 0.15,
"silk_line_width": 0.15,
"silk_text_size_h": 1.0,
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"silk_text_thickness": 0.15
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"drc_exclusions": [],
"rules": {
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"via_dimensions": []
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"boards": [],
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"net_not_bus_member": "warning",
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"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
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"unresolved_variable": "error",
"wire_dangling": "error"
}
},
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File diff suppressed because it is too large Load Diff

View File

@ -1,32 +0,0 @@
update=14/11/2017 20:17:47
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=

View File

@ -1,353 +0,0 @@
EESchema Schematic File Version 4
LIBS:laser_driver-cache
EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L laser_driver_schlib:VSOURCE V1
U 1 1 57336052
P 2650 3550
F 0 "V1" H 2778 3596 50 0000 L CNN
F 1 "pulse (check properties)" H 2778 3505 50 0000 L CNN
F 2 "" H 2650 3550 50 0000 C CNN
F 3 "" H 2650 3550 50 0000 C CNN
F 4 "V" H 2650 3550 60 0001 C CNN "Spice_Primitive"
F 5 "pulse(0 3 100n 1n 1n 20n 100n )" H 2650 3550 60 0001 C CNN "Spice_Model"
1 2650 3550
1 0 0 -1
$EndComp
Text Notes 3150 5400 0 60 ~ 0
.tran 10p 150n
$Comp
L laser_driver_schlib:Generic_Opamp U1
U 1 1 5788FF9F
P 5050 3500
F 0 "U1" H 5050 3650 50 0000 L CNN
F 1 "AD8009" H 5050 3350 50 0000 L CNN
F 2 "" H 4950 3400 50 0000 C CNN
F 3 "" H 5050 3500 50 0000 C CNN
F 4 "Value" H 5050 3500 60 0001 C CNN "Fieldname"
F 5 "X" H 5050 3500 60 0001 C CNN "Spice_Primitive"
F 6 "ad8009" H 5050 3500 60 0001 C CNN "Spice_Model"
F 7 "Y" H 5050 3500 60 0001 C CNN "Spice_Netlist_Enabled"
F 8 "ad8009.lib" H 5050 3500 60 0001 C CNN "Spice_Lib_File"
1 5050 3500
1 0 0 -1
$EndComp
$Comp
L laser_driver_schlib:VSOURCE V2
U 1 1 578900BA
P 9650 1850
F 0 "V2" H 9778 1896 50 0000 L CNN
F 1 "DC 10" H 9778 1805 50 0000 L CNN
F 2 "" H 9650 1850 50 0000 C CNN
F 3 "" H 9650 1850 50 0000 C CNN
F 4 "Value" H 9650 1850 60 0001 C CNN "Fieldname"
F 5 "V" H 9650 1850 60 0001 C CNN "Spice_Primitive"
F 6 "1 2" H 9350 2050 60 0001 C CNN "Spice_Node_Sequence"
1 9650 1850
1 0 0 -1
$EndComp
$Comp
L laser_driver_schlib:VSOURCE V3
U 1 1 57890232
P 9650 2350
F 0 "V3" H 9778 2396 50 0000 L CNN
F 1 "DC 10" H 9778 2305 50 0000 L CNN
F 2 "" H 9650 2350 50 0000 C CNN
F 3 "" H 9650 2350 50 0000 C CNN
F 4 "Value" H 9650 2350 60 0001 C CNN "Fieldname"
F 5 "V" H 9650 2350 60 0001 C CNN "Spice_Primitive"
F 6 "1 2" H 9350 2550 60 0001 C CNN "Spice_Node_Sequence"
1 9650 2350
1 0 0 -1
$EndComp
$Comp
L laser_driver_schlib:GND #PWR7
U 1 1 578902D2
P 9400 2100
F 0 "#PWR7" H 9400 1850 50 0001 C CNN
F 1 "GND" H 9405 1927 50 0000 C CNN
F 2 "" H 9400 2100 50 0000 C CNN
F 3 "" H 9400 2100 50 0000 C CNN
1 9400 2100
1 0 0 -1
$EndComp
$Comp
L laser_driver_schlib:VDD #PWR8
U 1 1 578903C0
P 9650 1600
F 0 "#PWR8" H 9650 1450 50 0001 C CNN
F 1 "VDD" H 9667 1773 50 0000 C CNN
F 2 "" H 9650 1600 50 0000 C CNN
F 3 "" H 9650 1600 50 0000 C CNN
1 9650 1600
1 0 0 -1
$EndComp
$Comp
L laser_driver_schlib:VSS #PWR9
U 1 1 578903E2
P 9650 2600
F 0 "#PWR9" H 9650 2450 50 0001 C CNN
F 1 "VSS" H 9668 2773 50 0000 C CNN
F 2 "" H 9650 2600 50 0000 C CNN
F 3 "" H 9650 2600 50 0000 C CNN
1 9650 2600
-1 0 0 1
$EndComp
$Comp
L laser_driver_schlib:VDD #PWR3
U 1 1 57890425
P 4950 3200
F 0 "#PWR3" H 4950 3050 50 0001 C CNN
F 1 "VDD" H 4967 3373 50 0000 C CNN
F 2 "" H 4950 3200 50 0000 C CNN
F 3 "" H 4950 3200 50 0000 C CNN
1 4950 3200
1 0 0 -1
$EndComp
$Comp
L laser_driver_schlib:VSS #PWR4
U 1 1 57890453
P 4950 3800
F 0 "#PWR4" H 4950 3650 50 0001 C CNN
F 1 "VSS" H 4968 3973 50 0000 C CNN
F 2 "" H 4950 3800 50 0000 C CNN
F 3 "" H 4950 3800 50 0000 C CNN
1 4950 3800
-1 0 0 1
$EndComp
$Comp
L laser_driver_schlib:C C2
U 1 1 5789085B
P 6800 4000
F 0 "C2" H 6915 3954 50 0000 L CNN
F 1 "1p" H 6915 4045 50 0000 L CNN
F 2 "" H 6838 3850 50 0000 C CNN
F 3 "" H 6800 4000 50 0000 C CNN
1 6800 4000
-1 0 0 1
$EndComp
$Comp
L laser_driver_schlib:R R5
U 1 1 578EA6D8
P 6400 4000
F 0 "R5" H 6469 3954 50 0000 L CNN
F 1 "2.5" H 6469 4045 50 0000 L CNN
F 2 "" V 6330 4000 50 0000 C CNN
F 3 "" H 6400 4000 50 0000 C CNN
1 6400 4000
-1 0 0 1
$EndComp
$Comp
L laser_driver_schlib:R R1
U 1 1 578EA7EE
P 4150 3600
F 0 "R1" V 3943 3600 50 0000 C CNN
F 1 "220" V 4034 3600 50 0000 C CNN
F 2 "" V 4080 3600 50 0000 C CNN
F 3 "" H 4150 3600 50 0000 C CNN
1 4150 3600
0 1 1 0
$EndComp
$Comp
L laser_driver_schlib:R R3
U 1 1 578EA8B4
P 5400 4150
F 0 "R3" V 5193 4150 50 0000 C CNN
F 1 "220" V 5284 4150 50 0000 C CNN
F 2 "" V 5330 4150 50 0000 C CNN
F 3 "" H 5400 4150 50 0000 C CNN
1 5400 4150
0 1 1 0
$EndComp
$Comp
L laser_driver_schlib:C C1
U 1 1 578EB076
P 5400 4400
F 0 "C1" V 5240 4400 50 0000 C CNN
F 1 "1p" V 5149 4400 50 0000 C CNN
F 2 "" H 5438 4250 50 0000 C CNN
F 3 "" H 5400 4400 50 0000 C CNN
1 5400 4400
0 -1 -1 0
$EndComp
$Comp
L laser_driver_schlib:LED D1
U 1 1 578EB1E8
P 6400 4900
F 0 "D1" V 6446 4792 50 0000 R CNN
F 1 "laser diode" V 6355 4792 50 0000 R CNN
F 2 "" H 6400 4900 50 0000 C CNN
F 3 "" H 6400 4900 50 0000 C CNN
F 4 "qtlp690c" H 6400 4900 60 0001 C CNN "Fieldname"
F 5 "D" H 6400 4900 60 0001 C CNN "Spice_Primitive"
F 6 "laser" H 6400 4900 60 0001 C CNN "Spice_Model"
F 7 "Y" H 6400 4900 60 0001 C CNN "Spice_Netlist_Enabled"
F 8 "laser.lib" H 6400 4900 60 0001 C CNN "Spice_Lib_File"
F 9 "2 1" V 6400 4900 60 0001 C CNN "Spice_Node_Sequence"
1 6400 4900
0 -1 -1 0
$EndComp
$Comp
L laser_driver_schlib:GND #PWR6
U 1 1 578EB42D
P 6400 5100
F 0 "#PWR6" H 6400 4850 50 0001 C CNN
F 1 "GND" H 6405 4927 50 0000 C CNN
F 2 "" H 6400 5100 50 0000 C CNN
F 3 "" H 6400 5100 50 0000 C CNN
1 6400 5100
1 0 0 -1
$EndComp
$Comp
L laser_driver_schlib:R R4
U 1 1 578EBA35
P 6150 2900
F 0 "R4" V 5943 2900 50 0000 C CNN
F 1 "220" V 6034 2900 50 0000 C CNN
F 2 "" V 6080 2900 50 0000 C CNN
F 3 "" H 6150 2900 50 0000 C CNN
1 6150 2900
0 1 1 0
$EndComp
$Comp
L laser_driver_schlib:R R2
U 1 1 578EBB39
P 4350 2900
F 0 "R2" V 4143 2900 50 0000 C CNN
F 1 "160" V 4234 2900 50 0000 C CNN
F 2 "" V 4280 2900 50 0000 C CNN
F 3 "" H 4350 2900 50 0000 C CNN
1 4350 2900
0 1 1 0
$EndComp
$Comp
L laser_driver_schlib:GND #PWR2
U 1 1 578EBBE4
P 4000 3600
F 0 "#PWR2" H 4000 3350 50 0001 C CNN
F 1 "GND" H 4005 3427 50 0000 C CNN
F 2 "" H 4000 3600 50 0000 C CNN
F 3 "" H 4000 3600 50 0000 C CNN
1 4000 3600
0 1 1 0
$EndComp
Wire Wire Line
9650 2100 9400 2100
Wire Wire Line
5350 3500 6100 3500
Wire Wire Line
4300 3600 4750 3600
Wire Wire Line
4500 4150 5250 4150
Wire Wire Line
4500 4150 4500 3600
Connection ~ 4500 3600
Wire Wire Line
6400 4150 6400 4700
Wire Wire Line
6800 4350 6800 4150
Connection ~ 6400 4350
Wire Wire Line
5900 4150 5900 3750
Wire Wire Line
5550 4150 5900 4150
Wire Wire Line
5100 4400 5250 4400
Wire Wire Line
5100 4150 5100 4400
Connection ~ 5100 4150
Wire Wire Line
5550 4400 5750 4400
Wire Wire Line
5750 4400 5750 4150
Connection ~ 5750 4150
Wire Wire Line
6400 4350 7000 4350
Wire Wire Line
4500 2900 6000 2900
Wire Wire Line
6300 2900 7000 2900
Wire Wire Line
4650 3400 4650 2900
Connection ~ 4650 2900
Wire Wire Line
4750 3400 4650 3400
Wire Wire Line
4200 2900 2650 2900
Wire Wire Line
2650 2900 2650 3350
$Comp
L laser_driver_schlib:GND #PWR1
U 1 1 578EC19D
P 2650 4200
F 0 "#PWR1" H 2650 3950 50 0001 C CNN
F 1 "GND" H 2655 4027 50 0000 C CNN
F 2 "" H 2650 4200 50 0000 C CNN
F 3 "" H 2650 4200 50 0000 C CNN
1 2650 4200
1 0 0 -1
$EndComp
Wire Wire Line
2650 4200 2650 3750
Text Label 3650 2900 0 60 ~ 0
in
Wire Wire Line
7000 2900 7000 4350
Connection ~ 6800 4350
$Comp
L laser_driver_schlib:Q_NPN_CBE Q1
U 1 1 578EADCC
P 6300 3500
F 0 "Q1" H 6491 3546 50 0000 L CNN
F 1 "fzt1049a" H 6491 3455 50 0000 L CNN
F 2 "" H 6500 3600 50 0000 C CNN
F 3 "" H 6300 3500 50 0000 C CNN
F 4 "Value" H 6300 3500 60 0001 C CNN "Fieldname"
F 5 "Q" H 6300 3500 60 0001 C CNN "Spice_Primitive"
F 6 "fzt1049a" H 6300 3500 60 0001 C CNN "Spice_Model"
F 7 "Y" H 6300 3500 60 0001 C CNN "Spice_Netlist_Enabled"
F 8 "fzt1049a.lib" H 6300 3500 60 0001 C CNN "Spice_Lib_File"
1 6300 3500
1 0 0 -1
$EndComp
Wire Wire Line
6400 3700 6400 3850
Wire Wire Line
5900 3750 6800 3750
Wire Wire Line
6800 3750 6800 3850
Connection ~ 6400 3750
Text Label 6550 4350 0 60 ~ 0
out
Wire Wire Line
9650 1600 9650 1650
Wire Wire Line
9650 2600 9650 2550
Wire Wire Line
9650 2050 9650 2150
Connection ~ 9650 2100
$Comp
L laser_driver_schlib:VDD #PWR?
U 1 1 5A0B5A9D
P 6400 3300
F 0 "#PWR?" H 6400 3150 50 0001 C CNN
F 1 "VDD" H 6417 3473 50 0000 C CNN
F 2 "" H 6400 3300 50 0000 C CNN
F 3 "" H 6400 3300 50 0000 C CNN
1 6400 3300
1 0 0 -1
$EndComp
$EndSCHEMATC

View File

@ -0,0 +1,393 @@
(kicad_symbol_lib (version 20201005) (generator kicad_symbol_editor)
(symbol "laser_driver_schlib:C" (pin_numbers hide) (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
(property "Reference" "C" (id 0) (at 0.635 2.54 0)
(effects (font (size 1.27 1.27)) (justify left))
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View File

@ -1,166 +0,0 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Generic_Opamp
#
DEF Generic_Opamp U 0 20 Y Y 1 F N
F0 "U" 0 250 50 H V L CNN
F1 "Generic_Opamp" 0 150 50 H V L CNN
F2 "" -100 -100 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X - 2 -300 -100 100 R 50 50 1 1 I
X V+ 3 -100 300 150 D 50 50 1 1 W
X V- 4 -100 -300 150 U 50 50 1 1 W
X ~ 5 300 0 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# LED
#
DEF LED D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "LED" 0 -100 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
LED-3MM
LED-5MM
LED-10MM
LED-0603
LED-0805
LED-1206
LEDV
$ENDFPLIST
DRAW
P 2 0 1 0 -50 50 -50 -50 N
P 3 0 1 0 -80 -25 -125 -65 -120 -40 N
P 3 0 1 0 -65 -40 -110 -80 -105 -55 N
P 3 0 1 0 50 50 -50 0 50 -50 F
X K 1 -200 0 150 R 40 40 1 1 P
X A 2 200 0 150 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# Q_NPN_CBE
#
DEF Q_NPN_CBE Q 0 0 Y N 1 F N
F0 "Q" 300 50 50 H V R CNN
F1 "Q_NPN_CBE" 600 -50 50 H V R CNN
F2 "" 200 100 29 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
X C 1 100 200 100 D 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 I
X E 3 100 -200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 30 V V C CNN
F3 "" 0 0 30 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 60 60 1 1 P
X ~ 2 0 -150 50 U 60 60 1 1 P
ENDDRAW
ENDDEF
#
# VDD
#
DEF VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VDD" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# VSS
#
DEF VSS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VSS" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VSS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

View File

@ -1,3 +1,3 @@
(sym_lib_table
(lib (name laser_driver_schlib)(type Legacy)(uri ${KIPRJMOD}/laser_driver_schlib.lib)(options "")(descr ""))
(lib (name "laser_driver_schlib")(type "KiCad")(uri "${KIPRJMOD}/laser_driver_schlib.kicad_sym")(options "")(descr ""))
)

View File

@ -1,142 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# schematic_libspice:+12V
#
DEF schematic_libspice:+12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "schematic_libspice:+12V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# schematic_libspice:0
#
DEF schematic_libspice:0 #GND 0 0 Y Y 1 F P
F0 "#GND" 0 -100 50 H I C CNN
F1 "schematic_libspice:0" 0 -70 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X 0 1 0 0 0 R 40 40 1 1 W N
ENDDRAW
ENDDEF
#
# schematic_libspice:C
#
DEF schematic_libspice:C C 0 10 Y Y 1 F N
F0 "C" 100 150 50 V V C CNN
F1 "schematic_libspice:C" 100 -150 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
ALIAS C
DRAW
P 2 0 1 0 -150 -50 150 -50 N
P 2 0 1 0 -150 50 150 50 N
X ~ 1 0 250 200 D 40 40 1 1 P
X ~ 2 0 -250 200 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# schematic_libspice:CAP
#
DEF schematic_libspice:CAP C 0 10 Y Y 1 F N
F0 "C" 100 150 50 V V C CNN
F1 "schematic_libspice:CAP" 100 -150 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 2 0 1 0 -150 -50 150 -50 N
P 2 0 1 0 -150 50 150 50 N
X ~ 1 0 250 200 D 40 40 1 1 P
X ~ 2 0 -250 200 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# schematic_libspice:INDUCTOR
#
DEF schematic_libspice:INDUCTOR L 0 0 N Y 1 F N
F0 "L" 0 100 50 H V C CNN
F1 "schematic_libspice:INDUCTOR" 0 -50 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
A -150 0 50 1 1799 0 1 0 N -100 0 -200 0
A -50 0 50 1 1799 0 1 0 N 0 0 -100 0
A 50 0 50 1 1799 0 1 0 N 100 0 0 0
A 150 0 50 1 1799 0 1 0 N 200 0 100 0
X 1 1 -250 0 50 R 30 30 1 1 I
X 2 2 250 0 50 L 30 30 1 1 I
ENDDRAW
ENDDEF
#
# schematic_libspice:PWR_FLAG
#
DEF schematic_libspice:PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 75 50 H I C CNN
F1 "schematic_libspice:PWR_FLAG" 0 150 40 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
X pwr 1 0 0 0 U 50 50 0 0 w
ENDDRAW
ENDDEF
#
# schematic_libspice:QNPN
#
DEF schematic_libspice:QNPN Q 0 0 Y Y 1 F N
F0 "Q" -100 300 50 H V C CNN
F1 "schematic_libspice:QNPN" -100 200 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 2 0 0 0 0 0 150 -150 N
P 4 0 0 0 150 -150 150 -50 50 -150 150 -150 F
P 2 0 1 0 0 -150 0 150 N
P 2 0 1 0 0 0 150 150 N
X C 1 150 350 200 D 40 40 1 1 P
X B 2 -300 0 300 R 40 40 1 1 I
X E 3 150 -350 200 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# schematic_libspice:R
#
DEF schematic_libspice:R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "schematic_libspice:R" 0 0 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
S -40 150 40 -150 0 1 0 N
X ~ 1 0 250 100 D 50 50 1 1 P
X ~ 2 0 -250 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# schematic_libspice:VSOURCE
#
DEF schematic_libspice:VSOURCE V 0 40 Y Y 1 F N
F0 "V" 0 -100 50 H V C CNN
F1 "schematic_libspice:VSOURCE" 0 100 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
C 0 0 400 0 1 0 N
T 0 -320 -10 100 0 0 1 V Normal 0 C C
P 2 0 1 0 -250 -250 -250 150 F
P 3 0 1 0 -300 150 -250 250 -200 150 F
X E1 1 0 700 300 D 50 50 1 1 I
X E2 2 0 -700 300 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

View File

@ -0,0 +1,269 @@
{
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"design_settings": {
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"drc_exclusions": [],
"track_widths": [],
"via_dimensions": []
},
"layer_presets": []
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"boards": [],
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"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_sheet_names": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
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"pinned_symbol_libs": []
},
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{
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"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
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"wire_width": 6.0
}
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"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
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"default_text_size": 50.0,
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"field_names": [],
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
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"spice_external_command": "spice \"%I\"",
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"subpart_id_separator": 0
},
"sheets": [
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}

File diff suppressed because it is too large Load Diff

View File

@ -1,39 +0,0 @@
update=21/11/2017 21:20:51
last_client=kicad
[general]
version=1
RootSch=pspice.sch
BoardNm=pspice.brd
[pcbnew]
version=1
PadDrlX=320
PadDimH=600
PadDimV=600
BoardThickness=630
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
VEgarde=100
DrawLar=150
EdgeLar=150
TxtLar=120
MSegLar=150
LastNetListRead=
[pcbnew/libraries]
LibDir=
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
LibName7=display
LibName8=valves
LibName9=led
LibName10=dip_sockets
[eeschema]
version=1
LibDir=

View File

@ -1,611 +0,0 @@
EESchema Schematic File Version 4
LIBS:pspice-cache
EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date "Sun 22 Mar 2015"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Label 4600 2800 0 60 ~ 0
VIN
Wire Notes Line
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Wire Notes Line
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Wire Notes Line
3900 6650 3900 6200
Wire Notes Line
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Wire Wire Line
4400 2800 5100 2800
Connection ~ 9200 1800
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 7050 2450
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
6100 2450 7050 2450
Wire Wire Line
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Wire Wire Line
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Connection ~ 6700 2800
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Text Notes 1150 6500 0 60 ~ 0
.model Q2N2222 npn (bf=200)\n.ac dec 100 10 1Meg\n
Text Notes 1100 6200 0 60 ~ 0
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0 1 1 0
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F 3 "" H 7800 1200 60 0001 C CNN
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1 0 0 -1
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F 3 "" H 8500 1500 60 0001 C CNN
1 8500 1500
1 0 0 -1
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L schematic_libspice:0 #GND03
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F 1 "0" H 9550 3430 40 0000 C CNN
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F 3 "" H 9550 3500 60 0001 C CNN
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1 0 0 -1
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F 3 "" H 7050 3150 60 0001 C CNN
1 7050 3150
1 0 0 -1
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L schematic_libspice:C C2
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F 3 "" H 7050 2850 60 0001 C CNN
1 7050 2850
1 0 0 -1
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L schematic_libspice:0 #GND04
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F 3 "" H 7700 3550 60 0001 C CNN
1 7700 3550
1 0 0 -1
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F 3 "" H 7800 850 60 0001 C CNN
1 7800 850
1 0 0 -1
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L schematic_libspice:R R8
U 1 1 32E8B80E
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F 1 "2.2K" V 7700 3250 50 0000 C CNN
F 2 "" H 7700 3250 60 0001 C CNN
F 3 "" H 7700 3250 60 0001 C CNN
1 7700 3250
1 0 0 -1
$EndComp
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L schematic_libspice:QNPN Q1
U 1 1 32E8B7FC
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F 0 "Q1" H 7450 2750 50 0000 C CNN
F 1 "Q2N2222" H 7450 2650 50 0000 C CNN
F 2 "" H 7550 2450 60 0001 C CNN
F 3 "" H 7550 2450 60 0001 C CNN
1 7550 2450
1 0 0 -1
$EndComp
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L schematic_libspice:0 #GND08
U 1 1 32CFC469
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F 0 "#GND08" H 3850 4150 40 0001 C CNN
F 1 "0" H 3850 4180 40 0000 C CNN
F 2 "" H 3850 4250 60 0001 C CNN
F 3 "" H 3850 4250 60 0001 C CNN
1 3850 4250
1 0 0 -1
$EndComp
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L schematic_libspice:VSOURCE V2
U 1 1 32CFC454
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F 1 "AC" H 3850 3600 60 0000 C CNN
F 2 "" H 3850 3500 60 0001 C CNN
F 3 "" H 3850 3500 60 0001 C CNN
F 4 "V" H 3850 3500 60 0001 C CNN "Spice_Primitive"
F 5 "dc 0 ac 1" H 3450 3100 60 0000 C CNN "Spice_Model"
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1 3850 3500
1 0 0 -1
$EndComp
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L schematic_libspice:C C1
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F 1 "1UF" V 4250 2650 50 0000 C CNN
F 2 "" H 4150 2800 60 0001 C CNN
F 3 "" H 4150 2800 60 0001 C CNN
1 4150 2800
0 1 1 0
$EndComp
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L schematic_libspice:+12V #+12V02
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F 0 "#+12V02" H 2850 1700 40 0001 C CNN
F 1 "+12V" H 2850 1650 40 0000 C CNN
F 2 "" H 2850 1500 60 0001 C CNN
F 3 "" H 2850 1500 60 0001 C CNN
1 2850 1500
1 0 0 -1
$EndComp
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L schematic_libspice:0 #GND01
U 1 1 32CFC344
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F 0 "#GND01" H 2850 2850 40 0001 C CNN
F 1 "0" H 2850 2880 40 0000 C CNN
F 2 "" H 2850 2950 60 0001 C CNN
F 3 "" H 2850 2950 60 0001 C CNN
1 2850 2950
1 0 0 -1
$EndComp
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L schematic_libspice:VSOURCE V1
U 1 1 32CFC337
P 2850 2200
F 0 "V1" H 2850 2100 60 0000 C CNN
F 1 "DC 12" H 2850 2300 60 0000 C CNN
F 2 "" H 2850 2200 60 0001 C CNN
F 3 "" H 2850 2200 60 0001 C CNN
1 2850 2200
1 0 0 -1
$EndComp
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L schematic_libspice:+12V #+12V06
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F 0 "#+12V06" H 6700 1950 40 0001 C CNN
F 1 "+12V" H 6700 1900 40 0000 C CNN
F 2 "" H 6700 1750 60 0001 C CNN
F 3 "" H 6700 1750 60 0001 C CNN
1 6700 1750
1 0 0 -1
$EndComp
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L schematic_libspice:+12V #+12V05
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P 6100 1750
F 0 "#+12V05" H 6100 1950 40 0001 C CNN
F 1 "+12V" H 6100 1900 40 0000 C CNN
F 2 "" H 6100 1750 60 0001 C CNN
F 3 "" H 6100 1750 60 0001 C CNN
1 6100 1750
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:+12V #+12V04
U 1 1 32CFC2FD
P 5750 1750
F 0 "#+12V04" H 5750 1950 40 0001 C CNN
F 1 "+12V" H 5750 1900 40 0000 C CNN
F 2 "" H 5750 1750 60 0001 C CNN
F 3 "" H 5750 1750 60 0001 C CNN
1 5750 1750
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:+12V #+12V03
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P 5100 1750
F 0 "#+12V03" H 5100 1950 40 0001 C CNN
F 1 "+12V" H 5100 1900 40 0000 C CNN
F 2 "" H 5100 1750 60 0001 C CNN
F 3 "" H 5100 1750 60 0001 C CNN
1 5100 1750
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:0 #GND07
U 1 1 32CFC2B8
P 6700 3850
F 0 "#GND07" H 6700 3750 40 0001 C CNN
F 1 "0" H 6700 3780 40 0000 C CNN
F 2 "" H 6700 3850 60 0001 C CNN
F 3 "" H 6700 3850 60 0001 C CNN
1 6700 3850
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:0 #GND05
U 1 1 32CFC2B5
P 5100 3850
F 0 "#GND05" H 5100 3750 40 0001 C CNN
F 1 "0" H 5100 3780 40 0000 C CNN
F 2 "" H 5100 3850 60 0001 C CNN
F 3 "" H 5100 3850 60 0001 C CNN
1 5100 3850
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:R R9
U 1 1 32CFC293
P 5100 3550
F 0 "R9" V 5180 3550 50 0000 C CNN
F 1 "10K" V 5100 3550 50 0000 C CNN
F 2 "" H 5100 3550 60 0001 C CNN
F 3 "" H 5100 3550 60 0001 C CNN
1 5100 3550
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:R R3
U 1 1 32CFC288
P 5100 2050
F 0 "R3" H 5000 2250 50 0000 C CNN
F 1 "22K" V 5100 2050 50 0000 C CNN
F 2 "" H 5100 2050 60 0001 C CNN
F 3 "" H 5100 2050 60 0001 C CNN
1 5100 2050
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:R R6
U 1 1 32CFC27F
P 6700 2050
F 0 "R6" H 6600 2250 50 0000 C CNN
F 1 "22K" V 6700 2050 50 0000 C CNN
F 2 "" H 6700 2050 60 0001 C CNN
F 3 "" H 6700 2050 60 0001 C CNN
1 6700 2050
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:R R11
U 1 1 32CFC277
P 6700 3550
F 0 "R11" V 6780 3550 50 0000 C CNN
F 1 "10K" V 6700 3550 50 0000 C CNN
F 2 "" H 6700 3550 60 0001 C CNN
F 3 "" H 6700 3550 60 0001 C CNN
1 6700 3550
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:0 #GND06
U 1 1 32CFC26C
P 5950 3850
F 0 "#GND06" H 5950 3750 40 0001 C CNN
F 1 "0" H 5950 3780 40 0000 C CNN
F 2 "" H 5950 3850 60 0001 C CNN
F 3 "" H 5950 3850 60 0001 C CNN
1 5950 3850
1 0 0 -1
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$Comp
L schematic_libspice:R R10
U 1 1 32CFC25A
P 5950 3550
F 0 "R10" V 6030 3550 50 0000 C CNN
F 1 "470" V 5950 3550 50 0000 C CNN
F 2 "" H 5950 3550 60 0001 C CNN
F 3 "" H 5950 3550 60 0001 C CNN
1 5950 3550
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:R R5
U 1 1 32CFC254
P 6100 2050
F 0 "R5" H 6000 2250 50 0000 C CNN
F 1 "1K" V 6100 2050 50 0000 C CNN
F 2 "" H 6100 2050 60 0001 C CNN
F 3 "" H 6100 2050 60 0001 C CNN
1 6100 2050
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:R R4
U 1 1 32CFC24C
P 5750 2050
F 0 "R4" H 5650 2250 50 0000 C CNN
F 1 "1K" V 5750 2050 50 0000 C CNN
F 2 "" H 5750 2050 60 0001 C CNN
F 3 "" H 5750 2050 60 0001 C CNN
1 5750 2050
1 0 0 -1
$EndComp
$Comp
L schematic_libspice:QNPN Q3
U 1 1 32CFC230
P 6250 2800
F 0 "Q3" H 6150 3100 50 0000 C CNN
F 1 "Q2N2222" H 6150 3000 50 0000 C CNN
F 2 "" H 6250 2800 60 0001 C CNN
F 3 "" H 6250 2800 60 0001 C CNN
1 6250 2800
-1 0 0 -1
$EndComp
$Comp
L schematic_libspice:QNPN Q2
U 1 1 32CFC227
P 5600 2800
F 0 "Q2" H 5500 3100 50 0000 C CNN
F 1 "Q2N2222" H 5500 3000 50 0000 C CNN
F 2 "" H 5600 2800 60 0001 C CNN
F 3 "" H 5600 2800 60 0001 C CNN
1 5600 2800
1 0 0 -1
$EndComp
Wire Wire Line
9200 1500 8750 1500
Connection ~ 7800 1500
Wire Wire Line
2850 2900 2850 2950
Wire Wire Line
3850 4200 3850 4250
Wire Wire Line
5100 3800 5100 3850
Wire Wire Line
5950 3800 5950 3850
Wire Wire Line
6100 3200 6100 3150
Wire Wire Line
5950 3200 5950 3300
Connection ~ 5950 3200
Wire Wire Line
6700 3850 6700 3800
Wire Wire Line
7050 3150 7050 3100
Wire Wire Line
7700 3550 7700 3500
Wire Wire Line
9550 3500 9550 3450
Wire Wire Line
7700 2800 7700 2900
Wire Wire Line
8500 2900 8750 2900
Connection ~ 7700 2900
Wire Wire Line
6700 1750 6700 1800
Wire Wire Line
6100 1750 6100 1800
Wire Wire Line
5750 1750 5750 1800
Wire Wire Line
5100 1750 5100 1800
Wire Wire Line
7800 900 7800 950
Wire Wire Line
5750 3200 5950 3200
Text GLabel 9250 2100 2 60 Output ~ 0
VOUT
Connection ~ 9200 2100
Text Label 6250 2450 0 60 ~ 0
VBASE
$Comp
L schematic_libspice:R R7
U 1 1 592C1EB3
P 9100 3050
F 0 "R7" V 9180 3050 50 0000 C CNN
F 1 "22K" V 9100 3050 50 0000 C CNN
F 2 "" H 9100 3050 60 0001 C CNN
F 3 "" H 9100 3050 60 0001 C CNN
1 9100 3050
0 1 1 0
$EndComp
$Comp
L schematic_libspice:INDUCTOR L2
U 1 1 592C1EB9
P 9100 2800
F 0 "L2" H 9100 2900 50 0000 C CNN
F 1 "100mH" H 9100 2700 50 0000 C CNN
F 2 "" H 9100 2800 60 0001 C CNN
F 3 "" H 9100 2800 60 0001 C CNN
1 9100 2800
1 0 0 -1
$EndComp
Wire Wire Line
8850 2800 8750 2800
Wire Wire Line
8750 2800 8750 2900
Wire Wire Line
8750 3050 8850 3050
Connection ~ 8750 2900
Wire Wire Line
9350 2800 9400 2800
Wire Wire Line
9400 2800 9400 2950
Wire Wire Line
9400 3050 9350 3050
Connection ~ 9400 2950
$Comp
L schematic_libspice:CAP C4
U 1 1 592C267C
P 8500 1050
F 0 "C4" V 8600 1200 50 0000 C CNN
F 1 "10nF" V 8600 900 50 0000 C CNN
F 2 "" H 8500 1050 60 0000 C CNN
F 3 "" H 8500 1050 60 0000 C CNN
1 8500 1050
0 1 1 0
$EndComp
Wire Wire Line
8750 1050 9200 1050
Connection ~ 9200 1500
Wire Wire Line
8250 1050 8050 1050
Wire Wire Line
8050 1050 8050 1500
Connection ~ 8050 1500
$Comp
L schematic_libspice:PWR_FLAG #FLG02
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F 0 "#FLG02" H 3650 4325 50 0001 C CNN
F 1 "PWR_FLAG" H 3650 4400 50 0000 C CNN
F 2 "" H 3650 4250 50 0001 C CNN
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1 3650 4250
-1 0 0 1
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Wire Wire Line
3850 4200 3650 4200
Wire Wire Line
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L schematic_libspice:PWR_FLAG #FLG01
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1 0 0 -1
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Wire Wire Line
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Wire Wire Line
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1 8250 2900
0 1 1 0
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Wire Wire Line
8000 2900 7700 2900
Wire Wire Line
9200 1800 9200 2100
Wire Wire Line
7050 2450 7250 2450
Wire Wire Line
5100 2800 5300 2800
Wire Wire Line
5100 2800 5100 3300
Wire Wire Line
6700 2800 6700 3300
Wire Wire Line
7800 1500 7800 1800
Wire Wire Line
5950 3200 6100 3200
Wire Wire Line
7700 2900 7700 3000
Wire Wire Line
9200 2100 9250 2100
Wire Wire Line
8750 2900 8750 3050
Wire Wire Line
9400 2950 9400 3050
Wire Wire Line
9200 1500 9200 1800
Wire Wire Line
8050 1500 8250 1500
Connection ~ 6100 2450
Wire Wire Line
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Connection ~ 7800 900
$EndSCHEMATC

View File

@ -1,23 +0,0 @@
EESchema-DOCLIB Version 2.0
#
$CMP +12V
D power-flag symbol
K Power Flag Symbol
$ENDCMP
#
$CMP GND
D GROUND power-flag symbol
K Power Flag Symbol
$ENDCMP
#
$CMP PWR_FLAG
D general power-flag symbol
K Power Flag Symbol
$ENDCMP
#
$CMP R
D Resistance
K R DEV
$ENDCMP
#
#End Doc Library

View File

@ -0,0 +1,541 @@
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View File

@ -1,191 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# +12V
#
DEF +12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "+12V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# 0
#
DEF 0 #GND 0 0 Y Y 1 F P
F0 "#GND" 0 -100 50 H I C CNN
F1 "0" 0 -70 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X 0 1 0 0 0 R 40 40 1 1 W N
ENDDRAW
ENDDEF
#
# CAP
#
DEF CAP C 0 10 Y Y 1 F N
F0 "C" 100 150 50 V V C CNN
F1 "CAP" 100 -150 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
ALIAS C
DRAW
P 2 0 1 0 -150 -50 150 -50 N
P 2 0 1 0 -150 50 150 50 N
X ~ 1 0 250 200 D 40 40 1 1 P
X ~ 2 0 -250 200 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# DIODE
#
DEF DIODE D 0 40 Y N 1 F N
F0 "D" 0 150 50 H V C CNN
F1 "DIODE" 0 -175 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 2 0 1 0 -75 100 -75 -100 N
P 3 0 1 0 75 100 75 -100 -75 0 F
X K 1 -200 0 150 R 50 50 1 1 I
X A 2 200 0 150 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -200 30 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# INDUCTOR
#
DEF INDUCTOR L 0 0 N Y 1 F N
F0 "L" 0 100 50 H V C CNN
F1 "INDUCTOR" 0 -50 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
A -150 0 50 1 1799 0 1 0 N -100 0 -200 0
A -50 0 50 1 1799 0 1 0 N 0 0 -100 0
A 50 0 50 1 1799 0 1 0 N 100 0 0 0
A 150 0 50 1 1799 0 1 0 N 200 0 100 0
X 1 1 -250 0 50 R 30 30 1 1 I
X 2 2 250 0 50 L 30 30 1 1 I
ENDDRAW
ENDDEF
#
# ISOURCE
#
DEF ISOURCE I 0 40 Y Y 1 F N
F0 "I" 0 -180 50 H V C CNN
F1 "ISOURCE" 10 170 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
C 0 -150 250 0 1 0 N
C 0 150 250 0 1 0 N
T 0 -320 -10 100 0 0 1 I Normal 0 C C
P 2 0 1 0 -350 -200 -350 200 F
P 3 0 1 0 -400 200 -350 300 -300 200 F
X E1 1 0 700 300 D 50 50 1 1 I
X E2 2 0 -700 300 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# PWR_FLAG
#
DEF PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 75 50 H I C CNN
F1 "PWR_FLAG" 0 150 40 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
X pwr 1 0 0 0 U 50 50 0 0 w
ENDDRAW
ENDDEF
#
# QNPN
#
DEF QNPN Q 0 0 Y Y 1 F N
F0 "Q" -100 300 50 H V C CNN
F1 "QNPN" -100 200 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 2 0 0 0 0 0 150 -150 N
P 4 0 0 0 150 -150 150 -50 50 -150 150 -150 F
P 2 0 1 0 0 -150 0 150 N
P 2 0 1 0 0 0 150 150 N
X C 1 150 350 200 D 40 40 1 1 P
X B 2 -300 0 300 R 40 40 1 1 I
X E 3 150 -350 200 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# QPNP
#
DEF QPNP Q 0 0 Y Y 1 F N
F0 "Q" -100 300 50 H V C CNN
F1 "QPNP" -100 200 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 2 0 1 0 0 -150 0 150 N
P 2 0 1 0 0 0 150 -150 N
P 2 0 1 0 0 0 150 150 N
P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F
X C 1 150 350 200 D 40 40 1 1 C
X B 2 -300 0 300 R 40 40 1 1 I
X E 3 150 -350 200 U 40 40 1 1 E
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
S -40 150 40 -150 0 1 0 N
X ~ 1 0 250 100 D 50 50 1 1 P
X ~ 2 0 -250 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF VSOURCE V 0 40 Y Y 1 F N
F0 "V" 0 -100 50 H V C CNN
F1 "VSOURCE" 0 100 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
C 0 0 400 0 1 0 N
T 0 -320 -10 100 0 0 1 V Normal 0 C C
P 2 0 1 0 -250 -250 -250 150 F
P 3 0 1 0 -300 150 -250 250 -200 150 F
X E1 1 0 700 300 D 50 50 1 1 I
X E2 2 0 -700 300 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

View File

@ -1,3 +1,3 @@
(sym_lib_table
(lib (name schematic_libspice)(type Legacy)(uri ${KIPRJMOD}/schematic_libspice.lib)(options "")(descr ""))
(lib (name "schematic_libspice")(type "KiCad")(uri "${KIPRJMOD}/schematic_libspice.kicad_sym")(options "")(descr ""))
)

View File

@ -1,101 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# rectifier_schlib_C
#
DEF rectifier_schlib_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "rectifier_schlib_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
Capacitors_ThroughHole:C_Radial_D10_L13_P5
Capacitors_SMD:C_0805
Capacitors_SMD:C_1206
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# rectifier_schlib_D
#
DEF rectifier_schlib_D D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "rectifier_schlib_D" 0 -100 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Diode_*
D-Pak_TO252AA
*SingleDiode
*_Diode_*
*SingleDiode*
$ENDFPLIST
DRAW
P 2 0 1 6 -50 50 -50 -50 N
P 3 0 1 0 50 50 -50 0 50 -50 F
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# rectifier_schlib_GND
#
DEF rectifier_schlib_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "rectifier_schlib_GND" 0 -123 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 20 30 1 1 W N
ENDDRAW
ENDDEF
#
# rectifier_schlib_R
#
DEF rectifier_schlib_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "rectifier_schlib_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# rectifier_schlib_VSOURCE
#
DEF rectifier_schlib_VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "rectifier_schlib_VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

View File

@ -0,0 +1,285 @@
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View File

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View File

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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H V C CNN
F3 "" 0 0 50 H V C CNN
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C?
C_????_*
C_????
SMD*_c
Capacitor*
Capacitors_ThroughHole:C_Radial_D10_L13_P5
Capacitors_SMD:C_0805
Capacitors_SMD:C_1206
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# D
#
DEF D D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "D" 0 -100 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Diode_*
D-Pak_TO252AA
*SingleDiode
*_Diode_*
*SingleDiode*
$ENDFPLIST
DRAW
P 2 0 1 6 -50 50 -50 -50 N
P 3 0 1 0 50 50 -50 0 50 -50 F
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "GND" 0 -123 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 20 30 1 1 W N
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 50 V V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

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@ -1,3 +1,3 @@
(sym_lib_table
(lib (name rectifier_schlib)(type Legacy)(uri ${KIPRJMOD}/rectifier_schlib.lib)(options "")(descr ""))
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View File

@ -1,121 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Generic_Opamp
#
DEF Generic_Opamp U 0 20 Y Y 1 F N
F0 "U" 0 250 50 H V L CNN
F1 "Generic_Opamp" 0 150 50 H V L CNN
F2 "" -100 -100 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X - 2 -300 -100 100 R 50 50 1 1 I
X V+ 3 -100 300 150 D 50 50 1 1 W
X V- 4 -100 -300 150 U 50 50 1 1 W
X ~ 5 300 0 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 30 V V C CNN
F3 "" 0 0 30 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 60 60 1 1 P
X ~ 2 0 -150 50 U 60 60 1 1 P
ENDDRAW
ENDDEF
#
# VDD
#
DEF VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VDD" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# VSS
#
DEF VSS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VSS" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VSS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

View File

@ -0,0 +1,285 @@
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View File

@ -0,0 +1,752 @@
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(number "1" (effects (font (size 1.27 1.27))))
)
)
)
)

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@ -1,121 +0,0 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Generic_Opamp
#
DEF Generic_Opamp U 0 20 Y Y 1 F N
F0 "U" 0 250 50 H V L CNN
F1 "Generic_Opamp" 0 150 50 H V L CNN
F2 "" -100 -100 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X - 2 -300 -100 100 R 50 50 1 1 I
X V+ 3 -100 300 150 D 50 50 1 1 W
X V- 4 -100 -300 150 U 50 50 1 1 W
X ~ 5 300 0 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 30 V V C CNN
F3 "" 0 0 30 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 60 60 1 1 P
X ~ 2 0 -150 50 U 60 60 1 1 P
ENDDRAW
ENDDEF
#
# VDD
#
DEF VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VDD" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# VSS
#
DEF VSS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VSS" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VSS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

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@ -1,3 +1,3 @@
(sym_lib_table
(lib (name sallen_key_schlib)(type Legacy)(uri ${KIPRJMOD}/sallen_key_schlib.lib)(options "")(descr "spice demo"))
(lib (name "sallen_key_schlib")(type "KiCad")(uri "${KIPRJMOD}/sallen_key_schlib.kicad_sym")(options "")(descr ""))
)