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Renamed BOARD_CONNECTED_ITEM::GetNet() -> GetNetCode() 

Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().
This commit is contained in:
Maciej Suminski 2014-02-25 11:40:34 +01:00
parent 151826b206
commit 75026d8754
58 changed files with 310 additions and 319 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
pcbnew/attribut.cpp
View File

@ -103,7 +103,7 @@ void PCB_EDIT_FRAME::Attribut_net( wxDC* DC, int net_code, bool Flag_On )
{
for( ; Track != NULL; Track = Track->Next() )
{
if( net_code == Track->GetNet() )
if( net_code == Track->GetNetCode() )
break;
}
}
@ -112,7 +112,7 @@ void PCB_EDIT_FRAME::Attribut_net( wxDC* DC, int net_code, bool Flag_On )
while( Track ) /* Flag change */
{
if( (net_code >= 0 ) && (net_code != Track->GetNet()) )
if( ( net_code >= 0 ) && ( net_code != Track->GetNetCode() ) )
break;
OnModify();

2
pcbnew/autorouter/auto_place_footprints.cpp
View File

@ -499,7 +499,7 @@ int genPlacementRoutingMatrix( BOARD* aBrd, EDA_MSG_PANEL* messagePanel )
TRACK TmpSegm( NULL );
TmpSegm.SetLayer( UNDEFINED_LAYER );
TmpSegm.SetNet( -1 );
TmpSegm.SetNetCode( -1 );
TmpSegm.SetWidth( RoutingMatrix.m_GridRouting / 2 );
EDA_ITEM* PtStruct = aBrd->m_Drawings;

2
pcbnew/autorouter/autorout.cpp
View File

@ -78,7 +78,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
{
case PCB_PAD_T:
Pad = (D_PAD*) GetScreen()->GetCurItem();
autoroute_net_code = Pad->GetNet();
autoroute_net_code = Pad->GetNetCode();
break;
default:

10
pcbnew/autorouter/routing_matrix.cpp
View File

@ -215,7 +215,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
{
D_PAD* pad = aPcb->GetPad( i );
if( net_code != pad->GetNet() || (flag & FORCE_PADS) )
if( net_code != pad->GetNetCode() || (flag & FORCE_PADS) )
{
::PlacePad( pad, HOLE, marge, WRITE_CELL );
}
@ -247,7 +247,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
tmpSegm.SetShape( edge->GetShape() );
tmpSegm.SetWidth( edge->GetWidth() );
tmpSegm.m_Param = edge->GetAngle();
tmpSegm.SetNet( -1 );
tmpSegm.SetNetCode( -1 );
TraceSegmentPcb( &tmpSegm, HOLE, marge, WRITE_CELL );
TraceSegmentPcb( &tmpSegm, VIA_IMPOSSIBLE, via_marge, WRITE_OR_CELL );
@ -284,7 +284,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
tmpSegm.SetShape( DrawSegm->GetShape() );
tmpSegm.SetWidth( DrawSegm->GetWidth() );
tmpSegm.m_Param = DrawSegm->GetAngle();
tmpSegm.SetNet( -1 );
tmpSegm.SetNetCode( -1 );
TraceSegmentPcb( &tmpSegm, type_cell, marge, WRITE_CELL );
}
@ -335,7 +335,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
/* Put tracks and vias on matrix */
for( TRACK* track = aPcb->m_Track; track; track = track->Next() )
{
if( net_code == track->GetNet() )
if( net_code == track->GetNetCode() )
continue;
TraceSegmentPcb( track, HOLE, marge, WRITE_CELL );
@ -374,7 +374,7 @@ int Build_Work( BOARD* Pcb )
pt_pad = pt_rats->m_PadStart;
current_net_code = pt_pad->GetNet();
current_net_code = pt_pad->GetNetCode();
pt_ch = pt_rats;
r1 = ( pt_pad->GetPosition().y - RoutingMatrix.m_BrdBox.GetY() + demi_pas )

6
pcbnew/autorouter/solve.cpp
View File

@ -1180,7 +1180,7 @@ static void OrCell_Trace( BOARD* pcb, int col, int row,
g_CurrentTrackSegment->SetWidth( pcb->GetCurrentViaSize() );
g_CurrentTrackSegment->SetShape( pcb->GetDesignSettings().m_CurrentViaType );
g_CurrentTrackSegment->SetNet( current_net_code );
g_CurrentTrackSegment->SetNetCode( current_net_code );
}
else // placement of a standard segment
{
@ -1198,7 +1198,7 @@ static void OrCell_Trace( BOARD* pcb, int col, int row,
( RoutingMatrix.m_GridRouting * row ),
pcb->GetBoundingBox().GetY() +
( RoutingMatrix.m_GridRouting * col )));
g_CurrentTrackSegment->SetNet( current_net_code );
g_CurrentTrackSegment->SetNetCode( current_net_code );
if( g_CurrentTrackSegment->Back() == NULL ) /* Start trace. */
{
@ -1319,7 +1319,7 @@ static void AddNewTrace( PCB_EDIT_FRAME* pcbframe, wxDC* DC )
}
// Insert new segments in real board
int netcode = g_FirstTrackSegment->GetNet();
int netcode = g_FirstTrackSegment->GetNetCode();
TRACK* firstTrack = g_FirstTrackSegment;
int newCount = g_CurrentTrackList.GetCount();

32
pcbnew/class_board.cpp
View File

@ -1345,14 +1345,6 @@ NETINFO_ITEM* BOARD::FindNet( int aNetcode ) const
// NULL is returned for non valid netcodes
NETINFO_ITEM* net = m_NetInfo.GetNetItem( aNetcode );
#if defined(DEBUG)
if( net && aNetcode != net->GetNet()) // item can be NULL if anetcode is not valid
{
wxLogError( wxT( "FindNet() anetcode %d != GetNet() %d (net: %s)\n" ),
aNetcode, net->GetNet(), TO_UTF8( net->GetNetname() ) );
}
#endif
return net;
}
@ -1515,7 +1507,7 @@ ZONE_CONTAINER* BOARD::HitTestForAnyFilledArea( const wxPoint& aRefPos,
if( area->GetState( BUSY ) )
continue;
if( aNetCode >= 0 && area->GetNet() != aNetCode )
if( aNetCode >= 0 && area->GetNetCode() != aNetCode )
continue;
if( area->HitTestFilledArea( aRefPos ) )
@ -1534,24 +1526,24 @@ int BOARD::SetAreasNetCodesFromNetNames( void )
{
if( !GetArea( ii )->IsOnCopperLayer() )
{
GetArea( ii )->SetNet( NETINFO_LIST::UNCONNECTED );
GetArea( ii )->SetNetCode( NETINFO_LIST::UNCONNECTED );
continue;
}
if( GetArea( ii )->GetNet() != 0 ) // i.e. if this zone is connected to a net
if( GetArea( ii )->GetNetCode() != 0 ) // i.e. if this zone is connected to a net
{
const NETINFO_ITEM* net = FindNet( GetArea( ii )->GetNetname() );
const NETINFO_ITEM* net = GetArea( ii )->GetNet();
if( net )
{
GetArea( ii )->SetNet( net->GetNet() );
GetArea( ii )->SetNetCode( net->GetNet() );
}
else
{
error_count++;
// keep Net Name and set m_NetCode to -1 : error flag.
GetArea( ii )->SetNet( -1 );
GetArea( ii )->SetNetCode( -1 );
}
}
}
@ -2271,7 +2263,7 @@ ZONE_CONTAINER* BOARD::InsertArea( int netcode, int iarea, LAYER_NUM layer, int
{
ZONE_CONTAINER* new_area = new ZONE_CONTAINER( this );
new_area->SetNet( netcode );
new_area->SetNetCode( netcode );
new_area->SetLayer( layer );
new_area->SetTimeStamp( GetNewTimeStamp() );
@ -2310,7 +2302,7 @@ bool BOARD::NormalizeAreaPolygon( PICKED_ITEMS_LIST * aNewZonesList, ZONE_CONTAI
{
// create new copper area and copy poly into it
CPolyLine* new_p = (*pa)[ip - 1];
NewArea = AddArea( aNewZonesList, aCurrArea->GetNet(), aCurrArea->GetLayer(),
NewArea = AddArea( aNewZonesList, aCurrArea->GetNetCode(), aCurrArea->GetLayer(),
wxPoint(0, 0), CPolyLine::NO_HATCH );
// remove the poly that was automatically created for the new area
@ -2551,7 +2543,7 @@ void BOARD::ReplaceNetlist( NETLIST& aNetlist, bool aDeleteSinglePadNets,
}
if( !aNetlist.IsDryRun() )
pad->SetNet( NETINFO_LIST::UNCONNECTED );
pad->SetNetCode( NETINFO_LIST::UNCONNECTED );
}
}
else // Footprint pad has a net.
@ -2580,7 +2572,7 @@ void BOARD::ReplaceNetlist( NETLIST& aNetlist, bool aDeleteSinglePadNets,
m_NetInfo.AppendNet( netinfo );
}
pad->SetNet( netinfo->GetNet() );
pad->SetNetCode( netinfo->GetNet() );
}
}
}
@ -2654,7 +2646,7 @@ void BOARD::ReplaceNetlist( NETLIST& aNetlist, bool aDeleteSinglePadNets,
aReporter->Report( msg );
}
previouspad->SetNet( NETINFO_LIST::UNCONNECTED );
previouspad->SetNetCode( NETINFO_LIST::UNCONNECTED );
}
netname = pad->GetNetname();
count = 1;
@ -2667,7 +2659,7 @@ void BOARD::ReplaceNetlist( NETLIST& aNetlist, bool aDeleteSinglePadNets,
// Examine last pad
if( pad && count == 1 )
pad->SetNet( NETINFO_LIST::UNCONNECTED );
pad->SetNetCode( NETINFO_LIST::UNCONNECTED );
}
// Last step: Some tests:

19
pcbnew/class_board_connected_item.cpp
View File

@ -35,28 +35,28 @@
#include <class_board_item.h>
BOARD_CONNECTED_ITEM::BOARD_CONNECTED_ITEM( BOARD_ITEM* aParent, KICAD_T idtype ) :
BOARD_ITEM( aParent, idtype ), m_Subnet( 0 ), m_ZoneSubnet( 0 ),
m_netinfo( &NETINFO_LIST::ORPHANED )
BOARD_ITEM( aParent, idtype ), m_netinfo( &NETINFO_LIST::ORPHANED ),
m_Subnet( 0 ), m_ZoneSubnet( 0 )
{
// The unconnected is set only in case the item belongs to a BOARD
SetNet( NETINFO_LIST::UNCONNECTED );
// The unconnected net is set only in case the item belongs to a BOARD
SetNetCode( NETINFO_LIST::UNCONNECTED );
}
BOARD_CONNECTED_ITEM::BOARD_CONNECTED_ITEM( const BOARD_CONNECTED_ITEM& aItem ) :
BOARD_ITEM( aItem ), m_Subnet( aItem.m_Subnet ), m_ZoneSubnet( aItem.m_ZoneSubnet ),
m_netinfo( aItem.m_netinfo )
BOARD_ITEM( aItem ), m_netinfo( aItem.m_netinfo ), m_Subnet( aItem.m_Subnet ),
m_ZoneSubnet( aItem.m_ZoneSubnet )
{
}
int BOARD_CONNECTED_ITEM::GetNet() const
int BOARD_CONNECTED_ITEM::GetNetCode() const
{
return m_netinfo->GetNet();
}
void BOARD_CONNECTED_ITEM::SetNet( int aNetCode )
void BOARD_CONNECTED_ITEM::SetNetCode( int aNetCode )
{
BOARD* board = GetBoard();
if( board )
@ -136,8 +136,7 @@ NETCLASS* BOARD_CONNECTED_ITEM::GetNetClass() const
}
NETCLASS* netclass = NULL;
int netcode = GetNet();
NETINFO_ITEM* net = board->FindNet( netcode );
NETINFO_ITEM* net = board->FindNet( GetNetCode() );
if( net )
{

41
pcbnew/class_board_connected_item.h
View File

@ -54,18 +54,6 @@ public:
std::vector<TRACK*> m_TracksConnected; // list of other tracks connected to me
std::vector<D_PAD*> m_PadsConnected; // list of other pads connected to me
private:
int m_Subnet; /* In rastnest routines : for the current net, block number
* (number common to the current connected items found)
*/
int m_ZoneSubnet; // used in rastnest computations : for the current net,
// handle cluster number in zone connection
/// Stores all informations about the net that item belongs to
const NETINFO_ITEM* m_netinfo;
public:
BOARD_CONNECTED_ITEM( BOARD_ITEM* aParent, KICAD_T idtype );
BOARD_CONNECTED_ITEM( const BOARD_CONNECTED_ITEM& aItem );
@ -78,17 +66,26 @@ public:
/**
* Function GetNet
* @return int - the net code.
* Returns NET_INFO object for a given item.
*/
int GetNet() const;
NETINFO_ITEM* GetNet() const
{
return m_netinfo;
}
/**
* Function SetNet
* Function GetNetCode
* @return int - the net code.
*/
int GetNetCode() const;
/**
* Function SetNetCode
* sets net using a net code.
* @param aNetCode is a net code for the new net. It has to exist in NETINFO_LIST held by BOARD.
* Otherwise, item is assigned to the unconnected net.
*/
void SetNet( int aNetCode );
void SetNetCode( int aNetCode );
/**
* Function GetSubNet
@ -156,6 +153,18 @@ public:
* @return the Net Class name of this item
*/
wxString GetNetClassName() const;
protected:
/// Stores all informations about the net that item belongs to
NETINFO_ITEM* m_netinfo;
private:
int m_Subnet; /* In rastnest routines : for the current net, block number
* (number common to the current connected items found)
*/
int m_ZoneSubnet; // used in rastnest computations : for the current net,
// handle cluster number in zone connection
};

2
pcbnew/class_netinfo.h
View File

@ -320,7 +320,7 @@ public:
///> NETINFO_ITEM meaning that there was no net assigned for an item, as there was no
///> board storing net list available.
static const NETINFO_ITEM ORPHANED;
static NETINFO_ITEM ORPHANED;
#if defined(DEBUG)
void Show() const;

9
pcbnew/class_netinfo_item.cpp
View File

@ -58,8 +58,7 @@ NETINFO_ITEM::NETINFO_ITEM( BOARD_ITEM* aParent, const wxString& aNetName, int a
m_RatsnestEndIdx = 0; // Ending point of ratsnests of this net
m_NetClassName = NETCLASS::Default;
m_NetClass = 0;
m_NetClass = NULL;
}
@ -102,7 +101,7 @@ void NETINFO_ITEM::GetMsgPanelInfo( std::vector< MSG_PANEL_ITEM >& aList )
{
for( pad = module->Pads(); pad != 0; pad = pad->Next() )
{
if( pad->GetNet() == GetNet() )
if( pad->GetNetCode() == GetNet() )
{
count++;
lengthPadToDie += pad->GetPadToDieLength();
@ -120,13 +119,13 @@ void NETINFO_ITEM::GetMsgPanelInfo( std::vector< MSG_PANEL_ITEM >& aList )
{
if( Struct->Type() == PCB_VIA_T )
{
if( ( (SEGVIA*) Struct )->GetNet() == GetNet() )
if( ( (SEGVIA*) Struct )->GetNetCode() == GetNet() )
count++;
}
if( Struct->Type() == PCB_TRACE_T )
{
if( ( (TRACK*) Struct )->GetNet() == GetNet() )
if( ( (TRACK*) Struct )->GetNetCode() == GetNet() )
lengthnet += ( (TRACK*) Struct )->GetLength();
}
}

20
pcbnew/class_netinfolist.cpp
View File

@ -125,11 +125,16 @@ void NETINFO_LIST::buildListOfNets()
{
pad = m_PadsFullList[ii];
if( pad->GetNet() == NETINFO_LIST::UNCONNECTED ) // pad not connected
if( pad->GetNetCode() == NETINFO_LIST::UNCONNECTED ) // pad not connected
continue;
// Add pad to the appropriate list of pads
GetNetItem( pad->GetNet() )->m_PadInNetList.push_back( pad );
NETINFO_ITEM* net = pad->GetNet();
// it should not be possible for BOARD_CONNECTED_ITEM to return NULL as a result of GetNet()
wxASSERT( net );
if( net )
net->m_PadInNetList.push_back( pad );
++nodes_count;
}
@ -232,24 +237,24 @@ void NETINFO_MAPPING::Update()
// Zones
for( int i = 0; i < m_board->GetAreaCount(); ++i )
nets.insert( m_board->GetArea( i )->GetNet() );
nets.insert( m_board->GetArea( i )->GetNetCode() );
// Tracks
for( TRACK* track = m_board->m_Track; track; track = track->Next() )
nets.insert( track->GetNet() );
nets.insert( track->GetNetCode() );
// Modules/pads
for( MODULE* module = m_board->m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads().GetFirst(); pad; pad = pad->Next() )
{
nets.insert( pad->GetNet() );
nets.insert( pad->GetNetCode() );
}
}
// Segzones
for( SEGZONE* zone = m_board->m_Zone; zone; zone = zone->Next() )
nets.insert( zone->GetNet() );
nets.insert( zone->GetNetCode() );
// Prepare the new mapping
m_netMapping.clear();
@ -275,5 +280,4 @@ NETINFO_ITEM* NETINFO_MAPPING::iterator::operator->() const
const int NETINFO_LIST::UNCONNECTED = 0;
const NETINFO_ITEM NETINFO_LIST::ORPHANED = NETINFO_ITEM( NULL, wxEmptyString,
NETINFO_LIST::UNCONNECTED );
NETINFO_ITEM NETINFO_LIST::ORPHANED = NETINFO_ITEM( NULL, wxEmptyString, NETINFO_LIST::UNCONNECTED );

4
pcbnew/class_pad.cpp
View File

@ -373,7 +373,7 @@ void D_PAD::Copy( D_PAD* source )
m_layerMask = source->m_layerMask;
m_NumPadName = source->m_NumPadName;
SetNet( source->GetNet() );
m_netinfo = source->m_netinfo;
m_Drill = source->m_Drill;
m_drillShape = source->m_drillShape;
m_Offset = source->m_Offset;
@ -403,7 +403,7 @@ void D_PAD::CopyNetlistSettings( D_PAD* aPad )
// Don't do anything foolish like trying to copy to yourself.
wxCHECK_RET( aPad != NULL && aPad != this, wxT( "Cannot copy to NULL or yourself." ) );
aPad->SetNet( GetNet() );
aPad->SetNetCode( GetNetCode() );
aPad->SetLocalClearance( m_LocalClearance );
aPad->SetLocalSolderMaskMargin( m_LocalSolderMaskMargin );

2
pcbnew/class_pad_draw_functions.cpp
View File

@ -473,7 +473,7 @@ void D_PAD::DrawShape( EDA_RECT* aClipBox, wxDC* aDC, PAD_DRAWINFO& aDrawInfo )
GRSetDrawMode( aDC, aDrawInfo.m_DrawMode );
// Draw "No connect" ( / or \ or cross X ) if necessary
if( GetNet() == 0 && aDrawInfo.m_ShowNCMark )
if( GetNetCode() == 0 && aDrawInfo.m_ShowNCMark )
{
int dx0 = std::min( halfsize.x, halfsize.y );
EDA_COLOR_T nc_color = BLUE;

45
pcbnew/class_track.cpp
View File

@ -160,15 +160,11 @@ EDA_ITEM* SEGZONE::Clone() const
wxString SEGZONE::GetSelectMenuText() const
{
wxString text, nettxt;
NETINFO_ITEM* net;
BOARD* board = GetBoard();
if( board )
{
net = board->FindNet( GetNet() );
if( net )
nettxt = net->GetNetname();
nettxt = GetNetname();
}
else
{
@ -201,7 +197,6 @@ wxString SEGVIA::GetSelectMenuText() const
{
wxString text;
wxString format;
NETINFO_ITEM* net;
BOARD* board = GetBoard();
int shape = GetShape();
@ -215,18 +210,14 @@ wxString SEGVIA::GetSelectMenuText() const
if( board )
{
net = board->FindNet( GetNet() );
wxString netname;
if( net )
netname = net->GetNetname();
wxString netname = GetNetname();
// say which layers, only two for now
LAYER_NUM topLayer;
LAYER_NUM botLayer;
ReturnLayerPair( &topLayer, &botLayer );
text.Printf( format.GetData(), GetChars( ShowWidth() ),
GetChars( netname ), GetNet(),
GetChars( netname ), GetNetCode(),
GetChars( board->GetLayerName( topLayer ) ),
GetChars( board->GetLayerName( botLayer ) ) );
@ -496,7 +487,7 @@ TRACK* TRACK::GetBestInsertPoint( BOARD* aPcb )
for( ; track; track = track->Next() )
{
if( GetNet() <= track->GetNet() )
if( GetNetCode() <= track->GetNetCode() )
return track;
}
@ -510,14 +501,14 @@ TRACK* TRACK::GetStartNetCode( int NetCode )
int ii = 0;
if( NetCode == -1 )
NetCode = GetNet();
NetCode = GetNetCode();
while( Track != NULL )
{
if( Track->GetNet() > NetCode )
if( Track->GetNetCode() > NetCode )
break;
if( Track->GetNet() == NetCode )
if( Track->GetNetCode() == NetCode )
{
ii++;
break;
@ -542,19 +533,19 @@ TRACK* TRACK::GetEndNetCode( int NetCode )
return NULL;
if( NetCode == -1 )
NetCode = GetNet();
NetCode = GetNetCode();
while( Track != NULL )
{
NextS = (TRACK*) Track->Pnext;
if( Track->GetNet() == NetCode )
if( Track->GetNetCode() == NetCode )
ii++;
if( NextS == NULL )
break;
if( NextS->GetNet() > NetCode )
if( NextS->GetNetCode() > NetCode )
break;
Track = NextS;
@ -690,10 +681,10 @@ void TRACK::Draw( EDA_DRAW_PANEL* panel, wxDC* aDC, GR_DRAWMODE aDrawMode,
if( aDC->LogicalToDeviceXRel( m_Width ) < MIN_TEXT_SIZE )
return;
if( GetNet() == NETINFO_LIST::UNCONNECTED )
if( GetNetCode() == NETINFO_LIST::UNCONNECTED )
return;
NETINFO_ITEM* net = ( (BOARD*) GetParent() )->FindNet( GetNet() );
NETINFO_ITEM* net = GetNet();
if( net == NULL )
return;
@ -952,13 +943,13 @@ void SEGVIA::Draw( EDA_DRAW_PANEL* panel, wxDC* aDC, GR_DRAWMODE aDrawMode,
}
// Display the short netname:
if( GetNet() == NETINFO_LIST::UNCONNECTED )
if( GetNetCode() == NETINFO_LIST::UNCONNECTED )
return;
if( DisplayOpt.DisplayNetNamesMode == 0 || DisplayOpt.DisplayNetNamesMode == 1 )
return;
NETINFO_ITEM* net = ( (BOARD*) GetParent() )->FindNet( GetNet() );
NETINFO_ITEM* net = GetNet();
if( net == NULL )
return;
@ -1095,7 +1086,7 @@ void TRACK::GetMsgPanelInfoBase( std::vector< MSG_PANEL_ITEM >& aList )
// Display Net Name (in Pcbnew)
if( board )
{
NETINFO_ITEM* net = board->FindNet( GetNet() );
NETINFO_ITEM* net = GetNet();
if( net )
msg = net->GetNetname();
@ -1105,7 +1096,7 @@ void TRACK::GetMsgPanelInfoBase( std::vector< MSG_PANEL_ITEM >& aList )
aList.push_back( MSG_PANEL_ITEM( _( "NetName" ), msg, RED ) );
/* Display net code : (useful in test or debug) */
msg.Printf( wxT( "%d.%d" ), GetNet(), GetSubNet() );
msg.Printf( wxT( "%d.%d" ), GetNetCode(), GetSubNet() );
aList.push_back( MSG_PANEL_ITEM( _( "NetCode" ), msg, RED ) );
}
@ -1576,7 +1567,7 @@ wxString TRACK::GetSelectMenuText() const
// disambiguate all the choices under the cursor!
if( board )
{
net = board->FindNet( GetNet() );
net = GetNet();
if( net )
netname = net->GetNetname();
@ -1591,7 +1582,7 @@ wxString TRACK::GetSelectMenuText() const
text.Printf( _("Track %s, net [%s] (%d) on layer %s, length: %s" ),
GetChars( ShowWidth() ), GetChars( netname ),
GetNet(), GetChars( GetLayerName() ),
GetNetCode(), GetChars( GetLayerName() ),
GetChars( ::LengthDoubleToString( GetLength() ) ) );
return text;

14
pcbnew/class_zone.cpp
View File

@ -74,7 +74,7 @@ ZONE_CONTAINER::ZONE_CONTAINER( const ZONE_CONTAINER& aZone ) :
BOARD_CONNECTED_ITEM( aZone )
{
// Should the copy be on the same net?
SetNet( aZone.GetNet() );
SetNetCode( aZone.GetNetCode() );
m_Poly = new CPolyLine( *aZone.m_Poly );
// For corner moving, corner index to drag, or -1 if no selection
@ -620,9 +620,9 @@ void ZONE_CONTAINER::GetMsgPanelInfo( std::vector< MSG_PANEL_ITEM >& aList )
}
else if( IsOnCopperLayer() )
{
if( GetNet() >= 0 )
if( GetNetCode() >= 0 )
{
NETINFO_ITEM* equipot = board->FindNet( GetNet() );
NETINFO_ITEM* equipot = GetNet();
if( equipot )
msg = equipot->GetNetname();
@ -640,7 +640,7 @@ void ZONE_CONTAINER::GetMsgPanelInfo( std::vector< MSG_PANEL_ITEM >& aList )
#if 1
// Display net code : (useful in test or debug)
msg.Printf( wxT( "%d" ), GetNet() );
msg.Printf( wxT( "%d" ), GetNetCode() );
aList.push_back( MSG_PANEL_ITEM( _( "NetCode" ), msg, RED ) );
#endif
@ -801,7 +801,7 @@ void ZONE_CONTAINER::Copy( ZONE_CONTAINER* src )
{
m_Parent = src->m_Parent;
m_Layer = src->m_Layer;
SetNet( src->GetNet() );
SetNetCode( src->GetNetCode() );
SetTimeStamp( src->m_TimeStamp );
m_Poly->RemoveAllContours();
m_Poly->Copy( src->m_Poly ); // copy outlines
@ -869,11 +869,11 @@ wxString ZONE_CONTAINER::GetSelectMenuText() const
// Display net name for copper zones
if( !GetIsKeepout() )
{
if( GetNet() >= 0 )
if( GetNetCode() >= 0 )
{
if( board )
{
net = board->FindNet( GetNet() );
net = GetNet();
if( net )
{

4
pcbnew/class_zone_settings.cpp
View File

@ -76,7 +76,7 @@ ZONE_SETTINGS& ZONE_SETTINGS::operator << ( const ZONE_CONTAINER& aSource )
m_FillMode = aSource.GetFillMode();
m_ZoneClearance = aSource.GetClearance();
m_ZoneMinThickness = aSource.GetMinThickness();
m_NetcodeSelection = aSource.GetNet();
m_NetcodeSelection = aSource.GetNetCode();
m_CurrentZone_Layer = aSource.GetLayer();
m_Zone_HatchingStyle = aSource.GetHatchStyle();
m_ArcToSegmentsCount = aSource.GetArcSegmentCount();
@ -113,7 +113,7 @@ void ZONE_SETTINGS::ExportSetting( ZONE_CONTAINER& aTarget, bool aFullExport ) c
if( aFullExport )
{
aTarget.SetPriority( m_ZonePriority );
aTarget.SetNet( m_NetcodeSelection );
aTarget.SetNetCode( m_NetcodeSelection );
aTarget.SetLayer( m_CurrentZone_Layer );
aTarget.Outline()->SetLayer( m_CurrentZone_Layer );
}

22
pcbnew/clean.cpp
View File

@ -323,14 +323,14 @@ bool TRACKS_CLEANER::deleteUnconnectedTracks()
zone = m_Brd->HitTestForAnyFilledArea( track->GetStart(),
track->GetLayer(),
track->GetLayer(),
track->GetNet() );
track->GetNetCode() );
}
else
{
((SEGVIA*)track)->ReturnLayerPair( &top_layer, &bottom_layer );
zone = m_Brd->HitTestForAnyFilledArea( track->GetStart(),
top_layer, bottom_layer,
track->GetNet() );
track->GetNetCode() );
}
}
@ -359,7 +359,7 @@ bool TRACKS_CLEANER::deleteUnconnectedTracks()
zone = m_Brd->HitTestForAnyFilledArea( via->GetStart(),
bottom_layer,
top_layer,
via->GetNet() );
via->GetNetCode() );
}
if( (other == NULL) && (zone == NULL) )
@ -383,14 +383,14 @@ bool TRACKS_CLEANER::deleteUnconnectedTracks()
zone = m_Brd->HitTestForAnyFilledArea( track->GetEnd(),
track->GetLayer(),
track->GetLayer(),
track->GetNet() );
track->GetNetCode() );
}
else
{
((SEGVIA*)track)->ReturnLayerPair( &top_layer, &bottom_layer );
zone = m_Brd->HitTestForAnyFilledArea( track->GetEnd(),
top_layer, bottom_layer,
track->GetNet() );
track->GetNetCode() );
}
}
@ -419,7 +419,7 @@ bool TRACKS_CLEANER::deleteUnconnectedTracks()
via->ReturnLayerPair( &top_layer, &bottom_layer );
zone = m_Brd->HitTestForAnyFilledArea( via->GetEnd(),
bottom_layer, top_layer,
via->GetNet() );
via->GetNetCode() );
}
if( (other == NULL) && (zone == NULL) )
@ -479,7 +479,7 @@ bool TRACKS_CLEANER::clean_segments()
if( segment->GetLayer() != other->GetLayer() )
continue;
if( segment->GetNet() != other->GetNet() )
if( segment->GetNetCode() != other->GetNetCode() )
break;
if( ( segment->GetStart() == other->GetStart() ) &&
@ -748,14 +748,14 @@ bool PCB_EDIT_FRAME::RemoveMisConnectedTracks()
if( segment->start && segment->start->Type()==PCB_PAD_T )
{
// get the netcode of the pad to propagate.
net_code_s = ((D_PAD*)(segment->start))->GetNet();
net_code_s = ((D_PAD*)(segment->start))->GetNetCode();
}
else
{
other = segment->GetTrace( GetBoard()->m_Track, NULL, FLG_START );
if( other )
net_code_s = other->GetNet();
net_code_s = other->GetNetCode();
}
if( net_code_s < 0 )
@ -766,14 +766,14 @@ bool PCB_EDIT_FRAME::RemoveMisConnectedTracks()
if( segment->end && segment->end->Type()==PCB_PAD_T )
{
net_code_e = ((D_PAD*)(segment->end))->GetNet();
net_code_e = ((D_PAD*)(segment->end))->GetNetCode();
}
else
{
other = segment->GetTrace( GetBoard()->m_Track, NULL, FLG_END );
if( other )
net_code_e = other->GetNet();
net_code_e = other->GetNetCode();
}
if( net_code_e < 0 )

24
pcbnew/connect.cpp
View File

@ -718,7 +718,7 @@ void PCB_BASE_FRAME::TestConnections()
for( TRACK* track = m_Pcb->m_Track; track; )
{
// At this point, track is the first track of a given net
current_net_code = track->GetNet();
current_net_code = track->GetNetCode();
// Get last track of the current net
TRACK* lastTrack = track->GetEndNetCode( current_net_code );
@ -760,7 +760,7 @@ void PCB_BASE_FRAME::TestNetConnection( wxDC* aDC, int aNetCode )
for( unsigned i = 0; i < m_Pcb->GetPadCount(); ++i )
{
D_PAD* pad = m_Pcb->GetPad(i);
int pad_net_code = pad->GetNet();
int pad_net_code = pad->GetNetCode();
if( pad_net_code < aNetCode )
continue;
@ -786,7 +786,7 @@ void PCB_BASE_FRAME::TestNetConnection( wxDC* aDC, int aNetCode )
if( firstTrack && lastTrack ) // i.e. if there are segments
{
connections.Build_CurrNet_SubNets_Connections( firstTrack, lastTrack, firstTrack->GetNet() );
connections.Build_CurrNet_SubNets_Connections( firstTrack, lastTrack, firstTrack->GetNetCode() );
}
}
@ -842,7 +842,7 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
curr_track->end = NULL;
curr_track->SetState( BUSY | IN_EDIT | BEGIN_ONPAD | END_ONPAD, false );
curr_track->SetZoneSubNet( 0 );
curr_track->SetNet( NETINFO_LIST::UNCONNECTED );
curr_track->SetNetCode( NETINFO_LIST::UNCONNECTED );
}
// If no pad, reset pointers and netcode, and do nothing else
@ -863,7 +863,7 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
for( ; curr_track != NULL; curr_track = curr_track->Next() )
{
if( curr_track->m_PadsConnected.size() )
curr_track->SetNet( curr_track->m_PadsConnected[0]->GetNet() );
curr_track->SetNetCode( curr_track->m_PadsConnected[0]->GetNetCode() );
}
// Pass 2: build connections between track ends
@ -883,17 +883,17 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
for( curr_track = m_Pcb->m_Track; curr_track; curr_track = curr_track->Next() )
{
int netcode = curr_track->GetNet();
int netcode = curr_track->GetNetCode();
if( netcode == 0 )
{ // try to find a connected item having a netcode
for( unsigned kk = 0; kk < curr_track->m_TracksConnected.size(); kk++ )
{
int altnetcode = curr_track->m_TracksConnected[kk]->GetNet();
int altnetcode = curr_track->m_TracksConnected[kk]->GetNetCode();
if( altnetcode )
{
new_pass_request = true;
netcode = altnetcode;
curr_track->SetNet(netcode);
curr_track->SetNetCode(netcode);
break;
}
}
@ -902,10 +902,10 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
{ // propagate this netcode to connected tracks having no netcode
for( unsigned kk = 0; kk < curr_track->m_TracksConnected.size(); kk++ )
{
int altnetcode = curr_track->m_TracksConnected[kk]->GetNet();
int altnetcode = curr_track->m_TracksConnected[kk]->GetNetCode();
if( altnetcode == 0 )
{
curr_track->m_TracksConnected[kk]->SetNet(netcode);
curr_track->m_TracksConnected[kk]->SetNetCode(netcode);
new_pass_request = true;
}
}
@ -926,10 +926,10 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
static bool SortTracksByNetCode( const TRACK* const & ref, const TRACK* const & compare )
{
// For items having the same Net, keep the order in list
if( ref->GetNet() == compare->GetNet())
if( ref->GetNetCode() == compare->GetNetCode())
return ref->m_Param < compare->m_Param;
return ref->GetNet() < compare->GetNet();
return ref->GetNetCode() < compare->GetNetCode();
}
/**

2
pcbnew/cross-probing.cpp
View File

@ -87,7 +87,7 @@ void PCB_EDIT_FRAME::ExecuteRemoteCommand( const char* cmdline )
if( pad )
{
netcode = pad->GetNet();
netcode = pad->GetNetCode();
// put cursor on the pad:
pos = pad->GetPosition();

10
pcbnew/deltrack.cpp
View File

@ -120,7 +120,7 @@ TRACK* PCB_EDIT_FRAME::Delete_Segment( wxDC* DC, TRACK* aTrack )
return NULL;
}
current_net_code = aTrack->GetNet();
current_net_code = aTrack->GetNetCode();
DLIST<TRACK>* container = (DLIST<TRACK>*)aTrack->GetList();
wxASSERT( container );
@ -142,7 +142,7 @@ void PCB_EDIT_FRAME::Delete_Track( wxDC* DC, TRACK* aTrack )
{
if( aTrack != NULL )
{
int current_net_code = aTrack->GetNet();
int current_net_code = aTrack->GetNetCode();
Remove_One_Track( DC, aTrack );
OnModify();
TestNetConnection( DC, current_net_code );
@ -160,7 +160,7 @@ void PCB_EDIT_FRAME::Delete_net( wxDC* DC, TRACK* aTrack )
PICKED_ITEMS_LIST itemsList;
ITEM_PICKER picker( NULL, UR_DELETED );
int net_code_delete = aTrack->GetNet();
int net_code_delete = aTrack->GetNetCode();
/* Search the first item for the given net code */
TRACK* trackList = GetBoard()->m_Track->GetStartNetCode( net_code_delete );
@ -171,7 +171,7 @@ void PCB_EDIT_FRAME::Delete_net( wxDC* DC, TRACK* aTrack )
for( TRACK* segm = trackList; segm; segm = next_track, ++ii )
{
next_track = segm->Next();
if( segm->GetNet() != net_code_delete )
if( segm->GetNetCode() != net_code_delete )
break;
GetBoard()->m_Track.Remove( segm );
@ -202,7 +202,7 @@ void PCB_EDIT_FRAME::Remove_One_Track( wxDC* DC, TRACK* pt_segm )
if( segments_to_delete_count == 0 )
return;
int net_code = pt_segm->GetNet();
int net_code = pt_segm->GetNetCode();
PICKED_ITEMS_LIST itemsList;
ITEM_PICKER picker( NULL, UR_DELETED );

10
pcbnew/dialogs/dialog_pad_properties.cpp
View File

@ -812,14 +812,14 @@ void DIALOG_PAD_PROPERTIES::PadPropertiesAccept( wxCommandEvent& event )
if( m_currentPad->GetNetname() != m_PadNetNameCtrl->GetValue() )
{
if( !m_PadNetNameCtrl->GetValue().IsEmpty() && m_padMaster.GetNet() == 0 )
if( !m_PadNetNameCtrl->GetValue().IsEmpty() && m_padMaster.GetNetCode() == 0 )
{
DisplayError( NULL, _( "Unknown netname, netname not changed" ) );
}
else
{
rastnestIsChanged = true;
m_currentPad->SetNet( m_padMaster.GetNet() );
m_currentPad->SetNetCode( m_padMaster.GetNetCode() );
}
}
@ -982,9 +982,9 @@ bool DIALOG_PAD_PROPERTIES::transferDataToPad( D_PAD* aPad )
// Check if user has set an existing net name
const NETINFO_ITEM* netinfo = m_board->FindNet( m_PadNetNameCtrl->GetValue() );
if( netinfo != NULL )
aPad->SetNet( netinfo->GetNet() );
aPad->SetNetCode( netinfo->GetNet() );
else
aPad->SetNet( 0 );
aPad->SetNetCode( NETINFO_LIST::UNCONNECTED );
// Clear some values, according to the pad type and shape
switch( aPad->GetShape() )
@ -1032,7 +1032,7 @@ bool DIALOG_PAD_PROPERTIES::transferDataToPad( D_PAD* aPad )
// no offset, no net name, no pad name allowed
aPad->SetOffset( wxPoint( 0, 0 ) );
aPad->SetPadName( wxEmptyString );
aPad->SetNet( 0 );
aPad->SetNetCode( NETINFO_LIST::UNCONNECTED );
break;
default:

2
pcbnew/dragsegm.cpp
View File

@ -342,7 +342,7 @@ void Collect_TrackSegmentsToDrag( BOARD* aPcb, const wxPoint& aRefPos, LAYER_MSK
for( ; track; track = track->Next() )
{
if( track->GetNet() != aNetCode ) // not the same netcodenet code: all candidates tested
if( track->GetNetCode() != aNetCode ) // not the same netcode: all candidates tested
break;
if( ( aLayerMask & track->GetLayerMask() ) == 0 )

4
pcbnew/drc.cpp
View File

@ -549,7 +549,7 @@ void DRC::testZones()
if( !test_area->IsOnCopperLayer() )
continue;
if( test_area->GetNet() < 0 )
if( test_area->GetNetCode() < 0 )
{
m_currentMarker = fillMarker( test_area,
DRCE_NON_EXISTANT_NET_FOR_ZONE_OUTLINE, m_currentMarker );
@ -756,7 +756,7 @@ bool DRC::doPadToPadsDrc( D_PAD* aRefPad, D_PAD** aStart, D_PAD** aEnd, int x_li
// The pad must be in a net (i.e pt_pad->GetNet() != 0 ),
// But no problem if pads have the same netcode (same net)
if( pad->GetNet() && ( aRefPad->GetNet() == pad->GetNet() ) )
if( pad->GetNetCode() && ( aRefPad->GetNetCode() == pad->GetNetCode() ) )
continue;
// if pads are from the same footprint

8
pcbnew/drc_clearance_test_functions.cpp
View File

@ -164,7 +164,7 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
m_segmAngle = 0;
layerMask = aRefSeg->GetLayerMask();
net_code_ref = aRefSeg->GetNet();
net_code_ref = aRefSeg->GetNetCode();
// Phase 0 : Test vias
if( aRefSeg->Type() == PCB_VIA_T )
@ -310,8 +310,8 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
// The pad must be in a net (i.e pt_pad->GetNet() != 0 )
// but no problem if the pad netcode is the current netcode (same net)
if( pad->GetNet() // the pad must be connected
&& net_code_ref == pad->GetNet() ) // the pad net is the same as current net -> Ok
if( pad->GetNetCode() // the pad must be connected
&& net_code_ref == pad->GetNetCode() ) // the pad net is the same as current net -> Ok
continue;
// DRC for the pad
@ -339,7 +339,7 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
for( track = aStart; track; track = track->Next() )
{
// No problem if segments have the same net code:
if( net_code_ref == track->GetNet() )
if( net_code_ref == track->GetNetCode() )
continue;
// No problem if segment are on different layers :

12
pcbnew/eagle_plugin.cpp
View File

@ -1493,7 +1493,7 @@ void EAGLE_PLUGIN::loadPlain( CPTREE& aGraphics )
zone->SetTimeStamp( timeStamp( gr->second ) );
zone->SetLayer( layer );
zone->SetNet( NETINFO_LIST::UNCONNECTED );
zone->SetNetCode( NETINFO_LIST::UNCONNECTED );
CPolyLine::HATCH_STYLE outline_hatch = CPolyLine::DIAGONAL_EDGE;
@ -1696,7 +1696,7 @@ void EAGLE_PLUGIN::loadElements( CPTREE& aElements )
if( ni != m_pads_to_nets.end() )
{
const ENET* enet = &ni->second;
pad->SetNet( enet->netcode );
pad->SetNetCode( enet->netcode );
}
}
@ -2387,7 +2387,7 @@ void EAGLE_PLUGIN::loadSignals( CPTREE& aSignals )
t->SetWidth( width );
t->SetLayer( layer );
t->SetNet( netCode );
t->SetNetCode( netCode );
m_board->m_Track.Insert( t, NULL );
}
@ -2452,7 +2452,7 @@ void EAGLE_PLUGIN::loadSignals( CPTREE& aSignals )
via->SetPosition( pos );
via->SetEnd( pos );
via->SetNet( netCode );
via->SetNetCode( netCode );
via->SetShape( S_CIRCLE ); // @todo should be in SEGVIA constructor
}
@ -2495,7 +2495,7 @@ void EAGLE_PLUGIN::loadSignals( CPTREE& aSignals )
zone->SetTimeStamp( timeStamp( it->second ) );
zone->SetLayer( layer );
zone->SetNet( netCode );
zone->SetNetCode( netCode );
CPolyLine::HATCH_STYLE outline_hatch = CPolyLine::DIAGONAL_EDGE;
@ -2551,7 +2551,7 @@ void EAGLE_PLUGIN::loadSignals( CPTREE& aSignals )
// KiCad does not support an unconnected zone with its own non-zero netcode,
// but only when assigned netcode = 0 w/o a name...
for( ZONES::iterator it = zones.begin(); it != zones.end(); ++it )
(*it)->SetNet( NETINFO_LIST::UNCONNECTED );
(*it)->SetNetCode( NETINFO_LIST::UNCONNECTED );
// therefore omit this signal/net.
}

18
pcbnew/edit.cpp
View File

@ -328,7 +328,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
if( type == PCB_TRACE_T || type == PCB_VIA_T )
{
BOARD_CONNECTED_ITEM*item = (BOARD_CONNECTED_ITEM*) GetCurItem();
DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS dlg( this, item->GetNet() );
DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS dlg( this, item->GetNetCode() );
dlg.ShowModal();
}
@ -468,11 +468,11 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
break;
case ID_POPUP_PCB_LOCK_ON_NET:
Attribut_net( &dc, ( (TRACK*) GetCurItem() )->GetNet(), true );
Attribut_net( &dc, ( (TRACK*) GetCurItem() )->GetNetCode(), true );
break;
case ID_POPUP_PCB_LOCK_OFF_NET:
Attribut_net( &dc, ( (TRACK*) GetCurItem() )->GetNet(), false );
Attribut_net( &dc, ( (TRACK*) GetCurItem() )->GetNetCode(), false );
break;
case ID_POPUP_PCB_SETFLAGS_TRACK_MNU:
@ -486,7 +486,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
{
SEGZONE* zsegm = (SEGZONE*) GetCurItem();
int netcode = zsegm->GetNet();
int netcode = zsegm->GetNetCode();
Delete_OldZone_Fill( zsegm );
SetCurItem( NULL );
TestNetConnection( NULL, netcode );
@ -523,7 +523,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
case ID_POPUP_PCB_DELETE_ZONE_CUTOUT:
m_canvas->MoveCursorToCrossHair();
{
int netcode = ( (ZONE_CONTAINER*) GetCurItem() )->GetNet();
int netcode = ( (ZONE_CONTAINER*) GetCurItem() )->GetNetCode();
Delete_Zone_Contour( &dc, (ZONE_CONTAINER*) GetCurItem() );
SetCurItem( NULL );
TestNetConnection( NULL, netcode );
@ -604,7 +604,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
{
ZONE_CONTAINER* zone_container = (ZONE_CONTAINER*) GetCurItem();
zone_container->UnFill();
TestNetConnection( NULL, zone_container->GetNet() );
TestNetConnection( NULL, zone_container->GetNetCode() );
OnModify();
SetMsgPanel( GetBoard() );
m_canvas->Refresh();
@ -633,7 +633,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
case ID_POPUP_PCB_FILL_ZONE:
m_canvas->MoveCursorToCrossHair();
Fill_Zone( (ZONE_CONTAINER*) GetCurItem() );
TestNetConnection( NULL, ( (ZONE_CONTAINER*) GetCurItem() )->GetNet() );
TestNetConnection( NULL, ( (ZONE_CONTAINER*) GetCurItem() )->GetNetCode() );
SetMsgPanel( GetBoard() );
m_canvas->Refresh();
break;
@ -1156,7 +1156,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
newtrack->Draw( m_canvas, &dc, GR_XOR );
// compute the new ratsnest, because connectivity could change
TestNetConnection( &dc, track->GetNet() );
TestNetConnection( &dc, track->GetNetCode() );
}
break;
@ -1248,7 +1248,7 @@ void PCB_EDIT_FRAME::RemoveStruct( BOARD_ITEM* Item, wxDC* DC )
case PCB_ZONE_AREA_T:
{
SetCurItem( NULL );
int netcode = ( (ZONE_CONTAINER*) Item )->GetNet();
int netcode = ( (ZONE_CONTAINER*) Item )->GetNetCode();
Delete_Zone_Contour( DC, (ZONE_CONTAINER*) Item );
TestNetConnection( NULL, netcode );
SetMsgPanel( GetBoard() );

4
pcbnew/edit_track_width.cpp
View File

@ -36,7 +36,7 @@ bool PCB_EDIT_FRAME::SetTrackSegmentWidth( TRACK* aTrackItem,
NETINFO_ITEM* net = NULL;
if( aUseNetclassValue )
net = GetBoard()->FindNet( aTrackItem->GetNet() );
net = aTrackItem->GetNet();
initial_width = aTrackItem->GetWidth();
@ -224,7 +224,7 @@ bool PCB_EDIT_FRAME::Change_Net_Tracks_And_Vias_Sizes( int aNetcode, bool aUseNe
for( pt_segm = GetBoard()->m_Track; pt_segm != NULL; pt_segm = pt_segm->Next() )
{
if( aNetcode != pt_segm->GetNet() ) // not in net
if( aNetcode != pt_segm->GetNetCode() ) // not in net
continue;
// we have found a item member of the net

6
pcbnew/editrack-part2.cpp
View File

@ -99,7 +99,7 @@ bool PCB_EDIT_FRAME::Other_Layer_Route( TRACK* aTrack, wxDC* DC )
via->SetFlags( IS_NEW );
via->SetShape( GetDesignSettings().m_CurrentViaType );
via->SetWidth( GetBoard()->GetCurrentViaSize());
via->SetNet( GetBoard()->GetHighLightNetCode() );
via->SetNetCode( GetBoard()->GetHighLightNetCode() );
via->SetEnd( g_CurrentTrackSegment->GetEnd() );
via->SetStart( g_CurrentTrackSegment->GetEnd() );
@ -139,7 +139,7 @@ bool PCB_EDIT_FRAME::Other_Layer_Route( TRACK* aTrack, wxDC* DC )
// else error: will be removed later
via->SetLayerPair( first_layer, last_layer );
{
NETINFO_ITEM* net = GetBoard()->FindNet( via->GetNet() );
NETINFO_ITEM* net = via->GetNet();
via->SetWidth( net->GetMicroViaSize() );
}
}
@ -244,7 +244,7 @@ void PCB_EDIT_FRAME::Show_1_Ratsnest( EDA_ITEM* item, wxDC* DC )
{
RATSNEST_ITEM* net = &GetBoard()->m_FullRatsnest[ii];
if( net->GetNet() == pt_pad->GetNet() )
if( net->GetNet() == pt_pad->GetNetCode() )
{
if( ( net->m_Status & CH_VISIBLE ) != 0 )
continue;

16
pcbnew/editrack.cpp
View File

@ -133,12 +133,12 @@ TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC )
// A pad is found: put the starting point on pad center
pos = pad->GetPosition();
GetBoard()->SetHighLightNet( pad->GetNet() );
GetBoard()->SetHighLightNet( pad->GetNetCode() );
}
else // A track segment is found
{
TrackOnStartPoint = (TRACK*) LockPoint;
GetBoard()->SetHighLightNet( TrackOnStartPoint->GetNet() );
GetBoard()->SetHighLightNet( TrackOnStartPoint->GetNetCode() );
GetBoard()->CreateLockPoint( pos, TrackOnStartPoint, &s_ItemsListPicker );
}
}
@ -153,7 +153,7 @@ TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC )
-1 );
if( zone )
GetBoard()->SetHighLightNet( zone->GetNet() );
GetBoard()->SetHighLightNet( zone->GetNetCode() );
}
DBG( g_CurrentTrackList.VerifyListIntegrity() );
@ -166,7 +166,7 @@ TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC )
GetBoard()->DrawHighLight( m_canvas, aDC, GetBoard()->GetHighLightNetCode() );
// Display info about track Net class, and init track and vias sizes:
g_CurrentTrackSegment->SetNet( GetBoard()->GetHighLightNetCode() );
g_CurrentTrackSegment->SetNetCode( GetBoard()->GetHighLightNetCode() );
GetBoard()->SetCurrentNetClass( g_CurrentTrackSegment->GetNetClassName() );
g_CurrentTrackSegment->SetLayer( GetScreen()->m_Active_Layer );
@ -476,7 +476,7 @@ bool PCB_EDIT_FRAME::End_Route( TRACK* aTrack, wxDC* aDC )
// g_FirstTrackSegment can be NULL on a double click on the starting point
if( g_FirstTrackSegment != NULL )
{
int netcode = g_FirstTrackSegment->GetNet();
int netcode = g_FirstTrackSegment->GetNetCode();
TRACK* firstTrack = g_FirstTrackSegment;
int newCount = g_CurrentTrackList.GetCount();
@ -540,7 +540,7 @@ bool PCB_EDIT_FRAME::End_Route( TRACK* aTrack, wxDC* aDC )
TRACK* LocateIntrusion( TRACK* listStart, TRACK* aTrack, LAYER_NUM aLayer, const wxPoint& aRef )
{
int net = aTrack->GetNet();
int net = aTrack->GetNetCode();
int width = aTrack->GetWidth();
TRACK* found = NULL;
@ -555,7 +555,7 @@ TRACK* LocateIntrusion( TRACK* listStart, TRACK* aTrack, LAYER_NUM aLayer, const
if( aLayer != track->GetLayer() )
continue;
if( track->GetNet() == net )
if( track->GetNetCode() == net )
continue;
// TRACK::HitTest
@ -614,7 +614,7 @@ static void PushTrack( EDA_DRAW_PANEL* panel )
if( !other )
return;
if( other->GetNet() == track->GetNet() )
if( other->GetNetCode() == track->GetNetCode() )
return;
cv = cursor - other->GetStart();

2
pcbnew/exporters/export_d356.cpp
View File

@ -199,7 +199,7 @@ static void build_via_testpoints( BOARD *aPcb,
if( track->Type() == PCB_VIA_T )
{
SEGVIA *via = (SEGVIA*) track;
NETINFO_ITEM *net = aPcb->FindNet( track->GetNet() );
NETINFO_ITEM *net = track->GetNet();
D356_RECORD rk;
rk.smd = false;

10
pcbnew/exporters/export_gencad.cpp
View File

@ -663,7 +663,7 @@ static void CreateSignalsSection( FILE* aFile, BOARD* aPcb )
{
wxString padname;
if( pad->GetNet() != net->GetNet() )
if( pad->GetNetCode() != net->GetNet() )
continue;
pad->ReturnStringPadName( padname );
@ -730,7 +730,7 @@ static int TrackListSortByNetcode( const void* refptr, const void* objptr )
ref = *( (TRACK**) refptr );
cmp = *( (TRACK**) objptr );
if( ( diff = ref->GetNet() - cmp->GetNet() ) )
if( ( diff = ref->GetNetCode() - cmp->GetNetCode() ) )
return diff;
if( ( diff = ref->GetWidth() - cmp->GetWidth() ) )
@ -797,10 +797,10 @@ static void CreateRoutesSection( FILE* aFile, BOARD* aPcb )
{
track = tracklist[ii];
if( old_netcode != track->GetNet() )
if( old_netcode != track->GetNetCode() )
{
old_netcode = track->GetNet();
NETINFO_ITEM* net = aPcb->FindNet( track->GetNet() );
old_netcode = track->GetNetCode();
NETINFO_ITEM* net = track->GetNet();
wxString netname;
if( net && (net->GetNetname() != wxEmptyString) )

6
pcbnew/highlight.cpp
View File

@ -142,7 +142,7 @@ int PCB_EDIT_FRAME::SelectHighLight( wxDC* DC )
switch( item->Type() )
{
case PCB_PAD_T:
netcode = ( (D_PAD*) item )->GetNet();
netcode = ( (D_PAD*) item )->GetNetCode();
SendMessageToEESCHEMA( item );
break;
@ -151,11 +151,11 @@ int PCB_EDIT_FRAME::SelectHighLight( wxDC* DC )
case PCB_ZONE_T:
// since these classes are all derived from TRACK, use a common
// GetNet() function:
netcode = ( (TRACK*) item )->GetNet();
netcode = ( (TRACK*) item )->GetNetCode();
break;
case PCB_ZONE_AREA_T:
netcode = ( (ZONE_CONTAINER*) item )->GetNet();
netcode = ( (ZONE_CONTAINER*) item )->GetNetCode();
break;
default:

8
pcbnew/kicad_plugin.cpp
View File

@ -1230,8 +1230,8 @@ void PCB_IO::format( D_PAD* aPad, int aNestLevel ) const
std::string output;
// Unconnected pad is default net so don't save it.
if( !(m_ctl & CTL_OMIT_NETS) && aPad->GetNet() != 0 )
StrPrintf( &output, " (net %d %s)", m_mapping->Translate( aPad->GetNet() ),
if( !(m_ctl & CTL_OMIT_NETS) && aPad->GetNetCode() != 0 )
StrPrintf( &output, " (net %d %s)", m_mapping->Translate( aPad->GetNetCode() ),
m_out->Quotew( aPad->GetNetname() ).c_str() );
if( aPad->GetPadToDieLength() != 0 )
@ -1389,7 +1389,7 @@ void PCB_IO::format( TRACK* aTrack, int aNestLevel ) const
m_out->Print( 0, " (layer %s)", m_out->Quotew( aTrack->GetLayerName() ).c_str() );
}
m_out->Print( 0, " (net %d)", m_mapping->Translate( aTrack->GetNet() ) );
m_out->Print( 0, " (net %d)", m_mapping->Translate( aTrack->GetNetCode() ) );
if( aTrack->GetTimeStamp() != 0 )
m_out->Print( 0, " (tstamp %lX)", aTrack->GetTimeStamp() );
@ -1408,7 +1408,7 @@ void PCB_IO::format( ZONE_CONTAINER* aZone, int aNestLevel ) const
// so be sure a dummy value is stored, just for ZONE_CONTAINER compatibility
// (perhaps netcode and netname should be not stored)
m_out->Print( aNestLevel, "(zone (net %d) (net_name %s)",
aZone->GetIsKeepout() ? 0 : m_mapping->Translate( aZone->GetNet() ),
aZone->GetIsKeepout() ? 0 : m_mapping->Translate( aZone->GetNetCode() ),
m_out->Quotew( aZone->GetIsKeepout() ? wxT("") : aZone->GetNetname() ).c_str() );
formatLayer( aZone );

16
pcbnew/legacy_plugin.cpp
View File

@ -1299,7 +1299,7 @@ void LEGACY_PLUGIN::loadPAD( MODULE* aModule )
char buf[1024]; // can be fairly long
int netcode = intParse( line + SZ( "Ne" ), &data );
pad->SetNet( netcode );
pad->SetNetCode( netcode );
// read Netname
ReadDelimitedText( buf, data, sizeof(buf) );
@ -2090,7 +2090,7 @@ void LEGACY_PLUGIN::loadTrackList( int aStructType )
( (SEGVIA*) newTrack )->SetLayerPair( LAYER_N_FRONT, LAYER_N_BACK );
}
newTrack->SetNet( net_code );
newTrack->SetNetCode( net_code );
newTrack->SetState( flags, true );
}
@ -2240,7 +2240,7 @@ void LEGACY_PLUGIN::loadZONE_CONTAINER()
// Init the net code only, not the netname, to be sure
// the zone net name is the name read in file.
// (When mismatch, the user will be prompted in DRC, to fix the actual name)
zc->BOARD_CONNECTED_ITEM::SetNet( netcode );
zc->BOARD_CONNECTED_ITEM::SetNetCode( netcode );
}
else if( TESTLINE( "ZLayer" ) ) // layer found
@ -2424,7 +2424,7 @@ void LEGACY_PLUGIN::loadZONE_CONTAINER()
// Ensure keepout does not have a net
// (which have no sense for a keepout zone)
if( zc->GetIsKeepout() )
zc->SetNet( NETINFO_LIST::UNCONNECTED );
zc->SetNetCode( NETINFO_LIST::UNCONNECTED );
// should always occur, but who knows, a zone without two corners
// is no zone at all, it's a spot?
@ -2434,7 +2434,7 @@ void LEGACY_PLUGIN::loadZONE_CONTAINER()
if( !zc->IsOnCopperLayer() )
{
zc->SetFillMode( 0 );
zc->SetNet( NETINFO_LIST::UNCONNECTED );
zc->SetNetCode( NETINFO_LIST::UNCONNECTED );
}
// Hatch here, after outlines corners are read
@ -3373,7 +3373,7 @@ void LEGACY_PLUGIN::savePAD( const D_PAD* me ) const
fprintf( m_fp, "At %s N %08X\n", texttype, me->GetLayerMask() );
fprintf( m_fp, "Ne %d %s\n", me->GetNet(), EscapedUTF8( me->GetNetname() ).c_str() );
fprintf( m_fp, "Ne %d %s\n", me->GetNetCode(), EscapedUTF8( me->GetNetname() ).c_str() );
fprintf( m_fp, "Po %s\n", fmtBIUPoint( me->GetPos0() ).c_str() );
@ -3633,7 +3633,7 @@ void LEGACY_PLUGIN::saveTRACK( const TRACK* me ) const
"-1" : fmtBIU( me->GetDrill() ).c_str() );
fprintf(m_fp, "De %d %d %d %lX %X\n",
me->GetLayer(), type, me->GetNet(),
me->GetLayer(), type, me->GetNetCode(),
me->GetTimeStamp(), me->GetStatus() );
}
@ -3647,7 +3647,7 @@ void LEGACY_PLUGIN::saveZONE_CONTAINER( const ZONE_CONTAINER* me ) const
// just for ZONE_CONTAINER compatibility
fprintf( m_fp, "ZInfo %lX %d %s\n",
me->GetTimeStamp(),
me->GetIsKeepout() ? 0 : me->GetNet(),
me->GetIsKeepout() ? 0 : me->GetNetCode(),
EscapedUTF8( me->GetIsKeepout() ? wxT("") : me->GetNetname() ).c_str() );
// Save the outline layer info

6
pcbnew/magnetic_tracks_functions.cpp
View File

@ -161,7 +161,7 @@ bool Magnetize( PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize aGridSize,
if( pad )
{
if( doCheckNet && currTrack && currTrack->GetNet() != pad->GetNet() )
if( doCheckNet && currTrack && currTrack->GetNetCode() != pad->GetNetCode() )
return false;
*curpos = pad->GetPosition();
@ -180,7 +180,7 @@ bool Magnetize( PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize aGridSize,
{
if( via != currTrack ) // a via cannot influence itself
{
if( !doCheckNet || !currTrack || currTrack->GetNet() == via->GetNet() )
if( !doCheckNet || !currTrack || currTrack->GetNetCode() == via->GetNetCode() )
{
*curpos = via->GetStart();
// D(printf("via hit\n");)
@ -223,7 +223,7 @@ bool Magnetize( PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize aGridSize,
if( track->Type() != PCB_TRACE_T )
continue;
if( doCheckNet && currTrack && currTrack->GetNet() != track->GetNet() )
if( doCheckNet && currTrack && currTrack->GetNetCode() != track->GetNetCode() )
continue;
if( m_Pcb->IsLayerVisible( track->GetLayer() ) == false )

14
pcbnew/move_or_drag_track.cpp
View File

@ -627,7 +627,7 @@ void PCB_EDIT_FRAME::StartMoveOneNodeOrSegment( TRACK* aTrack, wxDC* aDC, int aC
{
Collect_TrackSegmentsToDrag( GetBoard(), aTrack->GetStart(),
aTrack->GetLayerMask(),
aTrack->GetNet(), aTrack->GetWidth() / 2 );
aTrack->GetNetCode(), aTrack->GetWidth() / 2 );
}
PosInit = aTrack->GetStart();
@ -647,17 +647,17 @@ void PCB_EDIT_FRAME::StartMoveOneNodeOrSegment( TRACK* aTrack, wxDC* aDC, int aC
case ID_POPUP_PCB_DRAG_TRACK_SEGMENT: // drag a segment
pos = aTrack->GetStart();
Collect_TrackSegmentsToDrag( GetBoard(), pos, aTrack->GetLayerMask(),
aTrack->GetNet(), aTrack->GetWidth() / 2 );
aTrack->GetNetCode(), aTrack->GetWidth() / 2 );
pos = aTrack->GetEnd();
aTrack->SetFlags( IS_DRAGGED | ENDPOINT | STARTPOINT );
Collect_TrackSegmentsToDrag( GetBoard(), pos, aTrack->GetLayerMask(),
aTrack->GetNet(), aTrack->GetWidth() / 2 );
aTrack->GetNetCode(), aTrack->GetWidth() / 2 );
break;
case ID_POPUP_PCB_MOVE_TRACK_NODE: // Drag via or move node
pos = (diag & STARTPOINT) ? aTrack->GetStart() : aTrack->GetEnd();
Collect_TrackSegmentsToDrag( GetBoard(), pos, aTrack->GetLayerMask(),
aTrack->GetNet(), aTrack->GetWidth() / 2 );
aTrack->GetNetCode(), aTrack->GetWidth() / 2 );
PosInit = pos;
break;
}
@ -684,7 +684,7 @@ void PCB_EDIT_FRAME::StartMoveOneNodeOrSegment( TRACK* aTrack, wxDC* aDC, int aC
s_LastPos = PosInit;
m_canvas->SetMouseCapture( Show_MoveNode, Abort_MoveTrack );
GetBoard()->SetHighLightNet( aTrack->GetNet() );
GetBoard()->SetHighLightNet( aTrack->GetNetCode() );
GetBoard()->HighLightON();
GetBoard()->DrawHighLight( m_canvas, aDC, GetBoard()->GetHighLightNetCode() );
@ -792,7 +792,7 @@ void PCB_EDIT_FRAME::Start_DragTrackSegmentAndKeepSlope( TRACK* track, wxDC* DC
s_LastPos = GetCrossHairPosition();
m_canvas->SetMouseCapture( Show_Drag_Track_Segment_With_Cte_Slope, Abort_MoveTrack );
GetBoard()->SetHighLightNet( track->GetNet() );
GetBoard()->SetHighLightNet( track->GetNetCode() );
GetBoard()->HighLightON();
GetBoard()->DrawHighLight( m_canvas, DC, GetBoard()->GetHighLightNetCode() );
@ -828,7 +828,7 @@ bool PCB_EDIT_FRAME::PlaceDraggedOrMovedTrackSegment( TRACK* Track, wxDC* DC )
if( Track == NULL )
return false;
int current_net_code = Track->GetNet();
int current_net_code = Track->GetNetCode();
// DRC control:
if( g_Drc_On )

2
pcbnew/pad_edition_functions.cpp
View File

@ -161,7 +161,7 @@ void PCB_BASE_FRAME::AddPad( MODULE* aModule, bool draw )
// Update the pad properties.
Import_Pad_Settings( pad, false );
pad->SetNet( NETINFO_LIST::UNCONNECTED );
pad->SetNetCode( NETINFO_LIST::UNCONNECTED );
pad->SetPosition( GetCrossHairPosition() );

2
pcbnew/pcad2kicadpcb_plugin/pcb_line.cpp
View File

@ -147,7 +147,7 @@ void PCB_LINE::AddToBoard()
track->SetWidth( m_width );
track->SetLayer( m_KiCadLayer );
track->SetNet( m_netCode );
track->SetNetCode( m_netCode );
}
else
{

4
pcbnew/pcad2kicadpcb_plugin/pcb_pad.cpp
View File

@ -282,7 +282,7 @@ void PCB_PAD::AddToModule( MODULE* aModule, int aRotation, bool aEncapsulatedPad
m_board->AppendNet( netinfo );
}
pad->SetNet( netinfo->GetNet() );
pad->SetNetCode( netinfo->GetNet() );
}
if( !aEncapsulatedPad )
@ -343,7 +343,7 @@ void PCB_PAD::AddToBoard()
via->SetDrill( m_hole );
via->SetLayer( m_KiCadLayer );
via->SetNet( m_netCode );
via->SetNetCode( m_netCode );
}
}
else // pad

2
pcbnew/pcad2kicadpcb_plugin/pcb_polygon.cpp
View File

@ -171,7 +171,7 @@ void PCB_POLYGON::AddToBoard()
zone->SetTimeStamp( m_timestamp );
zone->SetLayer( m_KiCadLayer );
zone->SetNet( m_netCode );
zone->SetNetCode( m_netCode );
// add outline
int outline_hatch = CPolyLine::DIAGONAL_EDGE;

6
pcbnew/pcb_painter.cpp
View File

@ -152,7 +152,7 @@ const COLOR4D& PCB_RENDER_SETTINGS::GetColor( const VIEW_ITEM* aItem, int aLayer
// Try to obtain the netcode for the item
const BOARD_CONNECTED_ITEM* item = dynamic_cast<const BOARD_CONNECTED_ITEM*>( aItem );
if( item )
netCode = item->GetNet();
netCode = item->GetNetCode();
}
// Return grayish color for non-highlighted layers in the high contrast mode
@ -265,7 +265,7 @@ void PCB_PAINTER::draw( const TRACK* aTrack, int aLayer )
if( m_pcbSettings->m_netNamesOnTracks && IsNetnameLayer( aLayer ) )
{
int netCode = aTrack->GetNet();
int netCode = aTrack->GetNetCode();
// If there is a net name - display it on the track
if( netCode > 0 )
@ -277,7 +277,7 @@ void PCB_PAINTER::draw( const TRACK* aTrack, int aLayer )
if( length < 10 * width )
return;
NETINFO_ITEM* net = ( (BOARD*) aTrack->GetParent() )->FindNet( netCode );
NETINFO_ITEM* net = aTrack->GetNet();
if( !net )
return;

18
pcbnew/pcb_parser.cpp
View File

@ -2190,9 +2190,9 @@ D_PAD* PCB_PARSER::parseD_PAD( MODULE* aParent ) throw( IO_ERROR, PARSE_ERROR )
break;
case T_net:
pad->SetNet( parseInt( "net number" ) );
pad->SetNetCode( parseInt( "net number" ) );
NeedSYMBOLorNUMBER();
assert( FromUTF8() == m_board->FindNet( pad->GetNet() )->GetNetname() );
assert( FromUTF8() == m_board->FindNet( pad->GetNetCode() )->GetNetname() );
NeedRIGHT();
break;
@ -2288,7 +2288,7 @@ TRACK* PCB_PARSER::parseTRACK() throw( IO_ERROR, PARSE_ERROR )
break;
case T_net:
track->SetNet( parseInt( "net number" ) );
track->SetNetCode( parseInt( "net number" ) );
break;
case T_tstamp:
@ -2366,7 +2366,7 @@ SEGVIA* PCB_PARSER::parseSEGVIA() throw( IO_ERROR, PARSE_ERROR )
break;
case T_net:
via->SetNet( parseInt( "net number" ) );
via->SetNetCode( parseInt( "net number" ) );
NeedRIGHT();
break;
@ -2418,18 +2418,18 @@ ZONE_CONTAINER* PCB_PARSER::parseZONE_CONTAINER() throw( IO_ERROR, PARSE_ERROR )
// Init the net code only, not the netname, to be sure
// the zone net name is the name read in file.
// (When mismatch, the user will be prompted in DRC, to fix the actual name)
zone->SetNet( parseInt( "net number" ) );
zone->SetNetCode( parseInt( "net number" ) );
NeedRIGHT();
break;
case T_net_name:
NeedSYMBOLorNUMBER();
if( m_board->FindNet( zone->GetNet() )->GetNetname() != FromUTF8() )
if( zone->GetNet()->GetNetname() != FromUTF8() )
{
wxString msg = _( "There is a zone that belongs to a not "
"existing net (" ) + FromUTF8() + _("), you should verify it." );
DisplayError( NULL, msg );
zone->SetNet( NETINFO_LIST::UNCONNECTED );
zone->SetNetCode( NETINFO_LIST::UNCONNECTED );
}
NeedRIGHT();
break;
@ -2694,7 +2694,7 @@ ZONE_CONTAINER* PCB_PARSER::parseZONE_CONTAINER() throw( IO_ERROR, PARSE_ERROR )
if( !zone->IsOnCopperLayer() )
{
zone->SetFillMode( 0 );
zone->SetNet( NETINFO_LIST::UNCONNECTED );
zone->SetNetCode( NETINFO_LIST::UNCONNECTED );
}
// Set hatch here, after outlines corners are read
@ -2706,7 +2706,7 @@ ZONE_CONTAINER* PCB_PARSER::parseZONE_CONTAINER() throw( IO_ERROR, PARSE_ERROR )
// Ensure keepout does not have a net (which have no sense for a keepout zone)
if( zone->GetIsKeepout() )
zone->SetNet( NETINFO_LIST::UNCONNECTED );
zone->SetNetCode( NETINFO_LIST::UNCONNECTED );
return zone.release();
}

34
pcbnew/ratsnest.cpp
View File

@ -74,7 +74,7 @@ void MIN_SPAN_TREE_PADS::AddTreeToRatsnest( std::vector<RATSNEST_ITEM> &aRatsnes
if( padsBuffer.empty() )
return;
int netcode = padsBuffer[0]->GetNet();
int netcode = padsBuffer[0]->GetNetCode();
// Note: to get edges in minimum spanning tree,
// the index value 0 is not used: it is just
// the entry point of the minimum spanning tree.
@ -182,7 +182,7 @@ void PCB_BASE_FRAME::Compile_Ratsnest( wxDC* aDC, bool aDisplayStatus )
*/
static bool sortByNetcode( const D_PAD* const & ref, const D_PAD* const & item )
{
return ref->GetNet() < item->GetNet();
return ref->GetNetCode() < item->GetNetCode();
}
@ -540,7 +540,7 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
// collect active pads of the module:
for( pad_ref = aModule->Pads(); pad_ref != NULL; pad_ref = pad_ref->Next() )
{
if( pad_ref->GetNet() == NETINFO_LIST::UNCONNECTED )
if( pad_ref->GetNetCode() == NETINFO_LIST::UNCONNECTED )
continue;
localPadList.push_back( pad_ref );
@ -562,11 +562,11 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
{
pad_ref = localPadList[ii];
if( pad_ref->GetNet() == current_net_code )
if( pad_ref->GetNetCode() == current_net_code )
continue;
// A new net was found, load all pads of others modules members of this net:
NETINFO_ITEM* net = m_Pcb->FindNet( pad_ref->GetNet() );
NETINFO_ITEM* net = pad_ref->GetNet();
if( net == NULL ) //Should not occur
{
@ -597,7 +597,7 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
* footprint pads it is therefore not time consuming, and it is made only
* once
*/
current_net_code = localPadList[0]->GetNet();
current_net_code = localPadList[0]->GetNetCode();
MIN_SPAN_TREE_PADS min_spanning_tree;
std::vector<D_PAD*> padsBuffer; // contains pads of only one net
@ -611,7 +611,7 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
if( jj >= pads_module_count )
break;
if( localPadList[jj]->GetNet() != current_net_code )
if( localPadList[jj]->GetNetCode() != current_net_code )
break;
}
@ -623,7 +623,7 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
padsBuffer.clear();
ii = jj;
if( ii < localPadList.size() )
current_net_code = localPadList[ii]->GetNet();
current_net_code = localPadList[ii]->GetNetCode();
}
internalRatsCount = m_Pcb->m_LocalRatsnest.size();
@ -655,13 +655,13 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
m_Pcb->m_LocalRatsnest.erase( m_Pcb->m_LocalRatsnest.begin() + internalRatsCount,
m_Pcb->m_LocalRatsnest.end() );
current_net_code = localPadList[0]->GetNet();
current_net_code = localPadList[0]->GetNetCode();
for( unsigned ii = 0; ii < pads_module_count; ii++ )
{
pad_ref = localPadList[ii];
if( pad_ref->GetNet() != current_net_code )
if( pad_ref->GetNetCode() != current_net_code )
{
// if needed, creates a new ratsnest for the old net
if( addRats )
@ -670,7 +670,7 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
}
addRats = false;
current_net_code = pad_ref->GetNet();
current_net_code = pad_ref->GetNetCode();
local_rats.m_Lenght = INT_MAX;
}
@ -682,10 +682,10 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
pad_externe = localPadList[jj];
// we search pads having the same net code
if( pad_externe->GetNet() < pad_ref->GetNet() )
if( pad_externe->GetNetCode() < pad_ref->GetNetCode() )
continue;
if( pad_externe->GetNet() > pad_ref->GetNet() ) // pads are sorted by net code
if( pad_externe->GetNetCode() > pad_ref->GetNetCode() ) // pads are sorted by net code
break;
distance = abs( pad_externe->GetPosition().x - pad_pos.x ) +
@ -695,7 +695,7 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
{
local_rats.m_PadStart = pad_ref;
local_rats.m_PadEnd = pad_externe;
local_rats.SetNet( pad_ref->GetNet() );
local_rats.SetNet( pad_ref->GetNetCode() );
local_rats.m_Lenght = distance;
local_rats.m_Status = 0;
@ -813,7 +813,7 @@ void PCB_BASE_FRAME::BuildAirWiresTargetsList( BOARD_CONNECTED_ITEM* aItemRef,
if( aItemRef == NULL )
return;
int net_code = aItemRef->GetNet();
int net_code = aItemRef->GetNetCode();
int subnet = aItemRef->GetSubNet();
if( net_code <= 0 )
@ -844,9 +844,9 @@ void PCB_BASE_FRAME::BuildAirWiresTargetsList( BOARD_CONNECTED_ITEM* aItemRef,
// current track:
for( TRACK* track = m_Pcb->m_Track; track; track = track->Next() )
{
if( track->GetNet() < net_code )
if( track->GetNetCode() < net_code )
continue;
if( track->GetNet() > net_code )
if( track->GetNetCode() > net_code )
break;;
if( !track->GetSubNet() || (track->GetSubNet() != subnet) )

20
pcbnew/ratsnest_data.cpp
View File

@ -709,7 +709,7 @@ void RN_DATA::AddSimple( const BOARD_ITEM* aItem )
if( aItem->IsConnected() )
{
const BOARD_CONNECTED_ITEM* item = static_cast<const BOARD_CONNECTED_ITEM*>( aItem );
net = item->GetNet();
net = item->GetNetCode();
if( net < 1 ) // do not process unconnected items
return;
@ -739,7 +739,7 @@ void RN_DATA::AddBlocked( const BOARD_ITEM* aItem )
if( aItem->IsConnected() )
{
const BOARD_CONNECTED_ITEM* item = static_cast<const BOARD_CONNECTED_ITEM*>( aItem );
net = item->GetNet();
net = item->GetNetCode();
if( net < 1 ) // do not process unconnected items
return;
@ -825,7 +825,7 @@ void RN_DATA::Add( const BOARD_ITEM* aItem )
if( aItem->IsConnected() )
{
net = static_cast<const BOARD_CONNECTED_ITEM*>( aItem )->GetNet();
net = static_cast<const BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode();
if( net < 1 ) // do not process unconnected items
return;
@ -838,7 +838,7 @@ void RN_DATA::Add( const BOARD_ITEM* aItem )
const MODULE* module = static_cast<const MODULE*>( aItem );
for( const D_PAD* pad = module->Pads().GetFirst(); pad; pad = pad->Next() )
{
net = pad->GetNet();
net = pad->GetNetCode();
if( net < 1 ) // do not process unconnected items
continue;
@ -884,7 +884,7 @@ void RN_DATA::Remove( const BOARD_ITEM* aItem )
if( aItem->IsConnected() )
{
net = static_cast<const BOARD_CONNECTED_ITEM*>( aItem )->GetNet();
net = static_cast<const BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode();
if( net < 1 ) // do not process unconnected items
return;
}
@ -893,7 +893,7 @@ void RN_DATA::Remove( const BOARD_ITEM* aItem )
const MODULE* module = static_cast<const MODULE*>( aItem );
for( const D_PAD* pad = module->Pads().GetFirst(); pad; pad = pad->Next() )
{
net = pad->GetNet();
net = pad->GetNetCode();
if( net < 1 ) // do not process unconnected items
continue;
@ -945,21 +945,21 @@ void RN_DATA::ProcessBoard()
for( MODULE* module = m_board->m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads().GetFirst(); pad; pad = pad->Next() )
m_nets[pad->GetNet()].AddItem( pad );
m_nets[pad->GetNetCode()].AddItem( pad );
}
for( TRACK* track = m_board->m_Track; track; track = track->Next() )
{
if( track->Type() == PCB_VIA_T )
m_nets[track->GetNet()].AddItem( static_cast<SEGVIA*>( track ) );
m_nets[track->GetNetCode()].AddItem( static_cast<SEGVIA*>( track ) );
else if( track->Type() == PCB_TRACE_T )
m_nets[track->GetNet()].AddItem( track );
m_nets[track->GetNetCode()].AddItem( track );
}
for( int i = 0; i < m_board->GetAreaCount(); ++i )
{
ZONE_CONTAINER* zone = m_board->GetArea( i );
m_nets[zone->GetNet()].AddItem( zone );
m_nets[zone->GetNetCode()].AddItem( zone );
}
}

10
pcbnew/router/pns_router.cpp
View File

@ -129,7 +129,7 @@ PNS_ITEM* PNS_ROUTER::syncPad( D_PAD* aPad )
PNS_SOLID* solid = new PNS_SOLID;
solid->SetLayers( layers );
solid->SetNet( aPad->GetNet() );
solid->SetNet( aPad->GetNetCode() );
wxPoint wx_c = aPad->GetPosition();
wxSize wx_sz = aPad->GetSize();
@ -180,7 +180,7 @@ PNS_ITEM* PNS_ROUTER::syncPad( D_PAD* aPad )
PNS_ITEM* PNS_ROUTER::syncTrack( TRACK* aTrack )
{
PNS_SEGMENT* s =
new PNS_SEGMENT( SEG( aTrack->GetStart(), aTrack->GetEnd() ), aTrack->GetNet() );
new PNS_SEGMENT( SEG( aTrack->GetStart(), aTrack->GetEnd() ), aTrack->GetNetCode() );
s->SetWidth( aTrack->GetWidth() );
s->SetLayers( PNS_LAYERSET( aTrack->GetLayer() ) );
@ -195,7 +195,7 @@ PNS_ITEM* PNS_ROUTER::syncVia( SEGVIA* aVia )
aVia->GetPosition(),
PNS_LAYERSET( 0, 15 ),
aVia->GetWidth(),
aVia->GetNet() );
aVia->GetNetCode() );
v->SetParent( aVia );
return v;
@ -607,7 +607,7 @@ void PNS_ROUTER::commitRouting( PNS_NODE* aNode )
track->SetEnd( wxPoint( s.B.x, s.B.y ) );
track->SetWidth( seg->GetWidth() );
track->SetLayer( seg->GetLayers().Start() );
track->SetNet( seg->GetNet() );
track->SetNetCode( seg->GetNet() );
newBI = track;
break;
}
@ -618,7 +618,7 @@ void PNS_ROUTER::commitRouting( PNS_NODE* aNode )
PNS_VIA* via = static_cast<PNS_VIA*>( item );
via_board->SetPosition( wxPoint( via->GetPos().x, via->GetPos().y ) );
via_board->SetWidth( via->GetDiameter() );
via_board->SetNet( via->GetNet() );
via_board->SetNetCode( via->GetNet() );
newBI = via_board;
break;
}

6
pcbnew/specctra_export.cpp
View File

@ -692,7 +692,7 @@ IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, MODULE* aModule )
pin->pin_id += buf; // append "@1" or "@2", etc. to pin name
}
pin->kiNetCode = pad->GetNet();
pin->kiNetCode = pad->GetNetCode();
image->pins.push_back( pin );
@ -1922,7 +1922,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
{
TRACK* track = (TRACK*) items[i];
int netcode = track->GetNet();
int netcode = track->GetNetCode();
if( netcode == 0 )
continue;
@ -1981,7 +1981,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
SEGVIA* via = (SEGVIA*) items[i];
wxASSERT( via->Type() == PCB_VIA_T );
int netcode = via->GetNet();
int netcode = via->GetNetCode();
if( netcode == 0 )
continue;

4
pcbnew/specctra_import.cpp
View File

@ -207,7 +207,7 @@ TRACK* SPECCTRA_DB::makeTRACK( PATH* aPath, int aPointIndex, int aNetcode ) thro
track->SetEnd( mapPt( aPath->points[aPointIndex+1], routeResolution ) );
track->SetLayer( pcbLayer2kicad[layerNdx] );
track->SetWidth( scale( aPath->aperture_width, routeResolution ) );
track->SetNet( aNetcode );
track->SetNetCode( aNetcode );
return track;
}
@ -339,7 +339,7 @@ SEGVIA* SPECCTRA_DB::makeVIA( PADSTACK* aPadstack, const POINT& aPoint, int aNet
}
if( via )
via->SetNet( aNetCode );
via->SetNetCode( aNetCode );
return via;
}

2
pcbnew/tr_modif.cpp
View File

@ -72,7 +72,7 @@ int PCB_EDIT_FRAME::EraseRedundantTrack( wxDC* aDC,
wxPoint end;
LAYER_MSK startmasklayer, endmasklayer;
int netcode = aNewTrack->GetNet();
int netcode = aNewTrack->GetNetCode();
/* Reconstruct the complete track (the new track has to start on a segment of track).
*/

6
pcbnew/tracepcb.cpp
View File

@ -250,7 +250,7 @@ void BOARD::DrawHighLight( EDA_DRAW_PANEL* am_canvas, wxDC* DC, int aNetCode )
for( BOARD::ZONE_CONTAINERS::iterator zc = zones.begin(); zc!=zones.end(); ++zc )
{
if( (*zc)->GetNet() == aNetCode )
if( (*zc)->GetNetCode() == aNetCode )
{
(*zc)->Draw( am_canvas, DC, draw_mode );
}
@ -261,7 +261,7 @@ void BOARD::DrawHighLight( EDA_DRAW_PANEL* am_canvas, wxDC* DC, int aNetCode )
{
for( D_PAD* pad = module->Pads(); pad; pad = pad->Next() )
{
if( pad->GetNet() == aNetCode )
if( pad->GetNetCode() == aNetCode )
{
pad->Draw( am_canvas, DC, draw_mode );
}
@ -271,7 +271,7 @@ void BOARD::DrawHighLight( EDA_DRAW_PANEL* am_canvas, wxDC* DC, int aNetCode )
// Redraw track and vias that have aNetCode
for( TRACK* seg = m_Track; seg; seg = seg->Next() )
{
if( seg->GetNet() == aNetCode )
if( seg->GetNetCode() == aNetCode )
{
seg->Draw( am_canvas, DC, draw_mode );
}

4
pcbnew/xchgmod.cpp
View File

@ -455,13 +455,13 @@ void PCB_EDIT_FRAME::Exchange_Module( MODULE* aOldModule,
// Update pad netnames ( when possible)
for( D_PAD* pad = aNewModule->Pads(); pad != NULL; pad = pad->Next() )
{
pad->SetNet( NETINFO_LIST::UNCONNECTED );
pad->SetNetCode( NETINFO_LIST::UNCONNECTED );
D_PAD* old_pad = aOldModule->Pads();
for( ; old_pad != NULL; old_pad = old_pad->Next() )
{
if( pad->PadNameEqual( old_pad ) )
pad->SetNet( old_pad->GetNet() );
pad->SetNetCode( old_pad->GetNetCode() );
}
}

31
pcbnew/zones_by_polygon.cpp
View File

@ -130,7 +130,7 @@ void PCB_EDIT_FRAME::duplicateZone( wxDC* aDC, ZONE_CONTAINER* aZone )
s_AuxiliaryList.ClearListAndDeleteItems();
s_PickedList.ClearListAndDeleteItems();
SaveCopyOfZones( s_PickedList, GetBoard(), newZone->GetNet(), newZone->GetLayer() );
SaveCopyOfZones( s_PickedList, GetBoard(), newZone->GetNetCode(), newZone->GetLayer() );
GetBoard()->Add( newZone );
ITEM_PICKER picker( newZone, UR_NEW );
@ -227,10 +227,10 @@ void PCB_EDIT_FRAME::Start_Move_Zone_Corner( wxDC* DC, ZONE_CONTAINER* aZone,
}
ZONE_SETTINGS zoneInfo = GetZoneSettings();
zoneInfo.m_NetcodeSelection = aZone->GetNet();
zoneInfo.m_NetcodeSelection = aZone->GetNetCode();
SetZoneSettings( zoneInfo );
GetBoard()->SetHighLightNet( aZone->GetNet() );
GetBoard()->SetHighLightNet( aZone->GetNetCode() );
if( DC )
HighLight( DC );
@ -248,8 +248,7 @@ void PCB_EDIT_FRAME::Start_Move_Zone_Corner( wxDC* DC, ZONE_CONTAINER* aZone,
s_AuxiliaryList.ClearListAndDeleteItems();
s_PickedList.ClearListAndDeleteItems();
SaveCopyOfZones( s_PickedList, GetBoard(), aZone->GetNet(),
aZone->GetLayer() );
SaveCopyOfZones( s_PickedList, GetBoard(), aZone->GetNetCode(), aZone->GetLayer() );
if ( IsNewCorner )
aZone->Outline()->InsertCorner(corner_id-1, cx, cy );
@ -278,8 +277,7 @@ void PCB_EDIT_FRAME::Start_Move_Zone_Drag_Outline_Edge( wxDC* DC,
s_PickedList.ClearListAndDeleteItems();
s_AuxiliaryList.ClearListAndDeleteItems();
SaveCopyOfZones( s_PickedList, GetBoard(), aZone->GetNet(),
aZone->GetLayer() );
SaveCopyOfZones( s_PickedList, GetBoard(), aZone->GetNetCode(), aZone->GetLayer() );
}
@ -294,17 +292,16 @@ void PCB_EDIT_FRAME::Start_Move_Zone_Outlines( wxDC* DC, ZONE_CONTAINER* aZone )
}
ZONE_SETTINGS zoneInfo = GetZoneSettings();
zoneInfo.m_NetcodeSelection = aZone->GetNet();
zoneInfo.m_NetcodeSelection = aZone->GetNetCode();
SetZoneSettings( zoneInfo );
GetBoard()->SetHighLightNet( aZone->GetNet() );
GetBoard()->SetHighLightNet( aZone->GetNetCode() );
HighLight( DC );
}
s_PickedList.ClearListAndDeleteItems();
s_AuxiliaryList.ClearListAndDeleteItems();
SaveCopyOfZones( s_PickedList, GetBoard(), aZone->GetNet(),
aZone->GetLayer() );
SaveCopyOfZones( s_PickedList, GetBoard(), aZone->GetNetCode(), aZone->GetLayer() );
aZone->SetFlags( IS_MOVED );
m_canvas->SetMouseCapture( Show_Zone_Corner_Or_Outline_While_Move_Mouse,
@ -382,7 +379,7 @@ void PCB_EDIT_FRAME::Remove_Zone_Corner( wxDC* DC, ZONE_CONTAINER* aZone )
s_AuxiliaryList.ClearListAndDeleteItems();
s_PickedList. ClearListAndDeleteItems();
SaveCopyOfZones( s_PickedList, GetBoard(), aZone->GetNet(), aZone->GetLayer() );
SaveCopyOfZones( s_PickedList, GetBoard(), aZone->GetNetCode(), aZone->GetLayer() );
aZone->Outline()->DeleteCorner( aZone->GetSelectedCorner() );
// modify zones outlines according to the new aZone shape
@ -549,7 +546,7 @@ int PCB_EDIT_FRAME::Begin_Zone( wxDC* DC )
{
zoneInfo.m_NetcodeSelection = GetBoard()->GetHighLightNetCode();
zone->SetNet( zoneInfo.m_NetcodeSelection );
zone->SetNetCode( zoneInfo.m_NetcodeSelection );
}
double tmp = ZONE_THERMAL_RELIEF_GAP_MIL;
wxGetApp().GetSettings()->Read( ZONE_THERMAL_RELIEF_GAP_STRING_KEY, &tmp );
@ -577,7 +574,7 @@ int PCB_EDIT_FRAME::Begin_Zone( wxDC* DC )
zoneInfo.SetIsKeepout( true );
// Netcode and netname are irrelevant,
// so ensure they are cleared
zone->SetNet( NETINFO_LIST::UNCONNECTED );
zone->SetNetCode( NETINFO_LIST::UNCONNECTED );
edited = InvokeKeepoutAreaEditor( this, &zoneInfo );
}
else
@ -623,7 +620,7 @@ int PCB_EDIT_FRAME::Begin_Zone( wxDC* DC )
{
if( s_CurrentZone )
{
zoneInfo.m_NetcodeSelection = s_CurrentZone->GetNet();
zoneInfo.m_NetcodeSelection = s_CurrentZone->GetNetCode();
GetBoard()->SetZoneSettings( zoneInfo );
}
@ -744,7 +741,7 @@ bool PCB_EDIT_FRAME::End_Zone( wxDC* DC )
// Save initial zones configuration, for undo/redo, before adding new zone
s_AuxiliaryList.ClearListAndDeleteItems();
s_PickedList.ClearListAndDeleteItems();
SaveCopyOfZones(s_PickedList, GetBoard(), zone->GetNet(), zone->GetLayer() );
SaveCopyOfZones(s_PickedList, GetBoard(), zone->GetNetCode(), zone->GetLayer() );
// Put new zone in list
if( !s_CurrentZone )
@ -902,7 +899,7 @@ void PCB_EDIT_FRAME::Edit_Zone_Params( wxDC* DC, ZONE_CONTAINER* aZone )
NETINFO_ITEM* net = GetBoard()->FindNet( zoneInfo.m_NetcodeSelection );
if( net ) // net == NULL should not occur
aZone->SetNet( net->GetNet() );
aZone->SetNetCode( net->GetNet() );
// Combine zones if possible
GetBoard()->OnAreaPolygonModified( &s_AuxiliaryList, aZone );

2
pcbnew/zones_by_polygon_fill_functions.cpp
View File

@ -100,7 +100,7 @@ int PCB_EDIT_FRAME::Fill_Zone( ZONE_CONTAINER* aZone )
// Shows the net
ZONE_SETTINGS zoneInfo = GetZoneSettings();
zoneInfo.m_NetcodeSelection = aZone->GetNet();
zoneInfo.m_NetcodeSelection = aZone->GetNetCode();
SetZoneSettings( zoneInfo );
msg = aZone->GetNetname();

16
pcbnew/zones_convert_brd_items_to_polygons_with_Boost.cpp
View File

@ -228,7 +228,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
pad = &dummypad;
}
if( pad->GetNet() != GetNet() )
if( pad->GetNetCode() != GetNetCode() )
{
item_clearance = pad->GetClearance() + margin;
item_boundingbox = pad->GetBoundingBox();
@ -249,7 +249,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
int gap = zone_clearance;
if( ( GetPadConnection( pad ) == PAD_NOT_IN_ZONE )
|| ( GetNet() == 0 ) || ( pad->GetShape() == PAD_TRAPEZOID ) )
|| ( GetNetCode() == 0 ) || ( pad->GetShape() == PAD_TRAPEZOID ) )
// PAD_TRAPEZOID shapes are not in zones because they are used in microwave apps
// and i think it is good that shapes are not changed by thermal pads or others
@ -275,7 +275,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
if( !track->IsOnLayer( GetLayer() ) )
continue;
if( track->GetNet() == GetNet() && (GetNet() != 0) )
if( track->GetNetCode() == GetNetCode() && (GetNetCode() != 0) )
continue;
item_clearance = track->GetClearance() + margin;
@ -363,7 +363,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
// do not add clearance.
// the zone will be connected to the current zone, but filled areas
// will use different parameters (clearance, thermal shapes )
bool addclearance = GetNet() != zone->GetNet();
bool addclearance = GetNetCode() != zone->GetNetCode();
int clearance = zone_clearance;
if( zone->GetIsKeepout() )
@ -394,7 +394,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
if( !pad->IsOnLayer( GetLayer() ) )
continue;
if( pad->GetNet() != GetNet() )
if( pad->GetNetCode() != GetNetCode() )
continue;
item_boundingbox = pad->GetBoundingBox();
int thermalGap = GetThermalReliefGap( pad );
@ -428,7 +428,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
CopyPolygonsFromKiPolygonListToFilledPolysList( polyset_zone_solid_areas );
// Remove insulated islands:
if( GetNet() > 0 )
if( GetNetCode() > 0 )
TestForCopperIslandAndRemoveInsulatedIslands( aPcb );
// Now we remove all unused thermal stubs.
@ -436,7 +436,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
// Test thermal stubs connections and add polygons to remove unconnected stubs.
// (this is a refinement for thermal relief shapes)
if( GetNet() > 0 )
if( GetNetCode() > 0 )
BuildUnconnectedThermalStubsPolygonList( cornerBufferPolysToSubstract, aPcb, this,
s_Correction, s_thermalRot );
@ -453,7 +453,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
m_FilledPolysList.RemoveAllContours();
CopyPolygonsFromKiPolygonListToFilledPolysList( polyset_zone_solid_areas );
if( GetNet() > 0 )
if( GetNetCode() > 0 )
TestForCopperIslandAndRemoveInsulatedIslands( aPcb );
}

2
pcbnew/zones_convert_to_polygons_aux_functions.cpp
View File

@ -162,7 +162,7 @@ void BuildUnconnectedThermalStubsPolygonList( CPOLYGONS_LIST& aCornerBuffer,
if( !pad->IsOnLayer( aZone->GetLayer() ) )
continue;
if( pad->GetNet() != aZone->GetNet() )
if( pad->GetNetCode() != aZone->GetNetCode() )
continue;
// Calculate thermal bridge half width

4
pcbnew/zones_functions_for_undo_redo.cpp
View File

@ -67,7 +67,7 @@ bool ZONE_CONTAINER::IsSame( const ZONE_CONTAINER& aZoneToCompare )
if( GetLayer() != aZoneToCompare.GetLayer() )
return false;
if( GetNet() != aZoneToCompare.GetNet() )
if( GetNetCode() != aZoneToCompare.GetNetCode() )
return false;
if( GetPriority() != aZoneToCompare.GetPriority() )
@ -146,7 +146,7 @@ int SaveCopyOfZones( PICKED_ITEMS_LIST& aPickList, BOARD* aPcb, int aNetCode, LA
if( zone == NULL ) // End of list
break;
if( aNetCode >= 0 && aNetCode != zone->GetNet() )
if( aNetCode >= 0 && aNetCode != zone->GetNetCode() )
continue;
if( aLayer >= 0 && aLayer != zone->GetLayer() )

4
pcbnew/zones_polygons_insulated_copper_islands.cpp
View File

@ -54,7 +54,7 @@ void ZONE_CONTAINER::TestForCopperIslandAndRemoveInsulatedIslands( BOARD* aPcb )
if( !pad->IsOnLayer( GetLayer() ) )
continue;
if( pad->GetNet() != GetNet() )
if( pad->GetNetCode() != GetNetCode() )
continue;
listPointsCandidates.push_back( pad->GetPosition() );
@ -66,7 +66,7 @@ void ZONE_CONTAINER::TestForCopperIslandAndRemoveInsulatedIslands( BOARD* aPcb )
if( !track->IsOnLayer( GetLayer() ) )
continue;
if( track->GetNet() != GetNet() )
if( track->GetNetCode() != GetNetCode() )
continue;
listPointsCandidates.push_back( track->GetStart() );

22
pcbnew/zones_polygons_test_connections.cpp
View File

@ -50,11 +50,11 @@ void Merge_SubNets_Connected_By_CopperAreas( BOARD* aPcb, int aNetcode );
// zone size = size of the m_FilledPolysList buffer
bool sort_areas( const ZONE_CONTAINER* ref, const ZONE_CONTAINER* tst )
{
if( ref->GetNet() == tst->GetNet() )
if( ref->GetNetCode() == tst->GetNetCode() )
return ref->GetFilledPolysList().GetCornersCount() <
tst->GetFilledPolysList().GetCornersCount();
else
return ref->GetNet() < tst->GetNet();
return ref->GetNetCode() < tst->GetNetCode();
}
/**
@ -72,14 +72,14 @@ void BOARD::Test_Connections_To_Copper_Areas( int aNetcode )
for( MODULE* module = m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads(); pad != NULL; pad = pad->Next() )
if( (aNetcode < 0) || ( aNetcode == pad->GetNet() ) )
if( (aNetcode < 0) || ( aNetcode == pad->GetNetCode() ) )
pad->SetZoneSubNet( 0 );
}
// clear .m_ZoneSubnet parameter for tracks and vias
for( TRACK* track = m_Track; track; track = track->Next() )
{
if( (aNetcode < 0) || ( aNetcode == track->GetNet() ) )
if( (aNetcode < 0) || ( aNetcode == track->GetNetCode() ) )
track->SetZoneSubNet( 0 );
}
@ -93,7 +93,7 @@ void BOARD::Test_Connections_To_Copper_Areas( int aNetcode )
ZONE_CONTAINER* curr_zone = GetArea( index );
if( !curr_zone->IsOnCopperLayer() )
continue;
if( (aNetcode >= 0) && ( aNetcode != curr_zone->GetNet() ) )
if( (aNetcode >= 0) && ( aNetcode != curr_zone->GetNetCode() ) )
continue;
if( curr_zone->GetFilledPolysList().GetCornersCount() == 0 )
continue;
@ -112,7 +112,7 @@ void BOARD::Test_Connections_To_Copper_Areas( int aNetcode )
{
ZONE_CONTAINER* curr_zone = zones_candidates[idx];
int netcode = curr_zone->GetNet();
int netcode = curr_zone->GetNetCode();
// Build a list of candidates connected to the net:
// At this point, layers are not considered, because areas on different layers can
@ -136,7 +136,7 @@ void BOARD::Test_Connections_To_Copper_Areas( int aNetcode )
TRACK* track = m_Track.GetFirst()->GetStartNetCode( netcode );
for( ; track; track = track->Next() )
{
if( track->GetNet() != netcode )
if( track->GetNetCode() != netcode )
break;
candidates.push_back( track );
}
@ -255,10 +255,10 @@ void Merge_SubNets_Connected_By_CopperAreas( BOARD* aPcb )
if ( ! curr_zone->IsOnCopperLayer() )
continue;
if ( curr_zone->GetNet() <= 0 )
if ( curr_zone->GetNetCode() <= 0 )
continue;
Merge_SubNets_Connected_By_CopperAreas( aPcb, curr_zone->GetNet() );
Merge_SubNets_Connected_By_CopperAreas( aPcb, curr_zone->GetNetCode() );
}
}
@ -284,7 +284,7 @@ void Merge_SubNets_Connected_By_CopperAreas( BOARD* aPcb, int aNetcode )
{
ZONE_CONTAINER* curr_zone = aPcb->GetArea( index );
if( aNetcode == curr_zone->GetNet() )
if( aNetcode == curr_zone->GetNetCode() )
{
found = true;
break;
@ -311,7 +311,7 @@ void Merge_SubNets_Connected_By_CopperAreas( BOARD* aPcb, int aNetcode )
track = aPcb->m_Track.GetFirst()->GetStartNetCode( aNetcode );
for( ; track; track = track->Next() )
{
if( track->GetNet() != aNetcode )
if( track->GetNetCode() != aNetcode )
break;
Candidates.push_back( track );
}

12
pcbnew/zones_test_and_combine_areas.cpp
View File

@ -59,7 +59,7 @@ bool BOARD::OnAreaPolygonModified( PICKED_ITEMS_LIST* aModifiedZonesList,
if( bCheckAllAreas )
{
modified = true;
CombineAllAreasInNet( aModifiedZonesList, modified_area->GetNet(), true );
CombineAllAreasInNet( aModifiedZonesList, modified_area->GetNetCode(), true );
}
if( !IsCopperLayer( layer ) ) // Refill non copper zones on this layer
@ -98,7 +98,7 @@ bool BOARD::CombineAllAreasInNet( PICKED_ITEMS_LIST* aDeletedList, int aNetCode,
{
ZONE_CONTAINER* curr_area = m_ZoneDescriptorList[ia1];
if( curr_area->GetNet() != aNetCode )
if( curr_area->GetNetCode() != aNetCode )
continue;
// legal polygon
@ -109,7 +109,7 @@ bool BOARD::CombineAllAreasInNet( PICKED_ITEMS_LIST* aDeletedList, int aNetCode,
{
ZONE_CONTAINER* area2 = m_ZoneDescriptorList[ia2];
if( area2->GetNet() != aNetCode )
if( area2->GetNetCode() != aNetCode )
continue;
if( curr_area->GetPriority() != area2->GetPriority() )
@ -158,7 +158,7 @@ bool BOARD::TestAreaIntersections( ZONE_CONTAINER* area_to_test )
{
ZONE_CONTAINER* area2 = m_ZoneDescriptorList[ia2];
if( area_to_test->GetNet() != area2->GetNet() )
if( area_to_test->GetNetCode() != area2->GetNetCode() )
continue;
if( area_to_test == area2 )
@ -390,7 +390,7 @@ int BOARD::Test_Drc_Areas_Outlines_To_Areas_Outlines( ZONE_CONTAINER* aArea_To_E
continue;
// Test for same net
if( Area_Ref->GetNet() == area_to_test->GetNet() && Area_Ref->GetNet() >= 0 )
if( Area_Ref->GetNetCode() == area_to_test->GetNetCode() && Area_Ref->GetNetCode() >= 0 )
continue;
// test for different priorities
@ -586,7 +586,7 @@ bool DRC::doEdgeZoneDrc( ZONE_CONTAINER* aArea, int aCornerIndex )
continue;
// Test for same net
if( ( aArea->GetNet() == area_to_test->GetNet() ) && (aArea->GetNet() >= 0) )
if( ( aArea->GetNetCode() == area_to_test->GetNetCode() ) && (aArea->GetNetCode() >= 0) )
continue;
// test for same priority