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Fix qa test.

This commit is contained in:
Jeff Young 2022-10-19 14:14:16 +01:00
parent 56f58cf53f
commit 7c4b8d50dd
2 changed files with 469 additions and 43 deletions
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86
qa/data/issue7567.kicad_pcb
View File

@ -1,4 +1,4 @@
(kicad_pcb (version 20210126) (generator pcbnew)
(kicad_pcb (version 20211014) (generator pcbnew)
(general
(thickness 1.6)
@ -42,6 +42,7 @@
(copper_finish "None")
(dielectric_constraints no)
)
(pad_to_mask_clearance 0)
(aux_axis_origin 96.52 144.78)
(grid_origin 96.52 144.78)
(pcbplotparams
@ -79,7 +80,6 @@
)
)
(net 0 "")
(net 1 "GND")
(net 2 "+5V")
@ -134,60 +134,60 @@
(fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer "F.CrtYd") (width 0.05) (tstamp 77f54041-c0e8-49fd-9556-2a085e8bb35a))
(fp_line (start -1.75 32.25) (end 4.3 32.25) (layer "F.CrtYd") (width 0.05) (tstamp cbcc1b9b-48ca-474c-acf7-2372da4972d7))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer "F.CrtYd") (width 0.05) (tstamp ce51c7f4-52d7-4410-99e2-85e15b2e1ca9))
(pad "1" thru_hole rect (at 0 0 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "1" thru_hole rect locked (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 1 "GND") (tstamp 50e46035-d009-4bc9-9144-01a2b287fa35))
(pad "2" thru_hole oval (at 2.54 0 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "2" thru_hole oval locked (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 1 "GND") (tstamp da748863-9757-41e5-820a-7f527a6b67f4))
(pad "3" thru_hole oval (at 0 2.54 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "3" thru_hole oval locked (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 2 "+5V") (tstamp 5e5f556f-b431-451a-97db-c239bfdb6b76))
(pad "4" thru_hole oval (at 2.54 2.54 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "4" thru_hole oval locked (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 3 "+3V3") (tstamp 3549d9b3-8d6e-45c8-9dc8-155d51b3f1f4))
(pad "5" thru_hole oval (at 0 5.08 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "5" thru_hole oval locked (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 4 "GPIO_SPI_CS#") (tstamp bb0fbcdb-2c6a-42d9-b77d-949cc4808960))
(pad "6" thru_hole oval (at 2.54 5.08 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "6" thru_hole oval locked (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 5 "GPIO_UART1_TXD") (tstamp 12b020e9-d4e0-43a5-806a-e9106735ab66))
(pad "7" thru_hole oval (at 0 7.62 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "7" thru_hole oval locked (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 6 "GPIO_SPI_MISO") (tstamp 7693013d-863f-442e-99fb-6039d8b588de))
(pad "8" thru_hole oval (at 2.54 7.62 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "8" thru_hole oval locked (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 7 "GPIO_UART1_RXD") (tstamp bc5ffcde-e33e-441d-b6ac-3e6afc4d94e7))
(pad "9" thru_hole oval (at 0 10.16 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "9" thru_hole oval locked (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 8 "GPIO_SPI_MOSI") (tstamp 7f45ed09-d0b5-4fac-9eb4-20ee6c6f07a5))
(pad "10" thru_hole oval (at 2.54 10.16 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "10" thru_hole oval locked (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 9 "GPIO_UART1_CTS") (tstamp 98154aac-31dc-461f-bfc2-29e338d032b8))
(pad "11" thru_hole oval (at 0 12.7 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "11" thru_hole oval locked (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 10 "GPIO_SPI_CLK") (tstamp fe7b12bd-1172-47eb-89b1-4e16aee85fab))
(pad "12" thru_hole oval (at 2.54 12.7 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "12" thru_hole oval locked (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 11 "GPIO_UART1_RTS") (tstamp f205cafc-4bc4-4231-937b-c32e5ee0917f))
(pad "13" thru_hole oval (at 0 15.24 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "13" thru_hole oval locked (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 12 "GPIO_I2C_SCL") (tstamp 0d650c51-94a2-4a05-b514-dcca6c661b70))
(pad "14" thru_hole oval (at 2.54 15.24 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "14" thru_hole oval locked (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 13 "GPIO_I2S_CLK") (tstamp 62385088-5982-4c59-83ee-a3e784b8dcc6))
(pad "15" thru_hole oval (at 0 17.78 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "15" thru_hole oval locked (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 14 "GPIO_I2C_SDA") (tstamp 13faa25d-676b-4b52-bb43-20b12e4ee67b))
(pad "16" thru_hole oval (at 2.54 17.78 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "16" thru_hole oval locked (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 15 "GPIO_I2S_FRM") (tstamp 12e0b964-6275-4d6d-bc8e-1115d1e67dd0))
(pad "17" thru_hole oval (at 0 20.32 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "17" thru_hole oval locked (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 16 "GPIO_UART2_TXD") (tstamp e6f77aad-8f77-428b-b3da-8b4736e0a396))
(pad "18" thru_hole oval (at 2.54 20.32 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "18" thru_hole oval locked (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 17 "GPIO_I2S_DO") (tstamp 456b7b6c-732b-4dd9-bb8c-bbfb8fd8ea8c))
(pad "19" thru_hole oval (at 0 22.86 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "19" thru_hole oval locked (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 18 "GPIO_UART2_RXD") (tstamp 6d5620cd-9778-4c77-be23-94a57f004611))
(pad "20" thru_hole oval (at 2.54 22.86 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "20" thru_hole oval locked (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 19 "GPIO_I2S_DI") (tstamp 31a6a5b8-e9b4-41b0-be22-3a2ae05ecc51))
(pad "21" thru_hole oval (at 0 25.4 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "21" thru_hole oval locked (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 20 "GPIO_S5_0") (tstamp 5426cde5-01bb-4e04-b1c2-1eb7426cbec8))
(pad "22" thru_hole oval (at 2.54 25.4 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "22" thru_hole oval locked (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 21 "GPIO_PWM0") (tstamp 4c4613cf-50b8-4d30-b330-d44b7505f7a5))
(pad "23" thru_hole oval (at 0 27.94 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "23" thru_hole oval locked (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 22 "GPIO_S5_1") (tstamp 040a8c56-a2c5-489c-8167-8b7186664393))
(pad "24" thru_hole oval (at 2.54 27.94 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "24" thru_hole oval locked (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 23 "GPIO_PWM1") (tstamp 376a7697-de73-4228-b597-7420574cb8f4))
(pad "25" thru_hole oval (at 0 30.48 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "25" thru_hole oval locked (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 24 "GPIO_S5_2") (tstamp ad3c0573-42eb-4ab4-acec-a839887126ca))
(pad "26" thru_hole oval (at 2.54 30.48 90) (locked) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(pad "26" thru_hole oval locked (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask "F.SilkS")
(net 25 "I2SMCLK_GPIO") (tstamp 874ff977-dbaa-4613-abf6-c2d848b5b3f0))
(model "Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl"
(offset (xyz 1.269999980926514 -15.23999977111816 0))
(offset (xyz 1.269999981 -15.23999977 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
@ -209,7 +209,7 @@
(tstamp 36b1a5f8-8293-4311-8bd7-8513e6eb0138)
)
(fp_circle (center 0 0) (end 3.5 0) (layer "Cmts.User") (width 0.381) (fill none) (tstamp 4c0a7678-dfed-4c31-b09a-348c5d219b65))
(pad "1" thru_hole circle (at 0 0) (locked) (size 3.5 3.5) (drill 3.5) (layers) (tstamp 86ce1d0e-da25-49eb-ae42-604350131569))
(pad "" thru_hole circle locked (at 0 0) (size 3.5 3.5) (drill 3.5) (layers) (tstamp 86ce1d0e-da25-49eb-ae42-604350131569))
)
(footprint "Mounting_Holes:MountingHole_3-5mm" locked (layer "F.Cu")
@ -228,7 +228,7 @@
(tstamp ca7648fb-bd9d-45ae-8e68-a244b40b89bf)
)
(fp_circle (center 0 0) (end 3.5 0) (layer "Cmts.User") (width 0.381) (fill none) (tstamp cfd355b8-7252-45d7-a9a6-e63b1c0f609e))
(pad "1" thru_hole circle (at 0 0) (locked) (size 3.5 3.5) (drill 3.5) (layers) (tstamp 342f95af-1da3-4ffa-a9ef-dbc51ce2b75b))
(pad "" thru_hole circle locked (at 0 0) (size 3.5 3.5) (drill 3.5) (layers) (tstamp 342f95af-1da3-4ffa-a9ef-dbc51ce2b75b))
)
(footprint "Mounting_Holes:MountingHole_3-5mm" locked (layer "F.Cu")
@ -247,7 +247,7 @@
(tstamp ff263f3e-bbfb-4282-8c12-7e0a8c90d9df)
)
(fp_circle (center 0 0) (end 3.5 0) (layer "Cmts.User") (width 0.381) (fill none) (tstamp 76b47b06-f231-4716-8dcb-54ce4ae94eba))
(pad "1" thru_hole circle (at 0 0) (locked) (size 3.5 3.5) (drill 3.5) (layers) (tstamp 6cb52416-0698-4f08-a129-189ae148bc82))
(pad "" thru_hole circle locked (at 0 0) (size 3.5 3.5) (drill 3.5) (layers) (tstamp 6cb52416-0698-4f08-a129-189ae148bc82))
)
(footprint "Mounting_Holes:MountingHole_3-5mm" locked (layer "F.Cu")
@ -266,7 +266,7 @@
(tstamp 8c0e2f03-e8db-4bd4-ad91-3d9de85fd0f2)
)
(fp_circle (center 0 0) (end 3.5 0) (layer "Cmts.User") (width 0.381) (fill none) (tstamp 66a6fefc-396c-447b-beb4-eae4fe6b8a65))
(pad "1" thru_hole circle (at 0 0) (locked) (size 3.5 3.5) (drill 3.5) (layers) (tstamp 93ef87f2-708b-4e52-b54c-2cbd6740e799))
(pad "" thru_hole circle locked (at 0 0) (size 3.5 3.5) (drill 3.5) (layers) (tstamp 93ef87f2-708b-4e52-b54c-2cbd6740e799))
)
(footprint "Resistor_SMD:R_0201_0603Metric" (layer "F.Cu")
@ -295,10 +295,10 @@
(fp_line (start 0.3 -0.15) (end 0.3 0.15) (layer "F.Fab") (width 0.1) (tstamp 3d91e15e-8b12-4a4b-b942-ea0234aad4d4))
(fp_line (start -0.3 -0.15) (end 0.3 -0.15) (layer "F.Fab") (width 0.1) (tstamp e04c0cff-46c6-4a93-a0a4-b1521960a47e))
(fp_line (start -0.3 0.15) (end -0.3 -0.15) (layer "F.Fab") (width 0.1) (tstamp fd9b1b23-22c5-4c46-83f1-64f36867c37d))
(pad "" smd roundrect (at -0.345 0) (locked) (size 0.318 0.36) (layers "F.Paste") (roundrect_rratio 0.25) (tstamp 05de845e-b7f4-43e8-bc7c-621f0a3d63eb))
(pad "" smd roundrect (at 0.345 0) (locked) (size 0.318 0.36) (layers "F.Paste") (roundrect_rratio 0.25) (tstamp f3ca4cf6-bb49-45aa-bbc0-df85cd44b58f))
(pad "1" smd roundrect (at -0.32 0) (locked) (size 0.46 0.4) (layers "F.Cu" "F.Mask") (roundrect_rratio 0.25) (tstamp a2d80f69-5f89-4bbd-a0e6-bd1f2450f16f))
(pad "2" smd roundrect (at 0.32 0) (locked) (size 0.46 0.4) (layers "F.Cu" "F.Mask") (roundrect_rratio 0.25) (tstamp 377331a3-75db-48e6-8254-e27dc43ff779))
(pad "" smd roundrect locked (at -0.345 0) (size 0.318 0.36) (layers "F.Paste") (roundrect_rratio 0.25) (tstamp 05de845e-b7f4-43e8-bc7c-621f0a3d63eb))
(pad "" smd roundrect locked (at 0.345 0) (size 0.318 0.36) (layers "F.Paste") (roundrect_rratio 0.25) (tstamp f3ca4cf6-bb49-45aa-bbc0-df85cd44b58f))
(pad "1" smd roundrect locked (at -0.32 0) (size 0.46 0.4) (layers "F.Cu" "F.Mask") (roundrect_rratio 0.25) (tstamp a2d80f69-5f89-4bbd-a0e6-bd1f2450f16f))
(pad "2" smd roundrect locked (at 0.32 0) (size 0.46 0.4) (layers "F.Cu" "F.Mask") (roundrect_rratio 0.25) (tstamp 377331a3-75db-48e6-8254-e27dc43ff779))
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0201_0603Metric.wrl"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -306,16 +306,16 @@
)
)
(gr_line (start 195.58 71.12) (end 96.52 71.12) (angle 90) (layer "Edge.Cuts") (width 0.15) (tstamp 2668eae5-e838-4dec-a87d-2b40a098a0a2))
(gr_line (start 96.52 144.78) (end 195.58 144.78) (angle 90) (layer "Edge.Cuts") (width 0.15) (tstamp 4db5a4c9-4072-41cd-a257-fadcefa47294))
(gr_line (start 195.58 144.78) (end 195.58 71.12) (angle 90) (layer "Edge.Cuts") (width 0.15) (tstamp c5eebce5-78a3-4142-8902-e211c6cd5c8f))
(gr_line (start 96.52 71.12) (end 96.52 144.78) (angle 90) (layer "Edge.Cuts") (width 0.15) (tstamp deb9b139-58fd-49d8-9b12-09ad44d4f842))
(gr_line (start 195.58 71.12) (end 96.52 71.12) (layer "Edge.Cuts") (width 0.15) (tstamp 2668eae5-e838-4dec-a87d-2b40a098a0a2))
(gr_line (start 96.52 144.78) (end 195.58 144.78) (layer "Edge.Cuts") (width 0.15) (tstamp 4db5a4c9-4072-41cd-a257-fadcefa47294))
(gr_line (start 195.58 144.78) (end 195.58 71.12) (layer "Edge.Cuts") (width 0.15) (tstamp c5eebce5-78a3-4142-8902-e211c6cd5c8f))
(gr_line (start 96.52 71.12) (end 96.52 144.78) (layer "Edge.Cuts") (width 0.15) (tstamp deb9b139-58fd-49d8-9b12-09ad44d4f842))
(target plus (at 96.52 144.78) (size 5) (width 0.15) (layer "Edge.Cuts") (tstamp 0656fbe8-d593-4158-9bf3-80d6a1b2e6a0))
(zone (net 0) (net_name "") (layer "B.Cu") (tstamp 7ecf5a8d-7053-4645-8dde-8ebe3d86d387) (name "NoBottomFootprints") (hatch full 0.508)
(connect_pads (clearance 0))
(min_thickness 0.254)
(keepout (tracks allowed) (vias allowed) (pads allowed ) (copperpour allowed) (footprints allowed))
(keepout (tracks allowed) (vias allowed) (pads allowed) (copperpour allowed) (footprints allowed))
(fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
(polygon
(pts
@ -329,7 +329,7 @@
(zone (net 0) (net_name "") (layer "B.Cu") (tstamp a318326d-41b9-4ad1-a1b1-e90c920d74a2) (name "NoBottomFootprints") (hatch full 0.508)
(connect_pads (clearance 0))
(min_thickness 0.254)
(keepout (tracks allowed) (vias allowed) (pads allowed ) (copperpour allowed) (footprints not_allowed))
(keepout (tracks allowed) (vias allowed) (pads allowed) (copperpour allowed) (footprints not_allowed))
(fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
(polygon
(pts

426
qa/data/issue7567.kicad_pro Executable file
View File

@ -0,0 +1,426 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.0,
"copper_text_size_v": 1.0,
"copper_text_thickness": 0.19999999999999998,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 1,
"dimension_units": 2,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 1,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 0.8128,
"fab_text_size_v": 0.8128,
"fab_text_thickness": 0.15239999999999998,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 0.8128,
"other_text_size_v": 0.8128,
"other_text_thickness": 0.15239999999999998,
"other_text_upright": false,
"pads": {
"drill": 3.5,
"height": 3.5,
"width": 3.5
},
"silk_line_width": 0.15239999999999998,
"silk_text_italic": false,
"silk_text_size_h": 0.8128,
"silk_text_size_v": 0.8128,
"silk_text_thickness": 0.15239999999999998,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.2032
}
},
"diff_pair_dimensions": [
{
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