Smarten connection width checker looking for splits
Fractured polygons are always fractured along the x-axis, so when
checking to see if a segment is a fracture point, we check if the y
coordinate is equal. This avoids situations where there are multiple
fracture points between two inflection points
Additionally, we add a second check to ensure we don't hit spurious
blobs (all kinks should be symmetric and therefore be substantial in
each direction)
Fixes https://gitlab.com/kicad/code/kicad/issues/14130
(cherry picked from commit 7653a2bf99
)
This commit is contained in:
parent
4076461347
commit
7ef5e079fd
|
@ -336,12 +336,13 @@ private:
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|||
// in the wrong direction from the fracture and should
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// fall through to the next point
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if( same_point( aPt, nz )
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&& !( same_point( nz->next, nz->next->prevZ ) || same_point( nz->next, nz->next->nextZ ) ) )
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&& aPt->y == aPt->next->y )
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{
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return nz->next;
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}
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else if( same_point( aPt, pz )
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&& !( same_point( pz->next, pz->next->prevZ ) || same_point( pz->next, pz->next->nextZ ) ) )
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if( same_point( aPt, pz )
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&& aPt->y == aPt->next->y )
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{
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return pz->next;
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}
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@ -362,12 +363,13 @@ private:
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// in the wrong direction from the fracture and should
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// fall through to the next point
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if( same_point( aPt, nz )
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&& !( same_point( nz->prev, nz->prev->nextZ ) || same_point( nz->prev, nz->prev->prevZ ) ) )
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&& aPt->y == aPt->prev->y)
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{
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return nz->prev;
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}
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else if( same_point( aPt, pz )
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&& !( same_point( pz->prev, pz->prev->nextZ ) || same_point( pz->prev, pz->prev->prevZ ) ) )
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if( same_point( aPt, pz )
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&& aPt->y == aPt->prev->y )
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{
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return pz->prev;
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}
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@ -423,12 +425,7 @@ private:
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if( diff_x > m_max_error || diff_y > m_max_error || p == aB )
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p0 = p;
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if( same_point( p, p->nextZ ) )
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p = p->nextZ->next;
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else if( same_point( p, p->prevZ ) )
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p = p->prevZ->next;
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else
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p = p->next;
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p = getNextOutlineVertex( p );
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++checked;
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}
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@ -463,12 +460,7 @@ private:
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if( diff_x > m_max_error || diff_y > m_max_error || p == aB )
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p0 = p;
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if( same_point( p, p->nextZ ) )
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p = p->nextZ->prev;
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else if( same_point( p, p->prevZ ) )
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p = p->prevZ->prev;
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else
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p = p->prev;
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p = getPrevOutlineVertex( p );
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++checked;
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}
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@ -542,7 +534,7 @@ private:
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SEG::ecoord dist2 = diff.SquaredEuclideanNorm();
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if( delta_i > 1 && dist2 < limit2 && dist2 < min_dist && dist2 > 0.0
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&& locallyInside( p, aPt ) && isSubstantial( p, aPt ) )
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&& locallyInside( p, aPt ) && isSubstantial( p, aPt ) && isSubstantial( aPt, p ) )
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{
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min_dist = dist2;
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retval = p;
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@ -560,7 +552,7 @@ private:
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SEG::ecoord dist2 = diff.SquaredEuclideanNorm();
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if( delta_i > 1 && dist2 < limit2 && dist2 < min_dist && dist2 > 0.0
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&& locallyInside( p, aPt ) && isSubstantial( p, aPt ) )
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&& locallyInside( p, aPt ) && isSubstantial( p, aPt ) && isSubstantial( aPt, p ) )
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{
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min_dist = dist2;
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retval = p;
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@ -0,0 +1,908 @@
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"power_pin_not_driven": "error",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
{
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
},
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||||
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||||
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||||
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||||
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||||
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||||
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||||
},
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
],
|
||||
[
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
}
|
|
@ -0,0 +1,348 @@
|
|||
(kicad_pcb (version 20221018) (generator pcbnew)
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
)
|
||||
|
||||
(paper "A4")
|
||||
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|
||||
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|
||||
(31 "B.Cu" signal)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(56 "User.7" user)
|
||||
(57 "User.8" user)
|
||||
(58 "User.9" user)
|
||||
)
|
||||
|
||||
(setup
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(layer "B.SilkS" (type "Bottom Silk Screen"))
|
||||
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|
||||
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|
||||
)
|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
|
||||
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||||
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||||
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|
||||
|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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]
|
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],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"conflicting_netclasses": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"endpoint_off_grid": "warning",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"missing_bidi_pin": "warning",
|
||||
"missing_input_pin": "warning",
|
||||
"missing_power_pin": "error",
|
||||
"missing_unit": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"simulation_model_issue": "error",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "Bug Report.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.151,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.1468,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 3
|
||||
},
|
||||
"net_colors": null,
|
||||
"netclass_assignments": null,
|
||||
"netclass_patterns": []
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"dashed_lines_dash_length_ratio": 12.0,
|
||||
"dashed_lines_gap_length_ratio": 3.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.375,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.15
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_current_sheet_as_root": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"spice_model_current_sheet_as_root": true,
|
||||
"spice_save_all_currents": false,
|
||||
"spice_save_all_voltages": false,
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"0046065b-e39e-4406-a080-1c9c19e47446",
|
||||
""
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
|
@ -51,7 +51,9 @@ BOOST_FIXTURE_TEST_CASE( DRCCopperConn, DRC_REGRESSION_TEST_FIXTURE )
|
|||
std::vector<std::pair<wxString, int>> tests =
|
||||
{
|
||||
{ "issue9870", 13 },
|
||||
{ "connection_width_rules", 3 }
|
||||
{ "connection_width_rules", 3 },
|
||||
{ "issue12831", 0 },
|
||||
{ "issue14130", 0 }
|
||||
};
|
||||
|
||||
for( const std::pair<wxString, int>& test : tests )
|
||||
|
|
Loading…
Reference in New Issue