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Allow vias the same same-net waiver that pads have for hole clearance 

Note that in 7.0 we have physical_hole_clearance rules to give a bit
more expressivity here.

Fixes https://gitlab.com/kicad/code/kicad/issues/9420
This commit is contained in:
Jeff Young 2021-10-18 18:04:54 +01:00
parent 0826c26a18
commit 856cc26d4c
1 changed files with 6 additions and 2 deletions
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8
pcbnew/drc/drc_test_provider_copper_clearance.cpp
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@ -613,8 +613,12 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa
if( dynamic_cast<PCB_TRACK*>( other) )
testClearance = false;
// Pads of the same (defined) net get a waiver on clearance and hole tests
if( otherPad && pad->GetNetCode() && otherPad->GetNetCode() == pad->GetNetCode() )
int padNet = pad->GetNetCode();
int otherPadNet = otherPad ? otherPad->GetNetCode() : 0;
int otherViaNet = otherVia ? otherVia->GetNetCode() : 0;
// Pads and vias of the same (defined) net get a waiver on clearance and hole tests
if( ( otherPadNet && otherPadNet == padNet ) || ( otherViaNet && otherViaNet == padNet ) )
{
testClearance = false;
testHoles = false;