Rework silk-to-pad checker to handle all solder mask clipping of silk.
Fixes https://gitlab.com/kicad/code/kicad/issues/5851
This commit is contained in:
parent
36ceb8075e
commit
85c6cebd77
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@ -29,7 +29,7 @@ zone
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edge_clearance
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hole_clearance
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courtyard_clearance
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silk_to_pad
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silk_to_mask
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silk_to_silk
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skew
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diff_pair_gap
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@ -250,7 +250,7 @@ set( PCBNEW_DRC_SRCS
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drc/drc_test_provider_misc.cpp
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drc/drc_test_provider_track_width.cpp
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drc/drc_test_provider_via_diameter.cpp
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drc/drc_test_provider_silk_to_pad.cpp
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drc/drc_test_provider_silk_to_mask.cpp
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drc/drc_test_provider_silk_to_silk.cpp
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drc/drc_test_provider_matched_length.cpp
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drc/drc_test_provider_diff_pair_coupling.cpp
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@ -200,11 +200,22 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
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if( context == SEXPR_OPEN )
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{
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if( sexprs.empty() )
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tokens = "rule version";
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{
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tokens = "rule "
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"version";
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}
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else if( sexprs.top() == "rule" )
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tokens = "condition constraint layer";
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{
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tokens = "condition "
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"constraint "
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"layer";
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}
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else if( sexprs.top() == "constraint" )
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tokens = "max min opt";
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{
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tokens = "max "
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"min "
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"opt";
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}
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}
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else if( context == SEXPR_TOKEN )
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{
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@ -214,7 +225,20 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
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}
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else if( sexprs.top() == "constraint" )
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{
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tokens = "annulus_width clearance disallow hole track_width";
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tokens = "annulus_width "
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"clearance "
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"courtyard_clearance "
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"diff_pair_gap "
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"diff_pair_uncoupled "
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"disallow "
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"edge_clearance "
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"length "
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"hole "
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"hole_clearance "
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"silk_to_mask "
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"silk_to_silk skew "
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"track_width "
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"via_count ";
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}
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else if( sexprs.top() == "disallow"
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|| sexprs.top() == "buried_via"
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@ -227,11 +251,21 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
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|| sexprs.top() == "via"
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|| sexprs.top() == "zone" )
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{
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tokens = "buried_via graphic hole micro_via pad text track via zone";
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tokens = "buried_via "
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"graphic "
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"hole "
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"micro_via "
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"pad "
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"text "
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"track "
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"via "
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"zone";
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}
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else if( sexprs.top() == "layer" )
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{
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tokens = "inner outer \"x\"";
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tokens = "inner "
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"outer "
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"\"x\"";
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}
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}
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else if( context == STRING && !sexprs.empty() && sexprs.top() == "condition" )
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@ -126,7 +126,7 @@ void DRC_ENGINE::loadImplicitRules()
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holeClearanceConstraint.Value().SetMin( 0 );
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rule->AddConstraint( courtyardClearanceConstraint );
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DRC_CONSTRAINT silkToPadClearanceConstraint( DRC_CONSTRAINT_TYPE_SILK_TO_PAD );
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DRC_CONSTRAINT silkToPadClearanceConstraint( DRC_CONSTRAINT_TYPE_SILK_TO_MASK );
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silkToPadClearanceConstraint.Value().SetMin( 0 );
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rule->AddConstraint( silkToPadClearanceConstraint );
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@ -243,7 +243,7 @@ static wxString formatConstraint( const DRC_CONSTRAINT& constraint )
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{ DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE, "edge_clearance", formatMinMax },
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{ DRC_CONSTRAINT_TYPE_HOLE_SIZE, "hole_size", formatMinMax },
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{ DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE, "courtyard_clearance", formatMinMax },
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{ DRC_CONSTRAINT_TYPE_SILK_TO_PAD, "silk_to_pad", formatMinMax },
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{ DRC_CONSTRAINT_TYPE_SILK_TO_MASK, "silk_to_mask", formatMinMax },
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{ DRC_CONSTRAINT_TYPE_SILK_TO_SILK, "silk_to_silk", formatMinMax },
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{ DRC_CONSTRAINT_TYPE_TRACK_WIDTH, "track_width", formatMinMax },
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{ DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH, "annular_width", formatMinMax },
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@ -414,10 +414,8 @@ void DRC_ENGINE::RunTests( EDA_UNITS aUnits, bool aTestTracksAgainstZones,
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for( DRC_TEST_PROVIDER* provider : m_testProviders )
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{
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if( provider->IsEnabled() )
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{
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phases += provider->GetNumPhases();
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}
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}
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m_progressReporter->AddPhases( phases );
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}
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@ -164,13 +164,13 @@ DRC_ITEM DRC_ITEM::unresolvedVariable( DRCE_UNRESOLVED_VARIABLE,
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_( "Unresolved text variable" ),
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wxT( "unresolved_variable" ) );
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DRC_ITEM DRC_ITEM::silkOverPad( DRCE_SILK_OVER_PAD,
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_( "Silkscreen overlapping pad" ),
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wxT( "silk_over_pad" ) );
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DRC_ITEM DRC_ITEM::silkMaskClearance( DRCE_SILK_MASK_CLEARANCE,
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_( "Silkscreen clipped by solder mask" ),
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wxT( "silk_over_copper" ) );
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DRC_ITEM DRC_ITEM::silkClearance( DRCE_SILK_CLEARANCE,
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_( "Silkscreen clearance" ),
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wxT( "silk_clearance" ) );
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DRC_ITEM DRC_ITEM::silkSilkClearance( DRCE_SILK_SILK_CLEARANCE,
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_( "Silkscreen overlap" ),
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wxT( "silk_overlap" ) );
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DRC_ITEM DRC_ITEM::lengthOutOfRange( DRCE_LENGTH_OUT_OF_RANGE,
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_( "Trace length out of range" ),
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@ -224,8 +224,8 @@ std::vector<std::reference_wrapper<RC_ITEM>> DRC_ITEM::allItemTypes( {
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DRC_ITEM::extraFootprint,
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DRC_ITEM::netConflict,
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DRC_ITEM::unresolvedVariable,
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DRC_ITEM::silkClearance,
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DRC_ITEM::silkOverPad,
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DRC_ITEM::silkSilkClearance,
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DRC_ITEM::silkMaskClearance,
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DRC_ITEM::lengthOutOfRange,
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DRC_ITEM::skewOutOfRange,
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DRC_ITEM::tooManyVias,
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@ -270,8 +270,8 @@ std::shared_ptr<DRC_ITEM> DRC_ITEM::Create( int aErrorCode )
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case DRCE_NET_CONFLICT: return std::make_shared<DRC_ITEM>( netConflict );
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case DRCE_EXTRA_FOOTPRINT: return std::make_shared<DRC_ITEM>( extraFootprint );
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case DRCE_UNRESOLVED_VARIABLE: return std::make_shared<DRC_ITEM>( unresolvedVariable );
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case DRCE_SILK_OVER_PAD: return std::make_shared<DRC_ITEM>( silkOverPad );
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case DRCE_SILK_CLEARANCE: return std::make_shared<DRC_ITEM>( silkClearance );
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case DRCE_SILK_SILK_CLEARANCE: return std::make_shared<DRC_ITEM>( silkSilkClearance );
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case DRCE_SILK_MASK_CLEARANCE: return std::make_shared<DRC_ITEM>( silkMaskClearance );
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case DRCE_LENGTH_OUT_OF_RANGE: return std::make_shared<DRC_ITEM>( lengthOutOfRange );
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case DRCE_SKEW_OUT_OF_RANGE: return std::make_shared<DRC_ITEM>( skewOutOfRange );
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case DRCE_TOO_MANY_VIAS: return std::make_shared<DRC_ITEM>( tooManyVias );
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@ -68,8 +68,9 @@ enum PCB_DRC_CODE {
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DRCE_NET_CONFLICT, // pad net doesn't match netlist
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DRCE_UNRESOLVED_VARIABLE,
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DRCE_SILK_OVER_PAD, // silkscreen over component pad(s)
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DRCE_SILK_CLEARANCE, // silk to silk clearance error
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DRCE_SILK_MASK_CLEARANCE, // silkscreen clipped by mask (potentially leaving it
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// over pads, exposed copper, etc.)
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DRCE_SILK_SILK_CLEARANCE, // silk to silk clearance error
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DRCE_LENGTH_OUT_OF_RANGE,
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DRCE_SKEW_OUT_OF_RANGE,
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DRCE_TOO_MANY_VIAS,
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@ -152,8 +153,8 @@ private:
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static DRC_ITEM extraFootprint;
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static DRC_ITEM netConflict;
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static DRC_ITEM unresolvedVariable;
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static DRC_ITEM silkOverPad;
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static DRC_ITEM silkClearance;
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static DRC_ITEM silkMaskClearance;
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static DRC_ITEM silkSilkClearance;
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static DRC_ITEM lengthOutOfRange;
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static DRC_ITEM skewOutOfRange;
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static DRC_ITEM tooManyVias;
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@ -100,9 +100,11 @@ public:
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for( auto subshape : subshapes )
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{
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const BOX2I& bbox = subshape->BBox();
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BOX2I bbox = subshape->BBox();
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bbox.Inflate( Millimeter2iu( 20 ) );
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const int mmin[2] = { bbox.GetX(), bbox.GetY() };
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const int mmax[2] = { bbox.GetRight(), bbox.GetBottom() };
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m_tree[layer]->Insert( mmin, mmax, new ITEM_WITH_SHAPE( aItem, subshape, itemShape ) );
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m_count++;
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}
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@ -45,7 +45,7 @@ enum DRC_CONSTRAINT_TYPE_T
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DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE,
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DRC_CONSTRAINT_TYPE_HOLE_SIZE,
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DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE,
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DRC_CONSTRAINT_TYPE_SILK_TO_PAD,
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DRC_CONSTRAINT_TYPE_SILK_TO_MASK,
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DRC_CONSTRAINT_TYPE_SILK_TO_SILK,
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DRC_CONSTRAINT_TYPE_TRACK_WIDTH,
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DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH,
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@ -276,7 +276,7 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
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case T_edge_clearance: constraint.m_Type = DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE; break;
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case T_hole: constraint.m_Type = DRC_CONSTRAINT_TYPE_HOLE_SIZE; break;
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case T_courtyard_clearance: constraint.m_Type = DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE; break;
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case T_silk_to_pad: constraint.m_Type = DRC_CONSTRAINT_TYPE_SILK_TO_PAD; break;
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case T_silk_to_mask: constraint.m_Type = DRC_CONSTRAINT_TYPE_SILK_TO_MASK; break;
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case T_silk_to_silk: constraint.m_Type = DRC_CONSTRAINT_TYPE_SILK_TO_SILK; break;
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case T_track_width: constraint.m_Type = DRC_CONSTRAINT_TYPE_TRACK_WIDTH; break;
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case T_annular_width: constraint.m_Type = DRC_CONSTRAINT_TYPE_ANNULAR_WIDTH; break;
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@ -127,7 +127,7 @@ void DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testOverlappingComponentCourtyards()
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{
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const int delta = 100; // This is the number of tests between 2 calls to the progress bar
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if( !reportPhase( _( "Checking footprint courtyard overlap..." ) ) )
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if( !reportPhase( _( "Checking footprints for overlapping courtyards..." ) ) )
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return;
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int ii = 0;
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@ -24,13 +24,9 @@
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#include <common.h>
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#include <class_board.h>
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#include <class_drawsegment.h>
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#include <class_pad.h>
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#include <convert_basic_shapes_to_polygon.h>
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#include <geometry/polygon_test_point_inside.h>
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#include <geometry/seg.h>
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#include <geometry/shape_poly_set.h>
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#include <geometry/shape_rect.h>
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#include <geometry/shape_segment.h>
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#include <drc/drc_engine.h>
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@ -43,21 +39,21 @@
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/*
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Silk to pads clearance test. Check all pads against silkscreen (mask opening in the pad vs silkscreen)
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Errors generated:
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- DRCE_SILK_ON_PADS
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- DRCE_SILK_MASK_CLEARANCE
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*/
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namespace test {
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class DRC_TEST_PROVIDER_SILK_TO_PAD : public ::DRC_TEST_PROVIDER
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class DRC_TEST_PROVIDER_SILK_TO_MASK : public ::DRC_TEST_PROVIDER
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{
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public:
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DRC_TEST_PROVIDER_SILK_TO_PAD ():
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DRC_TEST_PROVIDER_SILK_TO_MASK ():
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m_board( nullptr ),
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m_largestClearance( 0 )
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{
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}
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virtual ~DRC_TEST_PROVIDER_SILK_TO_PAD()
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virtual ~DRC_TEST_PROVIDER_SILK_TO_MASK()
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{
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}
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@ -65,12 +61,12 @@ public:
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virtual const wxString GetName() const override
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{
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return "silk_to_pad";
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return "silk_to_mask";
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};
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virtual const wxString GetDescription() const override
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{
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return "Tests for silkscreen covering components pads";
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return "Tests for silkscreen being clipped by solder mask";
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}
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virtual int GetNumPhases() const override
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@ -89,28 +85,28 @@ private:
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};
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bool test::DRC_TEST_PROVIDER_SILK_TO_PAD::Run()
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bool test::DRC_TEST_PROVIDER_SILK_TO_MASK::Run()
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{
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m_board = m_drcEngine->GetBoard();
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DRC_CONSTRAINT worstClearanceConstraint;
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m_largestClearance = 0;
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if( m_drcEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_SILK_TO_PAD,
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if( m_drcEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_SILK_TO_MASK,
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worstClearanceConstraint, DRCCQ_LARGEST_MINIMUM ) )
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{
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m_largestClearance = worstClearanceConstraint.m_Value.Min();
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}
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reportAux( "Worst clearance : %d nm", m_largestClearance );
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reportPhase(( "Pad to silkscreen clearances..." ));
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reportPhase( _( "Checking silkscreen for potential soldermask clipping..." ) );
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DRC_RTREE padTree, silkTree;
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DRC_RTREE maskTree, silkTree;
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auto addPadToTree =
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[&padTree]( BOARD_ITEM *item ) -> bool
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auto addMaskToTree =
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[&maskTree]( BOARD_ITEM *item ) -> bool
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{
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padTree.insert( item );
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maskTree.insert( item );
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return true;
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};
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@ -125,10 +121,10 @@ bool test::DRC_TEST_PROVIDER_SILK_TO_PAD::Run()
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[&]( const DRC_RTREE::LAYER_PAIR& aLayers, DRC_RTREE::ITEM_WITH_SHAPE* aRefItem,
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DRC_RTREE::ITEM_WITH_SHAPE* aTestItem, bool* aCollisionDetected ) -> bool
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{
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_OVER_PAD ) )
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_MASK_CLEARANCE ) )
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return false;
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auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_SILK_TO_PAD,
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auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_SILK_TO_MASK,
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aRefItem->parent,
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aTestItem->parent );
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@ -147,7 +143,7 @@ bool test::DRC_TEST_PROVIDER_SILK_TO_PAD::Run()
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if( !aRefItem->shape->Collide( aTestItem->shape, minClearance, &actual, &pos ) )
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return true;
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SILK_OVER_PAD );
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SILK_MASK_CLEARANCE );
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wxString msg;
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drcItem->SetItems( aRefItem->parent, aTestItem->parent );
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@ -159,21 +155,28 @@ bool test::DRC_TEST_PROVIDER_SILK_TO_PAD::Run()
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return true;
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};
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int numPads = forEachGeometryItem( { PCB_PAD_T }, LSET::AllTechMask() | LSET::AllCuMask(),
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addPadToTree );
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int numPads = forEachGeometryItem( { PCB_PAD_T,
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PCB_LINE_T,
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PCB_MODULE_EDGE_T,
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PCB_TEXT_T,
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PCB_MODULE_TEXT_T },
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LSET( 2, F_Mask, B_Mask ), addMaskToTree );
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int numSilk = forEachGeometryItem( { PCB_LINE_T, PCB_MODULE_EDGE_T, PCB_TEXT_T, PCB_MODULE_TEXT_T },
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int numSilk = forEachGeometryItem( { PCB_LINE_T,
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PCB_MODULE_EDGE_T,
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PCB_TEXT_T,
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PCB_MODULE_TEXT_T },
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LSET( 2, F_SilkS, B_SilkS ), addSilkToTree );
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reportAux( _("Testing %d pads against %d silkscreen features."), numPads, numSilk );
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reportAux( _("Testing %d exposed copper against %d silkscreen features."), numPads, numSilk );
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const std::vector<DRC_RTREE::LAYER_PAIR> layerPairs =
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{
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_Cu ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_Cu )
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_Mask ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_Mask )
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};
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padTree.QueryCollidingPairs( &silkTree, layerPairs, checkClearance, m_largestClearance );
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maskTree.QueryCollidingPairs( &silkTree, layerPairs, checkClearance, m_largestClearance );
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reportRuleStatistics();
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@ -181,13 +184,13 @@ bool test::DRC_TEST_PROVIDER_SILK_TO_PAD::Run()
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}
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std::set<DRC_CONSTRAINT_TYPE_T> test::DRC_TEST_PROVIDER_SILK_TO_PAD::GetConstraintTypes() const
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std::set<DRC_CONSTRAINT_TYPE_T> test::DRC_TEST_PROVIDER_SILK_TO_MASK::GetConstraintTypes() const
|
||||
{
|
||||
return { DRC_CONSTRAINT_TYPE_SILK_TO_PAD };
|
||||
return { DRC_CONSTRAINT_TYPE_SILK_TO_MASK };
|
||||
}
|
||||
|
||||
|
||||
namespace detail
|
||||
{
|
||||
static DRC_REGISTER_TEST_PROVIDER<test::DRC_TEST_PROVIDER_SILK_TO_PAD> dummy;
|
||||
static DRC_REGISTER_TEST_PROVIDER<test::DRC_TEST_PROVIDER_SILK_TO_MASK> dummy;
|
||||
}
|
|
@ -27,7 +27,6 @@
|
|||
|
||||
#include <geometry/polygon_test_point_inside.h>
|
||||
#include <geometry/seg.h>
|
||||
#include <geometry/shape_rect.h>
|
||||
#include <geometry/shape_segment.h>
|
||||
|
||||
#include <drc/drc_engine.h>
|
||||
|
@ -40,7 +39,7 @@
|
|||
/*
|
||||
Silk to silk clearance test. Check all silkscreen features against each other.
|
||||
Errors generated:
|
||||
- DRCE_SILK_CLEARANCE
|
||||
- DRCE_SILK_SILK_CLEARANCE
|
||||
|
||||
*/
|
||||
|
||||
|
@ -95,7 +94,7 @@ bool DRC_TEST_PROVIDER_SILK_TO_SILK::Run()
|
|||
}
|
||||
|
||||
reportAux( "Worst clearance : %d nm", m_largestClearance );
|
||||
reportPhase(( "Silkscreen clearances..." ));
|
||||
reportPhase( _( "Checking silkscreen for overlapping items..." ) );
|
||||
|
||||
DRC_RTREE silkTree;
|
||||
|
||||
|
@ -110,7 +109,7 @@ bool DRC_TEST_PROVIDER_SILK_TO_SILK::Run()
|
|||
[&]( const DRC_RTREE::LAYER_PAIR& aLayers, DRC_RTREE::ITEM_WITH_SHAPE* aRefItem,
|
||||
DRC_RTREE::ITEM_WITH_SHAPE* aTestItem, bool* aCollisionDetected ) -> bool
|
||||
{
|
||||
if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_CLEARANCE ) )
|
||||
if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_SILK_CLEARANCE ) )
|
||||
return false;
|
||||
|
||||
auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_SILK_TO_SILK,
|
||||
|
@ -162,18 +161,23 @@ bool DRC_TEST_PROVIDER_SILK_TO_SILK::Run()
|
|||
return true;
|
||||
}
|
||||
|
||||
if( ! aRefItem->shape->Collide( aTestItem->shape, minClearance, &actual, &pos ) )
|
||||
if( !aRefItem->shape->Collide( aTestItem->shape, minClearance, &actual, &pos ) )
|
||||
return true;
|
||||
|
||||
std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SILK_CLEARANCE );
|
||||
std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SILK_SILK_CLEARANCE );
|
||||
wxString msg;
|
||||
|
||||
/* For now we're just reporting silkscreen collisions without any dimensional
|
||||
* data. I suspect it's usually noise, and they can always use the clearance
|
||||
* resolution report if they want.
|
||||
*
|
||||
msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
|
||||
constraint.GetParentRule()->m_Name,
|
||||
MessageTextFromValue( userUnits(), minClearance ),
|
||||
MessageTextFromValue( userUnits(), actual ) );
|
||||
|
||||
drcItem->SetErrorMessage( msg );
|
||||
*/
|
||||
drcItem->SetItems( aRefItem->parent, aTestItem->parent );
|
||||
drcItem->SetViolatingRule( constraint.GetParentRule() );
|
||||
|
||||
|
|
|
@ -51,6 +51,8 @@ add_executable( drc_proto
|
|||
../../pcbnew/drc/drc_test_provider_via_diameter.cpp
|
||||
../../pcbnew/drc/drc_test_provider_lvs.cpp
|
||||
../../pcbnew/drc/drc_test_provider_misc.cpp
|
||||
../../pcbnew/drc/drc_test_provider_silk_to_mask.cpp
|
||||
../../pcbnew/drc/drc_test_provider_silk_to_silk.cpp
|
||||
../../pcbnew/drc/drc_engine.cpp
|
||||
../../pcbnew/drc/drc_item.cpp
|
||||
../qa_utils/mocks.cpp
|
||||
|
|
Loading…
Reference in New Issue