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Read, write and process the board-wide Allow soldermask bridges in FPs.

This commit is contained in:
Jeff Young 2022-08-14 22:53:20 +01:00
parent a9536b5de9
commit 86938aa425
7 changed files with 33 additions and 3 deletions
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1
common/pcb.keywords
View File

@ -30,6 +30,7 @@ aligned
allowed
allow_missing_courtyard
allow_soldermask_bridges
allow_soldermask_bridges_in_footprints
anchor
angle
arc

1
include/board_design_settings.h
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@ -688,6 +688,7 @@ public:
int m_SolderPasteMargin; // Solder paste margin absolute value
double m_SolderPasteMarginRatio; // Solder mask margin ratio value of pad size
// The final margin is the sum of these 2 values
bool m_AllowSoldermaskBridgesInFPs;
std::shared_ptr<NET_SETTINGS> m_NetSettings;

2
pcbnew/board_design_settings.cpp
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@ -204,6 +204,8 @@ BOARD_DESIGN_SETTINGS::BOARD_DESIGN_SETTINGS( JSON_SETTINGS* aParent, const std:
// Usually < 0 because the mask is smaller than pad
m_SolderPasteMarginRatio = DEFAULT_SOLDERPASTE_RATIO;
m_AllowSoldermaskBridgesInFPs = false;
// Layer thickness for 3D viewer
m_boardThickness = Millimeter2iu( DEFAULT_BOARD_THICKNESS_MM );

4
pcbnew/dialogs/panel_setup_mask_and_paste.cpp
View File

@ -62,6 +62,8 @@ bool PANEL_SETUP_MASK_AND_PASTE::TransferDataToWindow()
m_pasteMargin.SetValue( m_BrdSettings->m_SolderPasteMargin );
m_pasteMarginRatio.SetDoubleValue( m_BrdSettings->m_SolderPasteMarginRatio * 100.0 );
m_allowBridges->SetValue( m_BrdSettings->m_AllowSoldermaskBridgesInFPs );
return true;
}
@ -77,6 +79,8 @@ bool PANEL_SETUP_MASK_AND_PASTE::TransferDataFromWindow()
m_BrdSettings->m_SolderPasteMargin = m_pasteMargin.GetValue();
m_BrdSettings->m_SolderPasteMarginRatio = m_pasteMarginRatio.GetDoubleValue() / 100.0;
m_BrdSettings->m_AllowSoldermaskBridgesInFPs = m_allowBridges->GetValue();
return true;
}

10
pcbnew/drc/drc_test_provider_solder_mask.cpp
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@ -376,6 +376,7 @@ void DRC_TEST_PROVIDER_SOLDER_MASK::testItemAgainstItems( BOARD_ITEM* aItem,
if( aItem->IsConnected() )
itemNet = static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode();
BOARD_DESIGN_SETTINGS& bds = aItem->GetBoard()->GetDesignSettings();
PAD* pad = dynamic_cast<PAD*>( aItem );
PCB_VIA* via = dynamic_cast<PCB_VIA*>( aItem );
std::shared_ptr<SHAPE> itemShape = aItem->GetEffectiveShape( aRefLayer );
@ -397,9 +398,14 @@ void DRC_TEST_PROVIDER_SOLDER_MASK::testItemAgainstItems( BOARD_ITEM* aItem,
if( isNullAperture( other ) )
return false;
if( itemFP && itemFP == other->GetParentFootprint()
&& ( itemFP->GetAttributes() & FP_ALLOW_SOLDERMASK_BRIDGES ) > 0 )
if( itemFP && itemFP == other->GetParentFootprint() )
{
// Board-wide exclusion
if( bds.m_AllowSoldermaskBridgesInFPs )
return false;
// Footprint-specific exclusion
if( ( itemFP->GetAttributes() & FP_ALLOW_SOLDERMASK_BRIDGES ) > 0 )
return false;
}

5
pcbnew/plugins/kicad/pcb_parser.cpp
View File

@ -2131,6 +2131,11 @@ void PCB_PARSER::parseSetup()
NeedRIGHT();
break;
case T_allow_soldermask_bridges_in_footprints:
bds.m_AllowSoldermaskBridgesInFPs = parseBool();
NeedRIGHT();
break;
case T_aux_axis_origin:
{
int x = parseBoardUnits( "auxiliary origin X" );

11
pcbnew/plugins/kicad/pcb_plugin.cpp
View File

@ -594,16 +594,27 @@ void PCB_PLUGIN::formatSetup( const BOARD* aBoard, int aNestLevel ) const
FormatInternalUnits( dsnSettings.m_SolderMaskExpansion ).c_str() );
if( dsnSettings.m_SolderMaskMinWidth )
{
m_out->Print( aNestLevel+1, "(solder_mask_min_width %s)\n",
FormatInternalUnits( dsnSettings.m_SolderMaskMinWidth ).c_str() );
}
if( dsnSettings.m_SolderPasteMargin != 0 )
{
m_out->Print( aNestLevel+1, "(pad_to_paste_clearance %s)\n",
FormatInternalUnits( dsnSettings.m_SolderPasteMargin ).c_str() );
}
if( dsnSettings.m_SolderPasteMarginRatio != 0 )
{
m_out->Print( aNestLevel+1, "(pad_to_paste_clearance_ratio %s)\n",
Double2Str( dsnSettings.m_SolderPasteMarginRatio ).c_str() );
}
if( dsnSettings.m_AllowSoldermaskBridgesInFPs )
{
m_out->Print( aNestLevel+1, "(allow_soldermask_bridges_in_footprints yes)\n" );
}
VECTOR2I origin = dsnSettings.GetAuxOrigin();