Fix incompatibilites between Python 2 and Python 3
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parent
7548a3b1bf
commit
8805706ccb
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@ -39,7 +39,10 @@
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def __init__(self,aList):
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def __init__(self,aList):
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self.last = aList # last item is the start of list
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self.last = aList # last item is the start of list
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def next(self): # get the next item
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def next(self): # get the next item, Python 2 way to implement an iterator
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return self.__next__()
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def __next__(self): # get the next item
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item = self.last
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item = self.last
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try:
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try:
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@ -220,28 +220,28 @@ if os.path.exists(libcef_so):
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%{
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%{
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def OnPgmInit(self):
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def OnPgmInit(self):
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print "hereA"
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print("hereA")
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if not self.InitPgm():
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if not self.InitPgm():
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return False;
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return False;
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print "hereB"
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print("hereB")
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try:
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try:
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# A KIWAY_PLAYER is a wx.Window
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# A KIWAY_PLAYER is a wx.Window
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frame = Kiway.Player( FRAME_SCH, True )
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frame = Kiway.Player( FRAME_SCH, True )
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print "here0"
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print("here0")
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except IOError as e:
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except IOError as e:
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print 'Player()', e
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print('Player()', e)
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return None
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return None
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print "here1"
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print("here1")
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Kiway.SetTop(frame)
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Kiway.SetTop(frame)
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print "here2"
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print("here2")
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return frame
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return frame
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%}
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%}
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@ -1,4 +1,7 @@
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#!/usr/bin/env python2.7
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#!/usr/bin/env python
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from __future__ import print_function
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from pcbnew import *
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from pcbnew import *
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size_0_6mm = wxSizeMM(0.6,0.6)
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size_0_6mm = wxSizeMM(0.6,0.6)
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@ -38,11 +41,11 @@ pcb.Save("my2.kicad_pcb")
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pcb = LoadBoard("my2.kicad_pcb")
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pcb = LoadBoard("my2.kicad_pcb")
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print map( lambda x: x.GetReference() , list(pcb.GetModules()))
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print(map( lambda x: x.GetReference() , list(pcb.GetModules())))
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for m in pcb.GetModules():
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for m in pcb.GetModules():
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for p in m.Pads():
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for p in m.Pads():
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print 'pad ', p.GetName(), p.GetPosition(), p.GetOffset()
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print('pad ', p.GetName(), p.GetPosition(), p.GetOffset())
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# pcb.GetDesignSettings()
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# pcb.GetDesignSettings()
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@ -7,7 +7,7 @@ filename=sys.argv[1]
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pcb = LoadBoard(filename)
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pcb = LoadBoard(filename)
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for module in pcb.GetModules():
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for module in pcb.GetModules():
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print "* Module: %s"%module.GetReference()
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print("* Module: %s" % module.GetReference())
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module.Value().SetVisible(False) # set Value as Hidden
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module.Value().SetVisible(False) # set Value as Hidden
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module.Reference().SetVisible(True) # set Reference as Visible
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module.Reference().SetVisible(True) # set Reference as Visible
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@ -1,4 +1,7 @@
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#!/usr/bin/env python
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#!/usr/bin/env python
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from __future__ import print_function
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import sys
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import sys
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from pcbnew import *
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from pcbnew import *
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@ -11,7 +14,7 @@ FromUnits = FromMM
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#ToUnits=ToMils
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#ToUnits=ToMils
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#FromUnits=FromMils
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#FromUnits=FromMils
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print "LISTING VIAS:"
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print("LISTING VIAS:")
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for item in pcb.GetTracks():
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for item in pcb.GetTracks():
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if type(item) is VIA:
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if type(item) is VIA:
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@ -19,7 +22,7 @@ for item in pcb.GetTracks():
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pos = item.GetPosition()
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pos = item.GetPosition()
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drill = item.GetDrillValue()
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drill = item.GetDrillValue()
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width = item.GetWidth()
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width = item.GetWidth()
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print " * Via: %s - %f/%f "%(ToUnits(pos),ToUnits(drill),ToUnits(width))
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print(" * Via: %s - %f/%f " % (ToUnits(pos), ToUnits(drill), ToUnits(width)))
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elif type(item) is TRACK:
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elif type(item) is TRACK:
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@ -27,40 +30,39 @@ for item in pcb.GetTracks():
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end = item.GetEnd()
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end = item.GetEnd()
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width = item.GetWidth()
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width = item.GetWidth()
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print " * Track: %s to %s, width %f" % (ToUnits(start),ToUnits(end),ToUnits(width))
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print(" * Track: %s to %s, width %f" % (ToUnits(start), ToUnits(end), ToUnits(width)))
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else:
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else:
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print "Unknown type %s" % type(item)
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print("Unknown type %s" % type(item))
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print ""
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print("")
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print "LIST DRAWINGS:"
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print("LIST DRAWINGS:")
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for item in pcb.GetDrawings():
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for item in pcb.GetDrawings():
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if type(item) is TEXTE_PCB:
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if type(item) is TEXTE_PCB:
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print "* Text: '%s' at %s"%(item.GetText(), item.GetPosition())
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print("* Text: '%s' at %s" % (item.GetText(), item.GetPosition()))
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elif type(item) is DRAWSEGMENT:
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elif type(item) is DRAWSEGMENT:
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print "* Drawing: %s"%item.GetShapeStr() # dir(item)
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print("* Drawing: %s" % item.GetShapeStr()) # dir(item)
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else:
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else:
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print type(item)
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print(type(item))
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print ""
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print("")
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print "LIST MODULES:"
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print("LIST MODULES:")
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for module in pcb.GetModules():
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for module in pcb.GetModules():
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print "* Module: %s at %s"%(module.GetReference(), ToUnits(module.GetPosition()))
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print("* Module: %s at %s" % (module.GetReference(), ToUnits(module.GetPosition())))
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print ""
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print("")
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print "Nets cnt: ", pcb.GetNetCount()
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print("Nets cnt: ", pcb.GetNetCount())
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print "track w cnt:",len(pcb.GetTrackWidthList())
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print("track w cnt:", len(pcb.GetTrackWidthList()))
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print "via s cnt:",len(pcb.GetViasDimensionsList())
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print("via s cnt:", len(pcb.GetViasDimensionsList()))
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print ""
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print("")
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print "LIST ZONES:", pcb.GetAreaCount()
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print("LIST ZONES:", pcb.GetAreaCount())
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for idx in range(0, pcb.GetAreaCount()):
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for idx in range(0, pcb.GetAreaCount()):
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zone=pcb.GetArea(idx)
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zone=pcb.GetArea(idx)
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print "zone:", idx, "priority:", zone.GetPriority(), "netname", zone.GetNetname()
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print("zone:", idx, "priority:", zone.GetPriority(), "netname", zone.GetNetname())
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print ""
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print "NetClasses:", pcb.GetNetClasses().GetCount(),
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print("")
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print("NetClasses:", pcb.GetNetClasses().GetCount())
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@ -1,11 +1,11 @@
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from __future__ import print_function
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import pcbnew
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import pcbnew
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pcb = pcbnew.GetBoard()
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pcb = pcbnew.GetBoard()
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for m in pcb.GetModules():
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for m in pcb.GetModules():
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print m.GetPosition()
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print(m.GetPosition())
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for p in m.Pads():
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for p in m.Pads():
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print "p=>",p.GetPosition(),p.GetName()
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print("p=>", p.GetPosition(), p.GetName())
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print p.GetPosition()
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print(p.GetPosition())
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@ -1,8 +1,10 @@
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from __future__ import print_function
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import pcbnew
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import pcbnew
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pcb = pcbnew.GetBoard()
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pcb = pcbnew.GetBoard()
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for m in pcb.GetModules():
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for m in pcb.GetModules():
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print m.GetReference(),"(",m.GetValue(),") at ", m.GetPosition()
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print(m.GetReference(), "(", m.GetValue(), ") at ", m.GetPosition())
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for p in m.Pads():
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for p in m.Pads():
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print " pad",p.GetName(), "at",p.GetPosition()
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print(" pad", p.GetName(), "at", p.GetPosition())
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@ -7,42 +7,41 @@ class TestPCBLoad(unittest.TestCase):
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def setUp(self):
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def setUp(self):
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self.pcb = pcbnew.LoadBoard("data/complex_hierarchy.kicad_pcb")
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self.pcb = pcbnew.LoadBoard("data/complex_hierarchy.kicad_pcb")
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def test_pcb_load(self):
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def test_pcb_load(self):
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self.assertNotEqual(self.pcb,None)
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self.assertNotEqual(self.pcb,None)
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def test_pcb_track_count(self):
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def test_pcb_track_count(self):
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tracks = list(self.pcb.GetTracks())
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tracks = list(self.pcb.GetTracks())
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self.assertEqual(len(tracks),361)
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self.assertEqual(len(tracks),361)
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def test_pcb_modules(self):
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def test_pcb_modules(self):
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modules = list(self.pcb.GetModules())
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modules = list(self.pcb.GetModules())
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self.assertEqual(len(modules), 72)
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self.assertEqual(len(modules), 72)
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def test_pcb_module_references(self):
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def test_pcb_module_references(self):
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board_refs = list(module.GetReference() for
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board_refs = list(module.GetReference() for
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module in self.pcb.GetModules())
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module in self.pcb.GetModules())
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known_refs = [u'P1', u'P3', u'C2', u'C1', u'D1', u'Q3', u'Q5', u'Q7',
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known_refs = [u'P1', u'P3', u'C2', u'C1', u'D1', u'Q3', u'Q5', u'Q7',
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u'Q6', u'Q1', u'Q2', u'Q4', u'Q8', u'P2', u'U1', u'U4',
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u'Q6', u'Q1', u'Q2', u'Q4', u'Q8', u'P2', u'U1', u'U4',
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u'P4', u'P5', u'P6', u'U3', u'R9', u'R15', u'RV1', u'RV2',
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u'P4', u'P5', u'P6', u'U3', u'R9', u'R15', u'RV1', u'RV2',
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u'C3', u'C4', u'C5', u'C6', u'C7', u'C8', u'C9', u'D2',
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u'C3', u'C4', u'C5', u'C6', u'C7', u'C8', u'C9', u'D2',
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u'D3', u'D4', u'D5', u'D6', u'D7', u'R3', u'R4', u'R5',
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u'D3', u'D4', u'D5', u'D6', u'D7', u'R3', u'R4', u'R5',
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u'R6', u'R7', u'R8', u'R10', u'R11', u'R12', u'R13',
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u'R6', u'R7', u'R8', u'R10', u'R11', u'R12', u'R13',
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u'R14', u'R16', u'R17', u'R18', u'R19', u'R20', u'R21',
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u'R14', u'R16', u'R17', u'R18', u'R19', u'R20', u'R21',
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u'R22', u'MIRE', u'C10', u'C11',
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u'R22', u'MIRE', u'C10', u'C11',
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u'U2', u'C14', u'C12', u'R23', u'R24', u'D9', u'D8', u'R25',
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u'U2', u'C14', u'C12', u'R23', u'R24', u'D9', u'D8', u'R25',
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u'R26', u'R27', u'R28']
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u'R26', u'R27', u'R28']
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for ref in known_refs:
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self.assertTrue(ref in board_refs)
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for ref in known_refs:
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self.assertTrue(ref in board_refs)
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def test_pcb_netcount(self):
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def test_pcb_netcount(self):
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self.assertEqual(self.pcb.GetNetCount(),51)
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self.assertEqual(self.pcb.GetNetCount(),51)
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#def test_interactive(self):
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#def test_interactive(self):
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# code.interact(local=locals())
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# code.interact(local=locals())
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if __name__ == '__main__':
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if __name__ == '__main__':
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unittest.main()
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unittest.main()
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