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Pcbnew BOARD object encapsulation improvements.

This commit is contained in:
Wayne Stambaugh 2013-01-09 13:52:44 -05:00
parent 8b6d5cb42f
commit 8a5ea7ec0d
15 changed files with 181 additions and 97 deletions
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2
pcbnew/autorouter/solve.cpp
View File

@ -365,7 +365,7 @@ int PCB_EDIT_FRAME::Solve( wxDC* DC, int aLayersCount )
AppendMsgPanel( wxT( "Ok" ), msg, GREEN );
msg.Printf( wxT( "%d" ), nbunsucces );
AppendMsgPanel( wxT( "Fail" ), msg, RED );
msg.Printf( wxT( " %d" ), GetBoard()->m_NbNoconnect );
msg.Printf( wxT( " %d" ), GetBoard()->GetUnconnectedNetCount() );
AppendMsgPanel( wxT( "Not Connected" ), msg, CYAN );
/* Delete routing from display. */

52
pcbnew/class_board.cpp
View File

@ -66,8 +66,8 @@ BOARD::BOARD() :
m_Status_Pcb = 0; // Status word: bit 1 = calculate.
SetColorsSettings( &g_ColorsSettings );
m_NbNodes = 0; // Number of connected pads.
m_NbNoconnect = 0; // Number of unconnected nets.
m_nodeCount = 0; // Number of connected pads.
m_unconnectedNetCount = 0; // Number of unconnected nets.
m_CurrentZoneContour = NULL; // This ZONE_CONTAINER handle the
// zone contour currently in progress
@ -86,8 +86,8 @@ BOARD::BOARD() :
m_NetClasses.GetDefault()->SetDescription( _( "This is the default net class." ) );
m_ViaSizeSelector = 0;
m_TrackWidthSelector = 0;
m_viaSizeIndex = 0;
m_trackWidthIndex = 0;
/* Dick 5-Feb-2012: this seems unnecessary. I don't believe the comment
near line 70 of class_netclass.cpp. I stepped through with debugger.
@ -258,7 +258,7 @@ bool BOARD::SetCurrentNetClass( const wxString& aNetClassName )
if( netClass == NULL )
netClass = m_NetClasses.GetDefault();
m_CurrentNetClassName = netClass->GetName();
m_currentNetClassName = netClass->GetName();
// Initialize others values:
if( m_ViasDimensionsList.size() == 0 )
@ -287,11 +287,11 @@ bool BOARD::SetCurrentNetClass( const wxString& aNetClassName )
m_TrackWidthList[0] = netClass->GetTrackWidth();
if( m_ViaSizeSelector >= m_ViasDimensionsList.size() )
m_ViaSizeSelector = m_ViasDimensionsList.size();
if( m_viaSizeIndex >= m_ViasDimensionsList.size() )
m_viaSizeIndex = m_ViasDimensionsList.size();
if( m_TrackWidthSelector >= m_TrackWidthList.size() )
m_TrackWidthSelector = m_TrackWidthList.size();
if( m_trackWidthIndex >= m_TrackWidthList.size() )
m_trackWidthIndex = m_TrackWidthList.size();
return lists_sizes_modified;
}
@ -329,7 +329,7 @@ int BOARD::GetSmallestClearanceValue()
int BOARD::GetCurrentMicroViaSize()
{
NETCLASS* netclass = m_NetClasses.Find( m_CurrentNetClassName );
NETCLASS* netclass = m_NetClasses.Find( m_currentNetClassName );
return netclass->GetuViaDiameter();
}
@ -337,7 +337,7 @@ int BOARD::GetCurrentMicroViaSize()
int BOARD::GetCurrentMicroViaDrill()
{
NETCLASS* netclass = m_NetClasses.Find( m_CurrentNetClassName );
NETCLASS* netclass = m_NetClasses.Find( m_currentNetClassName );
return netclass->GetuViaDrill();
}
@ -925,15 +925,9 @@ int BOARD::GetNumSegmZone() const
}
unsigned BOARD::GetNoconnectCount() const
{
return m_NbNoconnect;
}
unsigned BOARD::GetNodesCount() const
{
return m_NbNodes;
return m_nodeCount;
}
@ -1053,10 +1047,10 @@ void BOARD::DisplayInfo( EDA_DRAW_FRAME* frame )
txt.Printf( wxT( "%d" ), GetRatsnestsCount() );
frame->AppendMsgPanel( _( "Links" ), txt, DARKGREEN );
txt.Printf( wxT( "%d" ), GetRatsnestsCount() - GetNoconnectCount() );
txt.Printf( wxT( "%d" ), GetRatsnestsCount() - GetUnconnectedNetCount() );
frame->AppendMsgPanel( _( "Connect" ), txt, DARKGREEN );
txt.Printf( wxT( "%d" ), GetNoconnectCount() );
txt.Printf( wxT( "%d" ), GetUnconnectedNetCount() );
frame->AppendMsgPanel( _( "Unconnected" ), txt, BLUE );
}
}
@ -2238,6 +2232,24 @@ TRACK* BOARD::CreateLockPoint( wxPoint& aPosition, TRACK* aSegment, PICKED_ITEMS
}
void BOARD::SetViaSizeIndex( unsigned aIndex )
{
if( aIndex >= m_ViasDimensionsList.size() )
m_viaSizeIndex = m_ViasDimensionsList.size();
else
m_viaSizeIndex = aIndex;
}
void BOARD::SetTrackWidthIndex( unsigned aIndex )
{
if( m_trackWidthIndex >= m_TrackWidthList.size() )
m_trackWidthIndex = m_TrackWidthList.size();
else
m_trackWidthIndex = aIndex;
}
#if defined(DEBUG)
void BOARD::Show( int nestLevel, std::ostream& os ) const

129
pcbnew/class_board.h
View File

@ -173,30 +173,29 @@ class BOARD : public BOARD_ITEM
private:
/// the board filename
wxString m_fileName;
wxString m_fileName;
// @todo: switch to boost:ptr_vector, and change ~BOARD()
typedef std::vector<MARKER_PCB*> MARKERS;
/// MARKER_PCBs for clearance problems, owned by pointer.
MARKERS m_markers;
MARKERS m_markers;
// @todo: switch to boost::ptr_vector, and change ~BOARD()
typedef std::vector<ZONE_CONTAINER*> ZONE_CONTAINERS;
/// edge zone descriptors, owned by pointer.
ZONE_CONTAINERS m_ZoneDescriptorList;
ZONE_CONTAINERS m_ZoneDescriptorList;
LAYER m_Layer[LAYER_COUNT];
LAYER m_Layer[LAYER_COUNT];
// if true m_highLight_NetCode is used
HIGH_LIGHT_INFO m_highLight; // current high light data
HIGH_LIGHT_INFO m_highLightPrevious; // a previously stored high light data
HIGH_LIGHT_INFO m_highLight; // current high light data
HIGH_LIGHT_INFO m_highLightPrevious; // a previously stored high light data
int m_fileFormatVersionAtLoad; ///< the version in the *.brd header on first line
int m_fileFormatVersionAtLoad; ///< the version loaded from the file
EDA_RECT m_BoundingBox;
NETINFO_LIST m_NetInfo; ///< net info list (name, design constraints ..
EDA_RECT m_BoundingBox;
NETINFO_LIST m_NetInfo; ///< net info list (name, design constraints ..
BOARD_DESIGN_SETTINGS m_designSettings;
ZONE_SETTINGS m_zoneSettings;
@ -206,7 +205,24 @@ private:
PCB_PLOT_PARAMS m_plotOptions;
/// Position of the origin axis, which is used in exports mostly
wxPoint m_originAxisPosition;
wxPoint m_originAxisPosition;
/// Number of pads connected to the current net.
int m_nodeCount;
/// Number of unconnected nets in the current rats nest.
int m_unconnectedNetCount;
/// Current net class name used to display netclass info.
/// This is also the last used netclass after starting a track.
wxString m_currentNetClassName;
/// Index for #m_ViaSizeList to select the current via size.
/// 0 is the index selection of the default value Netclass
unsigned m_viaSizeIndex;
// Index for m_TrackWidthList to select the value.
unsigned m_trackWidthIndex;
/**
* Function chainMarkedSegments
@ -232,12 +248,6 @@ public:
/// Flags used in ratsnest calculation and update.
int m_Status_Pcb;
/// Active pads (pads attached to a net ) count.
int m_NbNodes;
/// Active ratsnest count (ratsnests not already connected by tracks)
int m_NbNoconnect;
DLIST<BOARD_ITEM> m_Drawings; // linked list of lines & texts
DLIST<MODULE> m_Modules; // linked list of MODULEs
DLIST<TRACK> m_Track; // linked list of TRACKs and SEGVIAs
@ -255,10 +265,6 @@ public:
/// List of current netclasses. There is always the default netclass.
NETCLASSES m_NetClasses;
/// Current net class name used to display netclass info.
/// This is also the last used netclass after starting a track.
wxString m_CurrentNetClassName;
// handling of vias and tracks size:
// the first value is always the value of the current NetClass
// The others values are extra values
@ -271,13 +277,6 @@ public:
// The first value is the current netclass track width
std::vector <int> m_TrackWidthList;
/// Index for m_ViaSizeList to select the value.
/// 0 is the index selection of the default value Netclass
unsigned m_ViaSizeSelector;
// Index for m_TrackWidthList to select the value.
unsigned m_TrackWidthSelector;
BOARD();
~BOARD();
@ -672,8 +671,6 @@ public:
/** Calculate the zone segment count */
int GetNumSegmZone() const;
unsigned GetNoconnectCount() const; // Return the number of missing links.
/**
* Function GetNumRatsnests
* @return int - The number of rats
@ -690,6 +687,42 @@ public:
*/
unsigned GetNodesCount() const;
/**
* Function SetNodeCount
* set the number of nodes of the current net to \a aCount.
*
* @param aCount is the number of nodes attached to the current net.
*/
void SetNodeCount( unsigned aCount ) { m_nodeCount = aCount; }
/**
* Function GetUnconnectedNetCount
* @return the number of unconnected nets in the current rats nest.
*/
unsigned GetUnconnectedNetCount() const { return m_unconnectedNetCount; }
/**
* Function SetUnconnectedNetCount
* sets the number of unconnected nets in the current rats nest to \a aCount.
*
* @param aCount is the number of unconneceted nets in the current rats nest.
*/
void SetUnconnectedNetCount( unsigned aCount ) { m_unconnectedNetCount = aCount; }
/**
* Function SetCurrentNetClassName
* sets the current net class name to \a aName.
*
* @param aName is a reference to a wxString object containing the current net class name.
*/
void SetCurrentNetClassName( const wxString& aName ) { m_currentNetClassName = aName; }
/**
* Function GetCurrentNetClassName
* @return the current net class name.
*/
const wxString& GetCurrentNetClassName() const { return m_currentNetClassName; }
/**
* Function GetPadCount
* @return the number of pads in board
@ -877,6 +910,20 @@ public:
*/
int GetSmallestClearanceValue();
/**
* Function GetTrackWidthIndex
* @return the current track width list index.
*/
unsigned GetTrackWidthIndex() const { return m_trackWidthIndex; }
/**
* Function SetTrackWidthIndex
* sets the current track width list index to \a aIndex.
*
* @param aIndex is the track width list index.
*/
void SetTrackWidthIndex( unsigned aIndex );
/**
* Function GetCurrentTrackWidth
* @return the current track width, according to the selected options
@ -885,9 +932,23 @@ public:
*/
int GetCurrentTrackWidth() const
{
return m_TrackWidthList[m_TrackWidthSelector];
return m_TrackWidthList[m_trackWidthIndex];
}
/**
* Function GetViaSizeIndex
* @return the current via size list index.
*/
unsigned GetViaSizeIndex() const { return m_viaSizeIndex; }
/**
* Function SetViaSizeIndex
* sets the current via size list index to \a aIndex.
*
* @param aIndex is the via size list index.
*/
void SetViaSizeIndex( unsigned aIndex );
/**
* Function GetCurrentViaSize
* @return the current via size, according to the selected options
@ -896,7 +957,7 @@ public:
*/
int GetCurrentViaSize()
{
return m_ViasDimensionsList[m_ViaSizeSelector].m_Diameter;
return m_ViasDimensionsList[m_viaSizeIndex].m_Diameter;
}
/**
@ -907,8 +968,8 @@ public:
*/
int GetCurrentViaDrill()
{
return m_ViasDimensionsList[m_ViaSizeSelector].m_Drill > 0 ?
m_ViasDimensionsList[m_ViaSizeSelector].m_Drill : -1;
return m_ViasDimensionsList[m_viaSizeIndex].m_Drill > 0 ?
m_ViasDimensionsList[m_viaSizeIndex].m_Drill : -1;
}
/**

2
pcbnew/class_netinfolist.cpp
View File

@ -120,7 +120,7 @@ void NETINFO_LIST::buildListOfNets()
last_pad = pad;
}
m_Parent->m_NbNodes = nodes_count;
m_Parent->SetNodeCount( nodes_count );
m_Parent->SynchronizeNetsAndNetClasses( );

4
pcbnew/connect.cpp
View File

@ -791,6 +791,7 @@ void PCB_BASE_FRAME::TestNetConnection( wxDC* aDC, int aNetCode )
// Display results
int net_notconnected_count = 0;
NETINFO_ITEM* net = m_Pcb->FindNet( aNetCode );
if( net ) // Should not occur, but ...
{
for( unsigned ii = net->m_RatsnestStartIdx; ii < net->m_RatsnestEndIdx; ii++ )
@ -798,8 +799,9 @@ void PCB_BASE_FRAME::TestNetConnection( wxDC* aDC, int aNetCode )
if( m_Pcb->m_FullRatsnest[ii].IsActive() )
net_notconnected_count++;
}
msg.Printf( wxT( "links %d nc %d net:nc %d" ),
m_Pcb->GetRatsnestsCount(), m_Pcb->GetNoconnectCount(),
m_Pcb->GetRatsnestsCount(), m_Pcb->GetUnconnectedNetCount(),
net_notconnected_count );
}
else

14
pcbnew/dialogs/dialog_global_edit_tracks_and_vias.cpp
View File

@ -49,17 +49,18 @@ void DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS::MyInit()
NETCLASSES& netclasses = board->m_NetClasses;
NETINFO_ITEM* net = board->FindNet( m_Netcode );
NETCLASS* netclass = netclasses.GetDefault();
if( net )
{
m_CurrentNetName->SetLabel( net->GetNetname() );
m_CurrentNetclassName->SetLabel( board->m_CurrentNetClassName );
netclass = netclasses.Find( board->m_CurrentNetClassName );
m_CurrentNetclassName->SetLabel( board->GetCurrentNetClassName() );
netclass = netclasses.Find( board->GetCurrentNetClassName() );
}
/* Disable the option "copy current to net" if we have only default netclass values
* i.e. when m_TrackWidthSelector and m_ViaSizeSelector are set to 0
*/
if( !board->m_TrackWidthSelector && !board->m_ViaSizeSelector )
if( !board->GetTrackWidthIndex() && !board->GetViaSizeIndex() )
{
m_Net2CurrValueButton->Enable( false );
m_OptionID = ID_NETCLASS_VALUES_TO_CURRENT_NET;
@ -75,19 +76,22 @@ void DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS::MyInit()
int value = netclass->GetTrackWidth(); // Display track width
msg = ReturnStringFromValue( g_UserUnit, value, true );
m_gridDisplayCurrentSettings->SetCellValue( 0, 0, msg );
if( board->m_TrackWidthSelector )
if( board->GetTrackWidthIndex() )
{
value = board->GetCurrentTrackWidth();
msg = ReturnStringFromValue( g_UserUnit, value, true );
}
else
msg = _( "Default" );
m_gridDisplayCurrentSettings->SetCellValue( 1, 0, msg );
value = netclass->GetViaDiameter(); // Display via diameter
msg = ReturnStringFromValue( g_UserUnit, value, true );
m_gridDisplayCurrentSettings->SetCellValue( 0, 1, msg );
if( board->m_ViaSizeSelector )
if( board->GetViaSizeIndex() )
{
value = board->GetCurrentViaSize();
msg = ReturnStringFromValue( g_UserUnit, value, true );

12
pcbnew/event_handlers_tracks_vias_sizes.cpp
View File

@ -41,8 +41,8 @@ void PCB_EDIT_FRAME::Tracks_and_Vias_Size_Event( wxCommandEvent& event )
case ID_POPUP_PCB_SELECT_USE_NETCLASS_VALUES:
GetDesignSettings().m_UseConnectedTrackWidth = false;
GetBoard()->m_TrackWidthSelector = 0;
GetBoard()->m_ViaSizeSelector = 0;
GetBoard()->SetTrackWidthIndex( 0 );
GetBoard()->SetViaSizeIndex( 0 );
break;
case ID_POPUP_PCB_SELECT_AUTO_WIDTH:
@ -69,7 +69,7 @@ void PCB_EDIT_FRAME::Tracks_and_Vias_Size_Event( wxCommandEvent& event )
m_canvas->MoveCursorToCrossHair();
GetDesignSettings().m_UseConnectedTrackWidth = false;
ii = id - ID_POPUP_PCB_SELECT_WIDTH1;
GetBoard()->m_TrackWidthSelector = ii;
GetBoard()->SetTrackWidthIndex( ii );
break;
case ID_POPUP_PCB_SELECT_VIASIZE1: // this is the default Netclass selection
@ -91,17 +91,17 @@ void PCB_EDIT_FRAME::Tracks_and_Vias_Size_Event( wxCommandEvent& event )
// select the new current value for via size (via diameter)
m_canvas->MoveCursorToCrossHair();
ii = id - ID_POPUP_PCB_SELECT_VIASIZE1;
GetBoard()->m_ViaSizeSelector = ii;
GetBoard()->SetViaSizeIndex( ii );
break;
case ID_AUX_TOOLBAR_PCB_TRACK_WIDTH:
ii = m_SelTrackWidthBox->GetCurrentSelection();
GetBoard()->m_TrackWidthSelector = ii;
GetBoard()->SetTrackWidthIndex( ii );
break;
case ID_AUX_TOOLBAR_PCB_VIA_SIZE:
ii = m_SelViaSizeBox->GetCurrentSelection();
GetBoard()->m_ViaSizeSelector = ii;
GetBoard()->SetViaSizeIndex( ii );
break;
default:

10
pcbnew/hotkeys_board_editor.cpp
View File

@ -170,8 +170,8 @@ void PCB_EDIT_FRAME::OnHotKey( wxDC* aDC, int aHotkeyCode, const wxPoint& aPosit
if( GetCanvas()->IsMouseCaptured() )
GetCanvas()->CallMouseCapture( aDC, wxDefaultPosition, false );
GetBoard()->m_TrackWidthSelector = ( GetBoard()->m_TrackWidthSelector + 1 ) %
GetBoard()->m_TrackWidthList.size();
GetBoard()->SetTrackWidthIndex( ( GetBoard()->GetTrackWidthIndex() + 1 ) %
GetBoard()->m_TrackWidthList.size() );
if( GetCanvas()->IsMouseCaptured() )
GetCanvas()->CallMouseCapture( aDC, wxDefaultPosition, false );
@ -182,10 +182,10 @@ void PCB_EDIT_FRAME::OnHotKey( wxDC* aDC, int aHotkeyCode, const wxPoint& aPosit
if( GetCanvas()->IsMouseCaptured() )
GetCanvas()->CallMouseCapture( aDC, wxDefaultPosition, false );
if( GetBoard()->m_TrackWidthSelector == 0 )
GetBoard()->m_TrackWidthSelector = GetBoard()->m_TrackWidthList.size();
if( GetBoard()->GetTrackWidthIndex() == 0 )
GetBoard()->SetTrackWidthIndex( GetBoard()->m_TrackWidthList.size() );
GetBoard()->m_TrackWidthSelector--;
GetBoard()->SetTrackWidthIndex( GetBoard()->GetTrackWidthIndex() - 1 );
if( GetCanvas()->IsMouseCaptured() )
GetCanvas()->CallMouseCapture( aDC, wxDefaultPosition, false );

2
pcbnew/kicad_plugin.cpp
View File

@ -400,7 +400,7 @@ void PCB_IO::format( BOARD* aBoard, int aNestLevel ) const
m_out->Print( aNestLevel, "(general\n" );
m_out->Print( aNestLevel+1, "(links %d)\n", aBoard->GetRatsnestsCount() );
m_out->Print( aNestLevel+1, "(no_connects %d)\n", aBoard->m_NbNoconnect );
m_out->Print( aNestLevel+1, "(no_connects %d)\n", aBoard->GetUnconnectedNetCount() );
// Write Bounding box info
m_out->Print( aNestLevel+1, "(area %s %s %s %s)\n",

4
pcbnew/legacy_plugin.cpp
View File

@ -454,7 +454,7 @@ void LEGACY_PLUGIN::loadGENERAL()
else if( TESTLINE( "NoConn" ) )
{
int tmp = intParse( line + SZ( "NoConn" ) );
m_board->m_NbNoconnect = tmp;
m_board->SetUnconnectedNetCount( tmp );
}
else if( TESTLINE( "Di" ) )
@ -2902,7 +2902,7 @@ void LEGACY_PLUGIN::saveGENERAL( const BOARD* aBoard ) const
fprintf( m_fp, "VisibleLayers %08X\n", aBoard->GetVisibleLayers() );
fprintf( m_fp, "Links %d\n", aBoard->GetRatsnestsCount() );
fprintf( m_fp, "NoConn %d\n", aBoard->m_NbNoconnect );
fprintf( m_fp, "NoConn %d\n", aBoard->GetUnconnectedNetCount() );
// Write Bounding box info
EDA_RECT bbbox = ((BOARD*)aBoard)->ComputeBoundingBox();

8
pcbnew/onrightclick.cpp
View File

@ -796,7 +796,7 @@ void PCB_EDIT_FRAME::createPopUpMenuForFpPads( D_PAD* Pad, wxMenu* menu )
if( flags ) // Currently in edit, no others commands possible
return;
if( GetBoard()->m_CurrentNetClassName != Pad->GetNetClassName() )
if( GetBoard()->GetCurrentNetClassName() != Pad->GetNetClassName() )
{
GetBoard()->SetCurrentNetClass( Pad->GetNetClassName() );
updateTraceWidthSelectBox();
@ -919,9 +919,9 @@ static wxMenu* Append_Track_Width_List( BOARD* aBoard )
if( aBoard->GetDesignSettings().m_UseConnectedTrackWidth )
trackwidth_menu->Check( ID_POPUP_PCB_SELECT_AUTO_WIDTH, true );
if( aBoard->m_ViaSizeSelector != 0
|| aBoard->m_TrackWidthSelector != 0
|| aBoard->GetDesignSettings().m_UseConnectedTrackWidth )
if( aBoard->GetViaSizeIndex() != 0
|| aBoard->GetTrackWidthIndex() != 0
|| aBoard->GetDesignSettings().m_UseConnectedTrackWidth )
trackwidth_menu->Append( ID_POPUP_PCB_SELECT_USE_NETCLASS_VALUES,
_( "Use Netclass Values" ),
_( "Use track and via sizes from their Netclass values" ),

2
pcbnew/pcb_parser.cpp
View File

@ -499,7 +499,7 @@ void PCB_PARSER::parseGeneralSection() throw( IO_ERROR, PARSE_ERROR )
break;
case T_no_connects:
m_board->m_NbNoconnect = parseInt( "no connect count" );
m_board->SetUnconnectedNetCount( parseInt( "no connect count" ) );
NeedRIGHT();
break;

12
pcbnew/ratsnest.cpp
View File

@ -201,7 +201,7 @@ void PCB_BASE_FRAME::Build_Board_Ratsnest()
D_PAD* pad;
int noconn;
m_Pcb->m_NbNoconnect = 0;
m_Pcb->SetUnconnectedNetCount( 0 );
m_Pcb->m_FullRatsnest.clear();
@ -244,7 +244,7 @@ void PCB_BASE_FRAME::Build_Board_Ratsnest()
net->m_RatsnestEndIdx = m_Pcb->GetRatsnestsCount();
}
m_Pcb->m_NbNoconnect = noconn;
m_Pcb->SetUnconnectedNetCount( noconn );
m_Pcb->m_Status_Pcb |= LISTE_RATSNEST_ITEM_OK;
// Update the ratsnest display option (visible/invisible) flag
@ -482,13 +482,17 @@ void PCB_BASE_FRAME::TestForActiveLinksInRatsnest( int aNetCode )
}
}
m_Pcb->m_NbNoconnect = 0;
m_Pcb->SetUnconnectedNetCount( 0 );
unsigned cnt = 0;
for( unsigned ii = 0; ii < m_Pcb->GetRatsnestsCount(); ii++ )
{
if( m_Pcb->m_FullRatsnest[ii].IsActive() )
m_Pcb->m_NbNoconnect++;
cnt++;
}
m_Pcb->SetUnconnectedNetCount( cnt );
}

13
pcbnew/tool_pcb.cpp
View File

@ -621,9 +621,10 @@ void PCB_EDIT_FRAME::updateTraceWidthSelectBox()
m_SelTrackWidthBox->Append( msg );
}
if( GetBoard()->m_TrackWidthSelector >= GetBoard()->m_TrackWidthList.size() )
GetBoard()->m_TrackWidthSelector = 0;
m_SelTrackWidthBox->SetSelection( GetBoard()->m_TrackWidthSelector );
if( GetBoard()->GetTrackWidthIndex() >= GetBoard()->m_TrackWidthList.size() )
GetBoard()->SetTrackWidthIndex( 0 );
m_SelTrackWidthBox->SetSelection( GetBoard()->GetTrackWidthIndex() );
}
@ -651,10 +652,10 @@ void PCB_EDIT_FRAME::updateViaSizeSelectBox()
m_SelViaSizeBox->Append( msg );
}
if( GetBoard()->m_ViaSizeSelector >= GetBoard()->m_ViasDimensionsList.size() )
GetBoard()->m_ViaSizeSelector = 0;
if( GetBoard()->GetViaSizeIndex() >= GetBoard()->m_ViasDimensionsList.size() )
GetBoard()->SetViaSizeIndex( 0 );
m_SelViaSizeBox->SetSelection( GetBoard()->m_ViaSizeSelector );
m_SelViaSizeBox->SetSelection( GetBoard()->GetViaSizeIndex() );
}

12
pcbnew/toolbars_update_user_interface.cpp
View File

@ -55,13 +55,13 @@ void PCB_EDIT_FRAME::OnUpdateSelectTrackWidth( wxUpdateUIEvent& aEvent )
{
if( aEvent.GetId() == ID_AUX_TOOLBAR_PCB_TRACK_WIDTH )
{
if( m_SelTrackWidthBox->GetSelection() != (int) GetBoard()->m_TrackWidthSelector )
m_SelTrackWidthBox->SetSelection( GetBoard()->m_TrackWidthSelector );
if( m_SelTrackWidthBox->GetSelection() != (int) GetBoard()->GetTrackWidthIndex() )
m_SelTrackWidthBox->SetSelection( GetBoard()->GetTrackWidthIndex() );
}
else
{
bool check = ( ( ( ID_POPUP_PCB_SELECT_WIDTH1 +
(int) GetBoard()->m_TrackWidthSelector ) == aEvent.GetId() ) &&
(int) GetBoard()->GetTrackWidthIndex() ) == aEvent.GetId() ) &&
!GetDesignSettings().m_UseConnectedTrackWidth );
aEvent.Check( check );
}
@ -80,13 +80,13 @@ void PCB_EDIT_FRAME::OnUpdateSelectViaSize( wxUpdateUIEvent& aEvent )
if( aEvent.GetId() == ID_AUX_TOOLBAR_PCB_VIA_SIZE )
{
if( m_SelViaSizeBox->GetSelection() != (int) GetBoard()->m_ViaSizeSelector )
m_SelViaSizeBox->SetSelection( GetBoard()->m_ViaSizeSelector );
if( m_SelViaSizeBox->GetSelection() != (int) GetBoard()->GetViaSizeIndex() )
m_SelViaSizeBox->SetSelection( GetBoard()->GetViaSizeIndex() );
}
else
{
bool check = ( ( ( ID_POPUP_PCB_SELECT_VIASIZE1 +
(int) GetBoard()->m_ViaSizeSelector ) == aEvent.GetId() ) &&
(int) GetBoard()->GetViaSizeIndex() ) == aEvent.GetId() ) &&
!GetDesignSettings().m_UseConnectedTrackWidth );
aEvent.Check( check );