Add a bunch more zone fill and DRC regression tests.
Also tries to fix a compile issue on gcc.
This commit is contained in:
Jeff Young
parent
b8bb04c432
commit
8d6cd4ad99
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"no_connect_connected": "error",
|
||||
"no_connect_dangling": "error",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "error",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
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|
||||
"common": {
|
||||
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|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
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|
||||
"filename": "pic_programmer.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
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|
||||
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|
||||
{
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
{
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
"spice_adjust_passive_values": false,
|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
"sheets": [
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
[
|
||||
"00000000-0000-0000-0000-00004804a5e2",
|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,558 @@
|
|||
(kicad_pcb (version 20200829) (generator pcbnew)
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
)
|
||||
|
||||
(paper "A4")
|
||||
(layers
|
||||
(0 "F.Cu" signal)
|
||||
(31 "B.Cu" signal)
|
||||
(32 "B.Adhes" user)
|
||||
(33 "F.Adhes" user)
|
||||
(34 "B.Paste" user)
|
||||
(35 "F.Paste" user)
|
||||
(36 "B.SilkS" user)
|
||||
(37 "F.SilkS" user)
|
||||
(38 "B.Mask" user)
|
||||
(39 "F.Mask" user)
|
||||
(40 "Dwgs.User" user)
|
||||
(41 "Cmts.User" user)
|
||||
(42 "Eco1.User" user)
|
||||
(43 "Eco2.User" user)
|
||||
(44 "Edge.Cuts" user)
|
||||
(45 "Margin" user)
|
||||
(46 "B.CrtYd" user)
|
||||
(47 "F.CrtYd" user)
|
||||
(48 "B.Fab" user)
|
||||
(49 "F.Fab" user)
|
||||
)
|
||||
|
||||
(setup
|
||||
(pcbplotparams
|
||||
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|
||||
(usegerberextensions false)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(plotreference true)
|
||||
(plotvalue true)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(scaleselection 1)
|
||||
(outputdirectory "gerbers/")
|
||||
)
|
||||
)
|
||||
|
||||
(property "REVISION" "69")
|
||||
|
||||
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|
||||
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|
||||
|
||||
(module "Generic:Fiducial_rotondo" locked (layer "F.Cu") (tedit 5F5932F4) (tstamp b3504248-f76a-4229-bca9-2bcac3499e3c)
|
||||
(at 99.822 118.364)
|
||||
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|
||||
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|
||||
(zone_connect 0)
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -2.25) (layer "F.SilkS") hide
|
||||
(effects (font (size 0.5 0.5) (thickness 0.125)))
|
||||
(tstamp 1fdabcd1-8845-4fcc-add9-72046aea4ffb)
|
||||
)
|
||||
(fp_text value "Fiducial_Modern_CopperTop" (at 0 2.5) (layer "F.Fab") hide
|
||||
(effects (font (size 0.4 0.4) (thickness 0.1)))
|
||||
(tstamp 1b030bf5-ce07-4512-895d-e6d75aebe053)
|
||||
)
|
||||
(pad "~" smd circle (at 0 0) (size 2 2) (layers "F.Cu" "F.Mask")
|
||||
(solder_mask_margin 1) (clearance 1) (zone_connect 0) (tstamp a6947c38-614a-44c9-870f-a0ea180a795c))
|
||||
)
|
||||
|
||||
(module "Resistor_THT:R_Axial_Power_L20.0mm_W6.4mm_P30.48mm" (layer "F.Cu") (tedit 5F554420) (tstamp e8c25ce9-6330-4d05-b8a3-64362146b70f)
|
||||
(at 131.572 102.87)
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
{
|
||||
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|
||||
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|
||||
}
|
||||
],
|
||||
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|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
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|
||||
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||||
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|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
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|
||||
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|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "error",
|
||||
"no_connect_dangling": "error",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"similar_labels": "warning",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "hole_pad_clearance.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
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|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.2,
|
||||
"via_diameter": 0.6,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
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|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "3volt",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.6,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
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|
||||
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|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Power",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.5,
|
||||
"via_diameter": 0.6,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vmrl": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"drawing": {
|
||||
"default_bus_thickness": 12.0,
|
||||
"default_junction_size": 40.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"default_wire_thickness": 6.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.3
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"net_format_name": "Pcbnew",
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "output/",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"eae8b250-f694-468f-ad9f-c2e3304daf14",
|
||||
""
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,463 @@
|
|||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
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|
||||
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|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 0.8128,
|
||||
"copper_text_size_v": 0.8128,
|
||||
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|
||||
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|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 1,
|
||||
"dimension_units": 0,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
},
|
||||
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|
||||
{
|
||||
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|
||||
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|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
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|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"rule_severities": {
|
||||
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|
||||
"clearance": "error",
|
||||
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|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_too_small": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
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|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"keepout": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
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|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "error",
|
||||
"silk_overlap": "error",
|
||||
"skew_out_of_range": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"via_hole_larger_than_pad": "error",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.2032,
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_annulus": 0.15,
|
||||
"min_via_diameter": 0.6,
|
||||
"solder_mask_clearance": 0.15239999999999998,
|
||||
"solder_mask_min_width": 0.15239999999999998,
|
||||
"solder_paste_clearance": 0.0,
|
||||
"solder_paste_margin_ratio": -0.0
|
||||
},
|
||||
"track_widths": [
|
||||
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|
||||
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|
||||
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|
||||
0.4064,
|
||||
0.508,
|
||||
0.6096,
|
||||
0.8128,
|
||||
1.016,
|
||||
1.27,
|
||||
1.524,
|
||||
1.778,
|
||||
2.032
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
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|
||||
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|
||||
},
|
||||
{
|
||||
"diameter": 0.7,
|
||||
"drill": 0.4
|
||||
},
|
||||
{
|
||||
"diameter": 0.8,
|
||||
"drill": 0.5
|
||||
},
|
||||
{
|
||||
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|
||||
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|
||||
},
|
||||
{
|
||||
"diameter": 1.0,
|
||||
"drill": 0.7
|
||||
}
|
||||
],
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|
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||||
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File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,494 @@
|
|||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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||||
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||||
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||||
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|
||||
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|
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|
||||
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|
||||
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||||
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||||
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|
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"similar_labels": "error",
|
||||
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|
||||
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|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
"meta": {
|
||||
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|
||||
"version": 1
|
||||
},
|
||||
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|
||||
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|
||||
{
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"name": "Default",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
{
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"name": "antenna",
|
||||
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|
||||
"/ANTENNA"
|
||||
],
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
],
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
},
|
||||
"pcbnew": {
|
||||
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|
||||
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|
||||
"idf": "",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
[
|
||||
"285a99a7-a1a2-4aa6-812b-d3c3533a57d7",
|
||||
""
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d8236a8",
|
||||
"battery-protection"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d8260b7",
|
||||
"voltage-regulation"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d825820",
|
||||
"RS485-interface"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d84b44c",
|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,397 @@
|
|||
{
|
||||
"board": {
|
||||
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|
||||
"defaults": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
{
|
||||
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|
||||
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|
||||
}
|
||||
],
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
]
|
||||
],
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"bus_to_net_conflict": "error",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"no_connect_dangling": "error",
|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
(setup
|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
)
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||||
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||||
|
||||
|
||||
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||||
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||||
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|
||||
|
||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
|
||||
(footprint "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" (layer "F.Cu")
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||||
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|
||||
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|
||||
(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
|
||||
(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
|
||||
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|
||||
|
||||
(zone (net 1) (net_name "Net-(R1-Pad1)") (layer "In1.Cu") (tstamp 3f1aa6d3-8c39-415b-b94d-0780428d0aa0) (hatch edge 0.508)
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||||
(connect_pads (clearance 0.508))
|
||||
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|
||||
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|
||||
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|
||||
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|
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||||
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||||
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||||
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||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": true,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.19999999999999998
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [
|
||||
{
|
||||
"gap": 0.0,
|
||||
"via_gap": 0.0,
|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
"drc_exclusions": [
|
||||
"clearance|87150000|140800000|713a642e-4662-4581-a311-4a183ae3a0a4|0e2e2e70-712c-4a91-9883-5badae873369",
|
||||
"courtyards_overlap|102580000|139229999|00000000-0000-0000-0000-00005db27222|00000000-0000-0000-0000-00005e4ffe1e",
|
||||
"courtyards_overlap|102580000|142700000|00000000-0000-0000-0000-00005db270f4|00000000-0000-0000-0000-00005e4ffe1e",
|
||||
"courtyards_overlap|116660000|142900000|00000000-0000-0000-0000-00005db26ea8|00000000-0000-0000-0000-00005db2741b",
|
||||
"courtyards_overlap|126820000|142900000|00000000-0000-0000-0000-00005db272bc|00000000-0000-0000-0000-00005db2741b",
|
||||
"courtyards_overlap|144725000|118017468|00000000-0000-0000-0000-00005d888938|00000000-0000-0000-0000-00005e2b4dc2",
|
||||
"courtyards_overlap|86925000|140617468|00000000-0000-0000-0000-00005db273cf|00000000-0000-0000-0000-00005e2b4dc5"
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "ignore",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "ignore",
|
||||
"silk_overlap": "ignore",
|
||||
"skew_out_of_range": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.01,
|
||||
"min_hole_clearance": 0.0,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_annulus": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.25,
|
||||
0.2,
|
||||
0.4,
|
||||
1.0,
|
||||
2.0
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.85,
|
||||
"drill": 0.4
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": [
|
||||
{
|
||||
"activeLayer": -2,
|
||||
"layers": [
|
||||
3,
|
||||
4,
|
||||
5,
|
||||
6,
|
||||
7,
|
||||
8,
|
||||
9,
|
||||
10,
|
||||
11,
|
||||
12,
|
||||
13,
|
||||
14,
|
||||
15,
|
||||
16,
|
||||
17,
|
||||
18,
|
||||
19,
|
||||
20,
|
||||
21,
|
||||
22,
|
||||
23,
|
||||
24,
|
||||
25,
|
||||
26,
|
||||
27,
|
||||
28,
|
||||
29,
|
||||
30,
|
||||
41,
|
||||
44,
|
||||
49,
|
||||
50
|
||||
],
|
||||
"name": "Fabrication",
|
||||
"renderLayers": [
|
||||
125,
|
||||
126,
|
||||
127,
|
||||
128,
|
||||
129,
|
||||
130,
|
||||
131,
|
||||
133,
|
||||
134,
|
||||
135,
|
||||
136,
|
||||
137,
|
||||
138,
|
||||
139,
|
||||
143,
|
||||
144
|
||||
]
|
||||
}
|
||||
]
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
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|
||||
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|
||||
],
|
||||
[
|
||||
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|
||||
2,
|
||||
0,
|
||||
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|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
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|
||||
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|
||||
1,
|
||||
0,
|
||||
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|
||||
0,
|
||||
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|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
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|
||||
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|
||||
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|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"global_label_dangling": "error",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "error",
|
||||
"net_not_bus_member": "error",
|
||||
"no_connect_connected": "error",
|
||||
"no_connect_dangling": "error",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"similar_labels": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "LoRaNode.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.85,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.25,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "antenna",
|
||||
"nets": [
|
||||
"/ANTENNA"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 1.27,
|
||||
"via_diameter": 0.85,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vmrl": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"drawing": {
|
||||
"default_bus_thickness": 12.0,
|
||||
"default_junction_size": 40.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"default_wire_thickness": 6.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_prefix": "[",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "]",
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.3
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"net_format_name": "",
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "./",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"285a99a7-a1a2-4aa6-812b-d3c3533a57d7",
|
||||
""
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d8236a8",
|
||||
"battery-protection"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d8260b7",
|
||||
"voltage-regulation"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d825820",
|
||||
"RS485-interface"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d84b44c",
|
||||
"I2C-interface"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
|
|
@ -0,0 +1,306 @@
|
|||
(kicad_pcb (version 20190605) (host pcbnew "6.0.0-unknown-7b5b807~86~ubuntu18.04.1")
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
(drawings 4)
|
||||
(tracks 9)
|
||||
(modules 1)
|
||||
(nets 3)
|
||||
)
|
||||
|
||||
(page "A4")
|
||||
(layers
|
||||
(0 "F.Cu" signal)
|
||||
(31 "B.Cu" signal)
|
||||
(32 "B.Adhes" user)
|
||||
(33 "F.Adhes" user)
|
||||
(34 "B.Paste" user)
|
||||
(35 "F.Paste" user)
|
||||
(36 "B.SilkS" user)
|
||||
(37 "F.SilkS" user)
|
||||
(38 "B.Mask" user)
|
||||
(39 "F.Mask" user)
|
||||
(40 "Dwgs.User" user)
|
||||
(41 "Cmts.User" user)
|
||||
(42 "Eco1.User" user)
|
||||
(43 "Eco2.User" user)
|
||||
(44 "Edge.Cuts" user)
|
||||
(45 "Margin" user)
|
||||
(46 "B.CrtYd" user)
|
||||
(47 "F.CrtYd" user)
|
||||
(48 "B.Fab" user)
|
||||
(49 "F.Fab" user)
|
||||
)
|
||||
|
||||
(setup
|
||||
(last_trace_width 0.25)
|
||||
(trace_clearance 0.2)
|
||||
(zone_clearance 0.153)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.1534)
|
||||
(via_size 0.8)
|
||||
(via_drill 0.4)
|
||||
(via_min_size 0.4)
|
||||
(via_min_drill 0.3)
|
||||
(uvia_size 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(uvias_allowed no)
|
||||
(uvia_min_size 0.2)
|
||||
(uvia_min_drill 0.1)
|
||||
(max_error 0.005)
|
||||
(defaults
|
||||
(edge_clearance 0.01)
|
||||
(edge_cuts_line_width 0.05)
|
||||
(courtyard_line_width 0.05)
|
||||
(copper_line_width 0.2)
|
||||
(copper_text_dims (size 1.5 1.5) (thickness 0.3) keep_upright)
|
||||
(silk_line_width 0.12)
|
||||
(silk_text_dims (size 1 1) (thickness 0.15) keep_upright)
|
||||
(other_layers_line_width 0.1)
|
||||
(other_layers_text_dims (size 1 1) (thickness 0.15) keep_upright)
|
||||
)
|
||||
(pad_size 1.524 1.524)
|
||||
(pad_drill 0.762)
|
||||
(pad_to_mask_clearance 0.051)
|
||||
(solder_mask_min_width 0.25)
|
||||
(aux_axis_origin 0 0)
|
||||
(visible_elements FFFFFF7F)
|
||||
(pcbplotparams
|
||||
(layerselection 0x010fc_ffffffff)
|
||||
(usegerberextensions false)
|
||||
(usegerberattributes false)
|
||||
(usegerberadvancedattributes false)
|
||||
(creategerberjobfile false)
|
||||
(excludeedgelayer true)
|
||||
(linewidth 0.100000)
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|
|
@ -41,6 +41,7 @@ set( QA_PCBNEW_SRCS
|
|||
|
||||
drc/test_drc_courtyard_invalid.cpp
|
||||
drc/test_drc_courtyard_overlap.cpp
|
||||
drc/test_drc_regressions.cpp
|
||||
|
||||
plugins/altium/test_altium_rule_transformer.cpp
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,153 @@
|
|||
/*
|
||||
* This program source code file is part of KiCad, a free EDA CAD application.
|
||||
*
|
||||
* Copyright (C) 201 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, you may find one here:
|
||||
* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
|
||||
* or you may search the http://www.gnu.org website for the version 2 license,
|
||||
* or you may write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
#include <string>
|
||||
|
||||
#include <wx/toplevel.h>
|
||||
|
||||
#include <qa_utils/wx_utils/unit_test_utils.h>
|
||||
#include <pcbnew_utils/board_file_utils.h>
|
||||
#include <board.h>
|
||||
#include <board_design_settings.h>
|
||||
#include <pad.h>
|
||||
#include <pcb_track.h>
|
||||
#include <footprint.h>
|
||||
#include <drc/drc_item.h>
|
||||
#include <drc/drc_engine.h>
|
||||
#include <zone_filler.h>
|
||||
#include <board_commit.h>
|
||||
#include <tool/tool_manager.h>
|
||||
#include <zone_filler_tool.h>
|
||||
#include <settings/settings_manager.h>
|
||||
|
||||
struct DRC_REGRESSION_TEST_FIXTURE
|
||||
{
|
||||
DRC_REGRESSION_TEST_FIXTURE() :
|
||||
m_settingsManager( true /* headless */ )
|
||||
{
|
||||
}
|
||||
|
||||
void loadBoard( const wxString& relPath )
|
||||
{
|
||||
if( m_board )
|
||||
{
|
||||
m_board->SetProject( nullptr );
|
||||
m_board = nullptr;
|
||||
}
|
||||
|
||||
std::string boardPath = KI_TEST::GetPcbnewTestDataDir() + relPath + ".kicad_pcb";
|
||||
wxString projectPath = KI_TEST::GetPcbnewTestDataDir() + relPath + ".kicad_pro";
|
||||
|
||||
wxFileName pro( projectPath );
|
||||
|
||||
if( pro.Exists() )
|
||||
m_settingsManager.LoadProject( pro.GetFullPath() );
|
||||
|
||||
m_board = KI_TEST::ReadBoardFromFileOrStream( boardPath );
|
||||
|
||||
if( pro.Exists() )
|
||||
m_board->SetProject( &m_settingsManager.Prj() );
|
||||
|
||||
m_DRCEngine = std::make_shared<DRC_ENGINE>( m_board.get(), &m_board->GetDesignSettings() );
|
||||
m_DRCEngine->InitEngine( wxFileName() );
|
||||
m_board->GetDesignSettings().m_DRCEngine = m_DRCEngine;
|
||||
|
||||
m_toolMgr = std::make_unique<TOOL_MANAGER>();
|
||||
m_toolMgr->SetEnvironment( m_board.get(), nullptr, nullptr, nullptr, nullptr );
|
||||
m_toolMgr->RegisterTool( new ZONE_FILLER_TOOL );
|
||||
}
|
||||
|
||||
void fillZones( int aFillVersion )
|
||||
{
|
||||
ZONE_FILLER_TOOL* fillerTool = m_toolMgr->GetTool<ZONE_FILLER_TOOL>();
|
||||
BOARD_COMMIT commit( fillerTool );
|
||||
ZONE_FILLER filler( m_board.get(), &commit );
|
||||
std::vector<ZONE*> toFill;
|
||||
|
||||
m_board->GetDesignSettings().m_ZoneFillVersion = aFillVersion;
|
||||
|
||||
for( ZONE* zone : m_board->Zones() )
|
||||
toFill.push_back( zone );
|
||||
|
||||
if( filler.Fill( toFill, false, nullptr ) )
|
||||
commit.Push( _( "Fill Zone(s)" ), false, false );
|
||||
}
|
||||
|
||||
SETTINGS_MANAGER m_settingsManager;
|
||||
|
||||
std::unique_ptr<BOARD> m_board;
|
||||
std::unique_ptr<TOOL_MANAGER> m_toolMgr;
|
||||
std::shared_ptr<DRC_ENGINE> m_DRCEngine;
|
||||
};
|
||||
|
||||
|
||||
BOOST_FIXTURE_TEST_SUITE( TestDRCRegressions, DRC_REGRESSION_TEST_FIXTURE )
|
||||
|
||||
constexpr int delta = KiROUND( 0.006 * IU_PER_MM );
|
||||
|
||||
|
||||
BOOST_AUTO_TEST_CASE( DRCRegressions )
|
||||
{
|
||||
for( const wxString& relPath : { "issue4139",
|
||||
"issue4774",
|
||||
"issue5978",
|
||||
"issue5990",
|
||||
"issue6443",
|
||||
"issue7975",
|
||||
"issue8407" } )
|
||||
{
|
||||
loadBoard( relPath );
|
||||
fillZones( 6 );
|
||||
|
||||
std::vector<DRC_ITEM> violations;
|
||||
BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
|
||||
|
||||
bds.m_DRCSeverities[ DRCE_INVALID_OUTLINE ] = SEVERITY::RPT_SEVERITY_WARNING;
|
||||
bds.m_DRCSeverities[ DRCE_UNCONNECTED_ITEMS ] = SEVERITY::RPT_SEVERITY_WARNING;
|
||||
|
||||
m_DRCEngine->SetViolationHandler(
|
||||
[&]( const std::shared_ptr<DRC_ITEM>& aItem, wxPoint aPos )
|
||||
{
|
||||
if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR )
|
||||
violations.push_back( *aItem );
|
||||
} );
|
||||
|
||||
m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
|
||||
BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, %s",
|
||||
relPath,
|
||||
violations.empty() ? "passed" : "failed" ) );
|
||||
|
||||
if( !violations.empty() )
|
||||
{
|
||||
std::map<KIID, EDA_ITEM*> itemMap;
|
||||
m_board->FillItemMap( itemMap );
|
||||
|
||||
for( const DRC_ITEM& item : violations )
|
||||
BOOST_ERROR( item.ShowReport( EDA_UNITS::INCHES, RPT_SEVERITY_ERROR, itemMap ) );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
BOOST_AUTO_TEST_SUITE_END()
|
||||
|
|
@ -55,8 +55,8 @@ struct ZONE_FILL_TEST_FIXTURE
|
|||
m_board = nullptr;
|
||||
}
|
||||
|
||||
wxString boardPath = KI_TEST::GetPcbnewTestDataDir() + relPath + ".kicad_pcb";
|
||||
wxString projectPath = KI_TEST::GetPcbnewTestDataDir() + relPath + ".kicad_pro";
|
||||
std::string boardPath = KI_TEST::GetPcbnewTestDataDir() + relPath + ".kicad_pcb";
|
||||
wxString projectPath = KI_TEST::GetPcbnewTestDataDir() + relPath + ".kicad_pro";
|
||||
|
||||
wxFileName pro( projectPath );
|
||||
|
||||
|
|
@ -106,50 +106,6 @@ BOOST_FIXTURE_TEST_SUITE( TestZoneFiller, ZONE_FILL_TEST_FIXTURE )
|
|||
constexpr int delta = KiROUND( 0.006 * IU_PER_MM );
|
||||
|
||||
|
||||
BOOST_AUTO_TEST_CASE( RegressionZoneFillTests )
|
||||
{
|
||||
for( const wxString& relPath : { "issue2568", "issue3812", "issue5320", "issue5830",
|
||||
"issue6284", "issue7086" } )
|
||||
{
|
||||
loadBoard( relPath );
|
||||
|
||||
for( int fillVersion : { 5, 6 } )
|
||||
{
|
||||
fillZones( fillVersion );
|
||||
|
||||
std::vector<DRC_ITEM> violations;
|
||||
|
||||
m_DRCEngine->SetViolationHandler(
|
||||
[&]( const std::shared_ptr<DRC_ITEM>& aItem, wxPoint aPos )
|
||||
{
|
||||
if( aItem->GetErrorCode() == DRCE_CLEARANCE )
|
||||
violations.push_back( *aItem );
|
||||
} );
|
||||
|
||||
m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
|
||||
if( violations.empty() )
|
||||
{
|
||||
BOOST_TEST_MESSAGE( wxString::Format( "Passed: %s (V%d fill algo)",
|
||||
relPath,
|
||||
fillVersion ) );
|
||||
}
|
||||
else
|
||||
{
|
||||
std::map<KIID, EDA_ITEM*> itemMap;
|
||||
m_board->FillItemMap( itemMap );
|
||||
|
||||
for( const DRC_ITEM& item : violations )
|
||||
{
|
||||
BOOST_ERROR( item.ShowReport( EDA_UNITS::MILLIMETRES, RPT_SEVERITY_ERROR,
|
||||
itemMap ) );
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
BOOST_AUTO_TEST_CASE( BasicZoneFills )
|
||||
{
|
||||
loadBoard( "zone_filler" );
|
||||
|
|
@ -236,4 +192,92 @@ BOOST_AUTO_TEST_CASE( BasicZoneFills )
|
|||
}
|
||||
|
||||
|
||||
BOOST_AUTO_TEST_CASE( NotchedZones )
|
||||
{
|
||||
loadBoard( "notched_zones" );
|
||||
|
||||
// Older algorithms had trouble where the filleted zones intersected and left notches.
|
||||
// See:
|
||||
// https://gitlab.com/kicad/code/kicad/-/issues/2737
|
||||
// https://gitlab.com/kicad/code/kicad/-/issues/2752
|
||||
|
||||
// First, run a sanity check to validate that the saved board still has holes.
|
||||
SHAPE_POLY_SET frontCopper;
|
||||
|
||||
for( ZONE* zone : m_board->Zones() )
|
||||
{
|
||||
if( zone->GetLayerSet().Contains( F_Cu ) )
|
||||
{
|
||||
frontCopper.BooleanAdd( zone->GetFilledPolysList( F_Cu ),
|
||||
SHAPE_POLY_SET::PM_STRICTLY_SIMPLE );
|
||||
}
|
||||
}
|
||||
|
||||
BOOST_CHECK_GT( frontCopper.OutlineCount(), 2 );
|
||||
|
||||
// Now re-fill and make sure the holes are gone.
|
||||
fillZones( 6 );
|
||||
frontCopper = SHAPE_POLY_SET();
|
||||
|
||||
for( ZONE* zone : m_board->Zones() )
|
||||
{
|
||||
if( zone->GetLayerSet().Contains( F_Cu ) )
|
||||
{
|
||||
frontCopper.BooleanAdd( zone->GetFilledPolysList( F_Cu ),
|
||||
SHAPE_POLY_SET::PM_STRICTLY_SIMPLE );
|
||||
}
|
||||
}
|
||||
|
||||
BOOST_CHECK_EQUAL( frontCopper.OutlineCount(), 2 );
|
||||
}
|
||||
|
||||
|
||||
BOOST_AUTO_TEST_CASE( RegressionZoneFillTests )
|
||||
{
|
||||
for( const wxString& relPath : { "issue2568",
|
||||
"issue3812",
|
||||
"issue5102",
|
||||
"issue5320",
|
||||
"issue5567",
|
||||
"issue5830",
|
||||
"issue6039",
|
||||
"issue6260",
|
||||
"issue6284",
|
||||
"issue7086" } )
|
||||
{
|
||||
loadBoard( relPath );
|
||||
|
||||
for( int fillVersion : { 5, 6 } )
|
||||
{
|
||||
fillZones( fillVersion );
|
||||
|
||||
std::vector<DRC_ITEM> violations;
|
||||
|
||||
m_DRCEngine->SetViolationHandler(
|
||||
[&]( const std::shared_ptr<DRC_ITEM>& aItem, wxPoint aPos )
|
||||
{
|
||||
if( aItem->GetErrorCode() == DRCE_CLEARANCE )
|
||||
violations.push_back( *aItem );
|
||||
} );
|
||||
|
||||
m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
|
||||
BOOST_TEST_MESSAGE( wxString::Format( "Zone fill regression: %s, V%d fill algo %s",
|
||||
relPath,
|
||||
fillVersion,
|
||||
violations.empty() ? "passed" : "failed" ) );
|
||||
|
||||
if( !violations.empty() )
|
||||
{
|
||||
std::map<KIID, EDA_ITEM*> itemMap;
|
||||
m_board->FillItemMap( itemMap );
|
||||
|
||||
for( const DRC_ITEM& v : violations )
|
||||
BOOST_ERROR( v.ShowReport( EDA_UNITS::INCHES, RPT_SEVERITY_ERROR, itemMap ) );
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
BOOST_AUTO_TEST_SUITE_END()
|
||||
|
|
|
|||
Loading…
Reference in New Issue