more amazing free specctra software
This commit is contained in:
dickelbeck
parent
316d7b7353
commit
8ef962305a
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@ -1251,10 +1251,10 @@ void SPECCTRA_DB::doPROPERTIES( PROPERTIES* growth ) throw( IOError )
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if( tok != T_LEFT )
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expecting( T_LEFT );
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needSYMBOL();
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needSYMBOLorNUMBER();
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property.name = lexer->CurText();
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needSYMBOL();
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needSYMBOLorNUMBER();
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property.value = lexer->CurText();
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growth->push_back( property );
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@ -1848,7 +1848,7 @@ void SPECCTRA_DB::doPLACE( PLACE* growth ) throw( IOError )
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case T_pn:
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if( growth->part_number.size() )
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unexpected( tok );
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needSYMBOL();
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needSYMBOLorNUMBER();
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growth->part_number = lexer->CurText();
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needRIGHT();
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break;
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@ -2561,7 +2561,7 @@ void SPECCTRA_DB::doCLASS( CLASS* growth ) throw( IOError )
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doTOPOLOGY( growth->topology );
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break;
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default: // handle all the circuit_descriptor here as strings
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case T_circuit: // handle all the circuit_descriptor here as strings
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{
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std::string builder;
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int bracketNesting = 1; // we already saw the opening T_LEFT
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@ -2607,6 +2607,10 @@ void SPECCTRA_DB::doCLASS( CLASS* growth ) throw( IOError )
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if( tok==T_EOF )
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unexpected( T_EOF );
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} // scope bracket
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break;
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default:
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unexpected( lexer->CurText() );
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} // switch
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tok = nextTok();
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@ -3486,6 +3490,7 @@ const char* OUTPUTFORMATTER::GetQuoteChar( const char* wrapee, const char* quote
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{
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static const char quoteThese[] = "\t ()"
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"%" // per Alfons of freerouting.net, he does not like this unquoted as of 1-Feb-2008
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"{}" // guessing that these are problems too
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;
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// if the string to be wrapped (wrapee) has a delimiter in it,
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@ -225,8 +225,8 @@ struct POINT
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/**
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* Function FixNegativeZero
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* will change negative zero to positive zero in the IEEE floating point
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* storage format. Basically turns off the sign bit if the mantiss and exponent
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* would say the value is zero.
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* storage format. Basically turns off the sign bit if the mantissa and
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* exponent say the value is otherwise zero.
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*/
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void FixNegativeZero()
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{
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@ -536,7 +536,7 @@ class RECTANGLE : public ELEM
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std::string layer_id;
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POINT point0;
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POINT point0; ///< one of two opposite corners
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POINT point1;
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public:
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@ -882,11 +882,12 @@ class WINDOW : public ELEM
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friend class SPECCTRA_DB;
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protected:
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/* shape holds one of these
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PATH* path; ///< used for both path and polygon
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RECTANGLE* rectangle;
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CIRCLE* circle;
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QARC* qarc;
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/* <shape_descriptor >::=
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[<rectangle_descriptor> |
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<circle_descriptor> |
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<polygon_descriptor> |
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<path_descriptor> |
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<qarc_descriptor> ]
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*/
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ELEM* shape;
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@ -2561,6 +2562,7 @@ public:
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out->Print( 0, "\n" );
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}
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};
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typedef boost::ptr_vector<COMP_ORDER> COMP_ORDERS;
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class NET : public ELEM
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@ -2677,6 +2679,7 @@ public:
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out->Print( nestLevel, ")\n" );
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}
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};
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typedef boost::ptr_vector<NET> NETS;
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class TOPOLOGY : public ELEM
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@ -2685,7 +2688,6 @@ class TOPOLOGY : public ELEM
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FROMTOS fromtos;
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typedef boost::ptr_vector<COMP_ORDER> COMP_ORDERS;
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COMP_ORDERS comp_orders;
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public:
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@ -2739,35 +2741,45 @@ public:
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void Format( OUTPUTFORMATTER* out, int nestLevel ) throw( IOError )
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{
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const int RIGHTMARGIN = 80;
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const char* quote = out->GetQuoteChar( class_id.c_str() );
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int perLine = out->Print( nestLevel, "(%s %s%s%s",
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LEXER::GetTokenText( Type() ),
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quote, class_id.c_str(), quote );
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const int RIGHTMARGIN = 72;
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for( STRINGS::iterator i=net_ids.begin(); i!=net_ids.end(); ++i )
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{
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const char* space = " ";
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if( perLine > RIGHTMARGIN )
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{
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out->Print( 0, "\n" );
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perLine = out->Print( nestLevel+1, "%s", "" );
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space = ""; // no space at first net_id of the line
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}
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quote = out->GetQuoteChar( i->c_str() );
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perLine += out->Print( 0, " %s%s%s", quote, i->c_str(), quote );
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perLine += out->Print( 0, "%s%s%s%s", space, quote, i->c_str(), quote );
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}
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bool newLine = false;
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if( circuit.size() || layer_rules.size() || topology )
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if( circuit.size() || rules || layer_rules.size() || topology )
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{
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out->Print( 0, "\n" );
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newLine = true;
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}
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for( STRINGS::iterator i=circuit.begin(); i!=circuit.end(); ++i )
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out->Print( nestLevel+1, "%s\n", i->c_str() );
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if( circuit.size() )
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{
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out->Print( nestLevel+1, "(circuit\n" );
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for( STRINGS::iterator i=circuit.begin(); i!=circuit.end(); ++i )
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out->Print( nestLevel+2, "%s\n", i->c_str() );
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out->Print( nestLevel+1, ")\n" );
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}
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if( rules )
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rules->Format( out, nestLevel+1 );
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for( LAYER_RULES::iterator i=layer_rules.begin(); i!=layer_rules.end(); ++i )
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i->Format( out, nestLevel+1 );
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@ -2778,16 +2790,14 @@ public:
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out->Print( newLine ? nestLevel : 0, ")\n" );
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}
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};
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typedef boost::ptr_vector<CLASS> CLASSLIST;
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class NETWORK : public ELEM
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{
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friend class SPECCTRA_DB;
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typedef boost::ptr_vector<NET> NETS;
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NETS nets;
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typedef boost::ptr_vector<CLASS> CLASSLIST;
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CLASSLIST classes;
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@ -3637,6 +3647,7 @@ class SPECCTRA_DB : public OUTPUTFORMATTER
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*/
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int findLayerName( const std::string& aLayerName ) const;
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/**
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* Function nextTok
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* returns the next token from the lexer.
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@ -3843,12 +3854,6 @@ class SPECCTRA_DB : public OUTPUTFORMATTER
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nets.clear();
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}
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/**
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* Function flipMODULEs
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* flips the modules which are on the back side of the board to the front.
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*/
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void flipMODULEs( BOARD* aBoard );
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//-----<FromSESSION>-----------------------------------------------------
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/**
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@ -4002,6 +4007,12 @@ public:
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*/
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void ExportSESSION( wxString aFilename );
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/**
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* Function FlipMODULEs
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* flips the modules which are on the back side of the board to the front.
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*/
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void FlipMODULEs( BOARD* aBoard );
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/**
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* Function RevertMODULEs
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* flips the modules which were on the back side of the board back to the back.
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@ -84,6 +84,11 @@ void WinEDA_PcbFrame::ExportToSpecctra( wxCommandEvent& event )
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setlocale( LC_NUMERIC, "C" ); // Switch the locale to standard C
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// DSN Images (=Kicad MODULES and pads) must be presented from the
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// top view. So we temporarily flip any modules which are on the back
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// side of the board to the front, and record this in the MODULE's flag field.
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db.FlipMODULEs( m_Pcb );
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try
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{
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db.FromBOARD( m_Pcb );
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@ -102,8 +107,7 @@ void WinEDA_PcbFrame::ExportToSpecctra( wxCommandEvent& event )
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setlocale( LC_NUMERIC, "" ); // revert to the current locale
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// this is called in FromBOARD() too, but if it throws an exception, that call
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// does not happen, so call it again just in case here.
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// done assuredly, even if an exception was thrown and caught.
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db.RevertMODULEs( m_Pcb );
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@ -538,7 +542,7 @@ PADSTACK* SPECCTRA_DB::makePADSTACK( BOARD* aBoard, D_PAD* aPad )
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}
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/// data type used to ensure unique-ness of pin names
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/// data type used to ensure unique-ness of pin names, holding (wxString and int)
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typedef std::map<wxString, int, wxString_less_than> PINMAP;
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@ -672,19 +676,26 @@ IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, MODULE* aModule )
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path->SetAperture( scale( graphic->m_Width ) );
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path->SetLayerId( "signal" );
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double radius = hypot( scale( graphic->m_Start.x - graphic->m_End.x ),
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scale( graphic->m_Start.y - graphic->m_End.y ) );
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// Do the math using Kicad units, that way we stay out of the
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// scientific notation range of floating point numbers in the
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// DSN file. We do not parse scientific notation in our own
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// lexer/beautifier, and the spec is not clear that this is
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// required. Fixed point floats are all that should be needed.
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POINT offset = mapPt( graphic->m_Start0 );
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double radius = hypot( double( graphic->m_Start.x - graphic->m_End.x ),
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double( graphic->m_Start.y - graphic->m_End.y ) );
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// better if evenly divisible into 360
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const int DEGREE_INTERVAL = 18; // 18 means 20 line segments
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for( double radians = 0.0; radians < 2*M_PI; radians += DEGREE_INTERVAL * M_PI / 180.0 )
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{
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POINT point( radius*cos( radians ), radius*sin( radians ) );
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point += offset;
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path->AppendPoint( point );
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wxPoint point( int( radius * cos( radians ) ),
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int( radius * sin( radians ) ) );
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point += graphic->m_Start0; // an offset
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path->AppendPoint( mapPt(point) );
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}
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}
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break;
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@ -749,8 +760,7 @@ PADSTACK* SPECCTRA_DB::makeVia( const SEGVIA* aVia )
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return makeVia( aVia->m_Width, aVia->GetDrillValue(), topLayer, botLayer );
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}
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typedef std::set<wxString, wxString_less_than> STRINGSET;
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typedef std::set<std::string> STRINGSET;
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typedef std::pair<STRINGSET::iterator, bool> STRINGSET_PAIR;
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@ -785,7 +795,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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}
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// if we cannot insert OK, that means the reference has been seen before.
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STRINGSET_PAIR refpair = refs.insert( module->GetReference() );
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STRINGSET_PAIR refpair = refs.insert( CONV_TO_UTF8( module->GetReference() ) );
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if( !refpair.second ) // insert failed
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{
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ThrowIOError( _("Multiple components have identical reference IDs of \"%s\"."),
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@ -797,11 +807,6 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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if( !pcb )
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pcb = SPECCTRA_DB::MakePCB();
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// DSN Images (=Kicad MODULES and pads) must be presented from the
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// top view. So we temporarily flip any modules which are on the back
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// side of the board to the front, and record this in the MODULE's flag field.
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flipMODULEs( aBoard );
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//-----<layer_descriptor>-----------------------------------------------
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{
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// specctra wants top physical layer first, then going down to the
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@ -938,10 +943,11 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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int curTrackWidth = aBoard->m_BoardSettings->m_CurrentTrackWidth;
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int curTrackClear = aBoard->m_BoardSettings->m_TrackClearence;
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// The +5 is to give freerouter a little extra room, this is 0.5 mils.
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// The +1 is to give freerouter a little extra room, this is 0.1 mils.
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// If we export without this, then on import freerouter violates our
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// DRC checks with track to via spacing.
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double clearance = scale(curTrackClear+5);
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// DRC checks with track to via spacing, although this could be a
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// result of > testing vs. >= testing in PCBNEW's DRC.
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double clearance = scale(curTrackClear+1);
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STRINGS& rules = pcb->structure->rules->rules;
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@ -996,15 +1002,14 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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plane->name = CONV_TO_UTF8( item->m_Netname );
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wxString layerName = aBoard->GetLayerName( item->GetLayer() );
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polygon->layer_id = CONV_TO_UTF8( layerName );
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polygon->layer_id = layerIds[ kicadLayer2pcb[ item->GetLayer() ] ];
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int count = item->m_Poly->corner.size();
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for( int j=0; j<count; ++j )
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{
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wxPoint point( item->m_Poly->corner[j].x,
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item->m_Poly->corner[j].y );
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polygon->points.push_back( mapPt(point) );
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polygon->AppendPoint( mapPt(point) );
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}
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pcb->structure->planes.push_back( plane );
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@ -1015,6 +1020,9 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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//-----<build the images, components, and netlist>-----------------------
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{
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PIN_REF empty( pcb->network );
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std::string componentId;
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// find the highest numbered netCode within the board.
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int highestNetCode = -1;
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for( EQUIPOT* equipot = aBoard->m_Equipots; equipot; equipot = equipot->Next() )
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@ -1046,15 +1054,17 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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IMAGE* image = makeIMAGE( aBoard, module );
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componentId = CONV_TO_UTF8( module->GetReference() );
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// create a net list entry for all the actual pins in the image
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// for the current module. location of this code is critical
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// because we fabricated some pin names to ensure unique-ness
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// of pin names within a module, do not move this code. The
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// of pin names within a module, do not move this code because
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// the life of this 'IMAGE* image' is not necessarily long. The
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// exported netlist will have some fabricated pin names in it.
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// If you don't like fabricated pin names, then make sure all pads
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// within your MODULEs are uniquely named!
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PIN_REF empty( pcb->network );
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for( unsigned p=0; p<image->pins.size(); ++p )
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{
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PIN* pin = &image->pins[p];
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@ -1068,7 +1078,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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PIN_REF& pin_ref = net->pins.back();
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pin_ref.component_id = CONV_TO_UTF8( module->GetReference() );
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pin_ref.component_id = componentId;
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pin_ref.pin_id = pin->pin_id;
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}
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}
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@ -1090,7 +1100,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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place->SetRotation( module->m_Orient/10.0 );
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place->SetVertex( mapPt( module->m_Pos ) );
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place->component_id = CONV_TO_UTF8( module->GetReference() );
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place->component_id = componentId;
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place->part_number = CONV_TO_UTF8( module->GetValue() );
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// module is flipped from bottom side, set side to T_back
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@ -1115,21 +1125,11 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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pcb->library->AddPadstack( padstack );
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}
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D(std::string component = "U1";)
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// copy our SPECCTRA_DB::nets to the pcb->network
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for( unsigned n=1; n<nets.size(); ++n )
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{
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NET* net = nets[n];
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if( net->pins.size()
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#if defined(DEBUG)
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// experimenting with exporting a subset of all the nets
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// and with incremental, iterative autorouting.
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&& net->FindPIN_REF( component ) >= 0
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#endif
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)
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if( net->pins.size() )
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{
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// give ownership to pcb->network
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pcb->network->nets.push_back( net );
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@ -1146,7 +1146,10 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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// Next we add the via's which may be used.
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int defaultViaSize = aBoard->m_BoardSettings->m_CurrentViaSize;
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/* I need at least one via for the (class...) scope below
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if( defaultViaSize )
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*/
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{
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PADSTACK* padstack = makeVia( defaultViaSize, g_DesignSettings.m_ViaDrill,
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0, aBoard->GetCopperLayerCount()-1 );
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@ -1196,10 +1199,12 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
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{
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TRACK* track = (TRACK*) items[i];
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if( track->GetNet() == 0 )
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int netcode = track->GetNet();
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if( netcode == 0 )
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continue;
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if( old_netcode != track->GetNet()
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if( old_netcode != netcode
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|| old_width != track->m_Width
|
||||
|| old_layer != track->GetLayer()
|
||||
|| (path && path->points.back() != mapPt(track->m_Start) )
|
||||
|
|
@ -1208,10 +1213,10 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
|
|||
old_width = track->m_Width;
|
||||
old_layer = track->GetLayer();
|
||||
|
||||
if( old_netcode != track->GetNet() )
|
||||
if( old_netcode != netcode )
|
||||
{
|
||||
old_netcode = track->GetNet();
|
||||
EQUIPOT* equipot = aBoard->FindNet( track->GetNet() );
|
||||
old_netcode = netcode;
|
||||
EQUIPOT* equipot = aBoard->FindNet( netcode );
|
||||
wxASSERT( equipot );
|
||||
netname = CONV_TO_UTF8( equipot->m_Netname );
|
||||
}
|
||||
|
|
@ -1290,21 +1295,65 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
|
|||
|
||||
if( viaNdx != -1 )
|
||||
{
|
||||
#if 1
|
||||
for( ; viaNdx < (int)padstacks.size(); ++viaNdx )
|
||||
{
|
||||
vias->AppendVia( padstacks[viaNdx].padstack_id.c_str() );
|
||||
}
|
||||
#else
|
||||
// output only the default via. Then use class_descriptors to
|
||||
// override the default. No, this causes free router not to
|
||||
// output the unmentioned vias into the session file.
|
||||
vias->AppendVia( padstacks[viaNdx].padstack_id.c_str() );
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//-----<flip modules back>----------------------------------------------
|
||||
//-----<output a default class with all nets and the via and track size>--
|
||||
{
|
||||
char text[80];
|
||||
STRINGSET netIds; // sort the net names in here
|
||||
|
||||
RevertMODULEs( aBoard );
|
||||
CLASS* clazz = new CLASS( pcb->network );
|
||||
pcb->network->classes.push_back( clazz );
|
||||
|
||||
// freerouter creates a class named 'default' anyway, and if we
|
||||
// try and use that, we end up with two 'default' via rules so use
|
||||
// something else as the name of our default class. Someday we may support
|
||||
// additional classes. Until then the user can text edit the exported
|
||||
// DSN file and use this class as a template, copying it and giving the
|
||||
// copy a different class_id and splitting out some of the nets.
|
||||
clazz->class_id = "kicad_default";
|
||||
|
||||
// Insert all the net_ids into the set. They are unique, but even if
|
||||
// they were not the duplicated name is not our error, but the BOARD's.
|
||||
// A duplicate would be removed here.
|
||||
NETS& nets = pcb->network->nets;
|
||||
for( NETS::iterator i=nets.begin(); i!=nets.end(); ++i )
|
||||
netIds.insert( i->net_id );
|
||||
|
||||
// netIds is now sorted, put them into clazz->net_ids
|
||||
for( STRINGSET::iterator i=netIds.begin(); i!=netIds.end(); ++i )
|
||||
clazz->net_ids.push_back( *i );
|
||||
|
||||
// output the via and track dimensions, the whole reason for this scope.
|
||||
int curTrackWidth = aBoard->m_BoardSettings->m_CurrentTrackWidth;
|
||||
|
||||
clazz->rules = new RULE( clazz, T_rule );
|
||||
|
||||
sprintf( text, "(width %.6g)", scale( curTrackWidth ) );
|
||||
clazz->rules->rules.push_back( text );
|
||||
|
||||
int viaNdx = pcb->library->via_start_index;
|
||||
|
||||
sprintf( text, "(use_via %s)", pcb->library->padstacks[viaNdx].padstack_id.c_str() );
|
||||
clazz->circuit.push_back( text );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SPECCTRA_DB::flipMODULEs( BOARD* aBoard )
|
||||
void SPECCTRA_DB::FlipMODULEs( BOARD* aBoard )
|
||||
{
|
||||
for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
|
||||
{
|
||||
|
|
|
|||
|
|
@ -167,7 +167,7 @@ static int scale( double distance, UNIT_RES* aResolution )
|
|||
static wxPoint mapPt( const POINT& aPoint, UNIT_RES* aResolution )
|
||||
{
|
||||
wxPoint ret( scale( aPoint.x, aResolution ),
|
||||
-scale( aPoint.y, aResolution )); // negate y
|
||||
-scale( aPoint.y, aResolution ) ); // negate y
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -347,15 +347,18 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard ) throw( IOError )
|
|||
if( !session->route->library )
|
||||
ThrowIOError( _("Session file is missing the \"library_out\" section") );
|
||||
|
||||
#if 1
|
||||
// delete all the old tracks and vias
|
||||
aBoard->m_Track->DeleteStructList();
|
||||
aBoard->m_Track = NULL;
|
||||
aBoard->m_NbSegmTrack = 0;
|
||||
#endif
|
||||
|
||||
aBoard->DeleteMARKERs();
|
||||
|
||||
buildLayerMaps( aBoard );
|
||||
|
||||
#if 1
|
||||
// Walk the PLACEMENT object's COMPONENTs list, and for each PLACE within
|
||||
// each COMPONENT, reposition and re-orient each component and put on
|
||||
// correct side of the board.
|
||||
|
|
@ -413,6 +416,7 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard ) throw( IOError )
|
|||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
routeResolution = session->route->GetUnits();
|
||||
|
||||
|
|
@ -430,8 +434,10 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard ) throw( IOError )
|
|||
EQUIPOT* equipot = aBoard->FindNet( netName );
|
||||
if( equipot )
|
||||
netCode = equipot->GetNet();
|
||||
|
||||
// else netCode remains 0
|
||||
else // else netCode remains 0
|
||||
{
|
||||
// int breakhere = 1;
|
||||
}
|
||||
}
|
||||
|
||||
WIRES& wires = net->wires;
|
||||
|
|
@ -442,19 +448,36 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard ) throw( IOError )
|
|||
|
||||
if( shape != T_path )
|
||||
{
|
||||
/* shape == T_polygon is expected from freerouter if you have
|
||||
a zone on a non "power" type layer, i.e. a T_signal layer
|
||||
and the design does a round trip back in as session here.
|
||||
We kept our own zones in the BOARD, so ignore this so called
|
||||
'wire'.
|
||||
|
||||
wxString netId = CONV_FROM_UTF8( wire->net_id.c_str() );
|
||||
ThrowIOError(
|
||||
_("Unsupported wire shape: \"%s\" for net: \"%s\""),
|
||||
LEXER::GetTokenString(shape).GetData(),
|
||||
netId.GetData()
|
||||
);
|
||||
*/
|
||||
}
|
||||
|
||||
PATH* path = (PATH*) wire->shape;
|
||||
for( unsigned pt=0; pt<path->points.size()-1; ++pt )
|
||||
else
|
||||
{
|
||||
TRACK* track = makeTRACK( path, pt, netCode );
|
||||
aBoard->Add( track );
|
||||
PATH* path = (PATH*) wire->shape;
|
||||
for( unsigned pt=0; pt<path->points.size()-1; ++pt )
|
||||
{
|
||||
/* a debugging aid, may come in handy
|
||||
if( path->points[pt].x == 547800
|
||||
&& path->points[pt].y == -380250 )
|
||||
{
|
||||
int breakhere = 1;
|
||||
}
|
||||
*/
|
||||
|
||||
TRACK* track = makeTRACK( path, pt, netCode );
|
||||
aBoard->Add( track );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue