Use via layers which are determined in only one place, this is a cheap trick to support blind vias in the export.
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@ -3595,6 +3595,10 @@ class SPECCTRA_DB : public SPECCTRA_LEXER
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/// we don't want ownership here permanently, so we don't use boost::ptr_vector
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std::vector<NET*> nets;
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/// specctra cu layers, 0 based index:
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int m_top_via_layer;
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int m_bot_via_layer;
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/**
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* Function buildLayerMaps
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@ -150,6 +150,8 @@ void PCB_EDIT_FRAME::ExportToSpecctra( wxCommandEvent& event )
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try
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{
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GetBoard()->SynchronizeNetsAndNetClasses();
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db.FromBOARD( GetBoard() );
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db.ExportPCB( fullFileName, true );
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@ -591,8 +593,6 @@ PADSTACK* SPECCTRA_DB::makePADSTACK( BOARD* aBoard, D_PAD* aPad )
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polygon->AppendPoint( lowerRight );
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}
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D( printf( "m_DeltaSize: %d,%d\n", aPad->GetDelta().x, aPad->GetDelta().y ); )
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// this string _must_ be unique for a given physical shape
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snprintf( name, sizeof(name), "Trapz%sPad_%.6gx%.6g_%c%.6gx%c%.6g_um",
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uniqifier.c_str(), IU2um( aPad->GetSize().x ), IU2um( aPad->GetSize().y ),
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@ -1727,13 +1727,32 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
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{
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NETCLASSES& nclasses = aBoard->m_NetClasses;
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// Assume the netclass vias are all the same kind of thru, blind, or buried vias.
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// This is in lieu of either having each netclass via have its own layer pair in
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// the netclass dialog, or such control in the specctra export dialog.
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// if( aBoard->GetDesignSettings().m_CurrentViaType == VIA_THROUGH )
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{
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m_top_via_layer = 0; // first specctra cu layer is number zero.
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m_bot_via_layer = aBoard->GetCopperLayerCount()-1;
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}
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/*
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else
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{
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// again, should be in the BOARD:
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topLayer = kicadLayer2pcb[ GetScreen()->m_Route_Layer_TOP ];
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botLayer = kicadLayer2pcb[ GetScreen()->m_Route_Layer_BOTTOM ];
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}
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*/
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// Add the via from the Default netclass first. The via container
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// in pcb->library preserves the sequence of addition.
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NETCLASS* netclass = nclasses.GetDefault();
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PADSTACK* via = makeVia( netclass->GetViaDiameter(), netclass->GetViaDrill(),
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FIRST_LAYER, aBoard->GetCopperLayerCount()-1 );
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m_top_via_layer, m_bot_via_layer );
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// we AppendVia() this first one, there is no way it can be a duplicate,
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// the pcb->library via container is empty at this point. After this,
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@ -1742,10 +1761,11 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
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pcb->library->AppendVia( via );
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#if 0
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// Stock vias have drill diameter of zero, this is not sensible to freerouter
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// I've seen no way to make stock vias useable by freerouter. Also the
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// zero based diameter was leading to duplicates in the LookupVia() function.
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// User should use netclass based vias when going to freerouter.
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// output the stock vias, but preserve uniqueness in the via container by
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// Output the stock vias, but preserve uniqueness in the via container by
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// using LookupVia().
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for( unsigned i = 0; i < aBoard->m_ViasDimensionsList.size(); ++i )
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{
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@ -1753,7 +1773,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
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int viaDrill = aBoard->m_ViasDimensionsList[i].m_Drill;
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via = makeVia( viaSize, viaDrill,
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FIRST_LAYER, aBoard->GetCopperLayerCount()-1 );
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m_top_via_layer, m_bot_via_layer );
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// maybe add 'via' to the library, but only if unique.
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PADSTACK* registered = pcb->library->LookupVia( via );
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@ -1772,7 +1792,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
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netclass = nc->second;
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via = makeVia( netclass->GetViaDiameter(), netclass->GetViaDrill(),
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FIRST_LAYER, aBoard->GetCopperLayerCount()-1 );
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m_top_via_layer, m_bot_via_layer );
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// maybe add 'via' to the library, but only if unique.
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PADSTACK* registered = pcb->library->LookupVia( via );
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@ -1854,8 +1874,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
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//-----<export the existing real BOARD instantiated vias>-----------------
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{
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// export all of them for now, later we'll decide what controls we need
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// on this.
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// Export all vias, once per unique size and drill diameter combo.
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static const KICAD_T scanVIAs[] = { PCB_VIA_T, EOT };
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items.Collect( aBoard, scanVIAs );
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@ -1930,7 +1949,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
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void SPECCTRA_DB::exportNETCLASS( NETCLASS* aNetClass, BOARD* aBoard )
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{
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/* From page 11 of specctra spec:
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/* From page 11 of specctra spec:
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*
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* Routing and Placement Rule Hierarchies
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*
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@ -1995,7 +2014,7 @@ void SPECCTRA_DB::exportNETCLASS( NETCLASS* aNetClass, BOARD* aBoard )
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// this should never become a performance issue.
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PADSTACK* via = makeVia( aNetClass->GetViaDiameter(), aNetClass->GetViaDrill(),
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FIRST_LAYER, aBoard->GetCopperLayerCount()-1 );
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m_top_via_layer, m_bot_via_layer );
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snprintf( text, sizeof(text), "(use_via %s)", via->GetPadstackId().c_str() );
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clazz->circuit.push_back( text );
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