Implement annular ring checking for pads.
Fixes https://gitlab.com/kicad/code/kicad/issues/12109
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@ -1266,13 +1266,11 @@ bool DIALOG_PAD_PROPERTIES::padValuesOK()
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// Test hole against pad shape
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if( m_dummyPad->IsOnCopperLayer() && m_dummyPad->GetDrillSize().x > 0 )
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{
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LSET lset = m_dummyPad->GetLayerSet() & LSET::AllCuMask();
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PCB_LAYER_ID layer = lset.Seq().at( 0 );
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int maxError = m_board->GetDesignSettings().m_MaxError;
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SHAPE_POLY_SET padOutline;
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m_dummyPad->TransformShapeWithClearanceToPolygon( padOutline, layer, 0, maxError,
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ERROR_LOC::ERROR_INSIDE );
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m_dummyPad->TransformShapeWithClearanceToPolygon( padOutline, UNDEFINED_LAYER, 0,
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maxError, ERROR_INSIDE );
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if( !padOutline.Collide( m_dummyPad->GetPosition() ) )
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{
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@ -1284,9 +1282,9 @@ bool DIALOG_PAD_PROPERTIES::padValuesOK()
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SHAPE_POLY_SET slotOutline;
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TransformOvalToPolygon( slotOutline, slot->GetSeg().A, slot->GetSeg().B,
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slot->GetWidth(), maxError, ERROR_LOC::ERROR_INSIDE );
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slot->GetWidth(), maxError, ERROR_INSIDE );
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padOutline.BooleanSubtract( slotOutline, SHAPE_POLY_SET::POLYGON_MODE::PM_FAST );
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padOutline.BooleanSubtract( slotOutline, SHAPE_POLY_SET::PM_FAST );
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if( padOutline.IsEmpty() )
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warning_msgs.Add( _( "Warning: Pad hole will leave no copper." ) );
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@ -23,10 +23,15 @@
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#include <common.h>
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#include <pcb_track.h>
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#include <pad.h>
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#include <footprint.h>
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#include <drc/drc_engine.h>
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#include <drc/drc_item.h>
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#include <drc/drc_rule.h>
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#include <drc/drc_test_provider.h>
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#include <macros.h>
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#include <convert_basic_shapes_to_polygon.h>
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#include <board_design_settings.h>
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/*
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Via/pad annular ring width test. Checks if there's sufficient copper ring around
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@ -80,27 +85,141 @@ bool DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run()
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return true; // continue with other tests
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}
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if( !reportPhase( _( "Checking via annular rings..." ) ) )
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if( !reportPhase( _( "Checking pad & via annular rings..." ) ) )
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return false; // DRC cancelled
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int maxError = m_drcEngine->GetBoard()->GetDesignSettings().m_MaxError;
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auto calcEffort =
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[]( BOARD_ITEM* item )
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{
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switch( item->Type() )
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{
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case PCB_VIA_T:
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return 1;
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case PCB_PAD_T:
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{
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PAD* pad = static_cast<PAD*>( item );
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if( !pad->HasHole() || pad->GetAttribute() != PAD_ATTRIB::PTH )
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return 0;
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if( pad->GetOffset() == VECTOR2I( 0, 0 ) )
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{
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switch( pad->GetShape() )
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{
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case PAD_SHAPE::CHAMFERED_RECT:
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if( pad->GetChamferRectRatio() > 0.30 )
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break;
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KI_FALLTHROUGH;
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case PAD_SHAPE::CIRCLE:
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case PAD_SHAPE::OVAL:
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case PAD_SHAPE::RECT:
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case PAD_SHAPE::ROUNDRECT:
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return 1;
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default:
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break;
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}
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}
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return 100;
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}
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default:
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return 0;
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}
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};
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auto checkAnnularWidth =
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[&]( BOARD_ITEM* item ) -> bool
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{
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_ANNULAR_WIDTH ) )
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return false;
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int v_min = 0;
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int v_max = 0;
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PCB_VIA* via = dyn_cast<PCB_VIA*>( item );
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int annularWidth = 0;
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// fixme: check minimum IAR/OAR ring for THT pads too
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if( !via )
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switch( item->Type() )
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{
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case PCB_VIA_T:
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{
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PCB_VIA* via = static_cast<PCB_VIA*>( item );
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annularWidth = ( via->GetWidth() - via->GetDrillValue() ) / 2;
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break;
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}
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case PCB_PAD_T:
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{
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PAD* pad = static_cast<PAD*>( item );
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bool handled = false;
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if( !pad->HasHole() || pad->GetAttribute() != PAD_ATTRIB::PTH )
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return true;
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if( pad->GetOffset() == VECTOR2I( 0, 0 ) )
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{
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switch( pad->GetShape() )
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{
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case PAD_SHAPE::CHAMFERED_RECT:
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if( pad->GetChamferRectRatio() > 0.30 )
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break;
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KI_FALLTHROUGH;
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case PAD_SHAPE::CIRCLE:
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case PAD_SHAPE::OVAL:
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case PAD_SHAPE::RECT:
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case PAD_SHAPE::ROUNDRECT:
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annularWidth = std::min( pad->GetSizeX() - pad->GetDrillSizeX(),
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pad->GetSizeY() - pad->GetDrillSizeY() ) / 2;
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handled = true;
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break;
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default:
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break;
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}
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}
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if( !handled )
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{
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// Slow (but general purpose) method.
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SHAPE_POLY_SET padOutline;
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pad->TransformShapeWithClearanceToPolygon( padOutline, UNDEFINED_LAYER, 0,
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maxError, ERROR_INSIDE );
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if( !padOutline.Collide( pad->GetPosition() ) )
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{
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// Hole outside pad
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annularWidth = 0;
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}
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else
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{
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std::shared_ptr<SHAPE_SEGMENT> slot = pad->GetEffectiveHoleShape();
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// Disable is-inside test in SquaredDistance
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padOutline.Outline( 0 ).SetClosed( false );
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SEG::ecoord dist_sq = padOutline.SquaredDistance( slot->GetSeg() );
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annularWidth = sqrt( dist_sq ) - slot->GetWidth() / 2;
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}
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}
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break;
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}
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default:
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return true;
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}
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// PADSTACKS TODO: once we have padstacks we'll need to run this per-layer....
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auto constraint = m_drcEngine->EvalRules( ANNULAR_WIDTH_CONSTRAINT, via, nullptr,
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auto constraint = m_drcEngine->EvalRules( ANNULAR_WIDTH_CONSTRAINT, item, nullptr,
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UNDEFINED_LAYER );
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int annularWidth = ( via->GetWidth() - via->GetDrillValue() ) / 2;
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int v_min = 0;
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int v_max = 0;
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bool fail_min = false;
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bool fail_max = false;
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@ -125,39 +244,69 @@ bool DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run()
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wxString msg;
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if( fail_min )
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{
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msg.Printf( _( "(%s min annular width %s; actual %s)" ),
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constraint.GetName(),
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MessageTextFromValue( userUnits(), v_min ),
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MessageTextFromValue( userUnits(), annularWidth ) );
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}
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if( fail_max )
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{
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msg.Printf( _( "(%s max annular width %s; actual %s)" ),
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constraint.GetName(),
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MessageTextFromValue( userUnits(), v_max ),
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MessageTextFromValue( userUnits(), annularWidth ) );
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}
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drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
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drcItem->SetItems( item );
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drcItem, via->GetPosition(), via->GetLayer() );
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reportViolation( drcItem, item->GetPosition(), item->GetLayer() );
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}
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return true;
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};
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BOARD* board = m_drcEngine->GetBoard();
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int ii = 0;
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size_t ii = 0;
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size_t total = 0;
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for( PCB_TRACK* item : board->Tracks() )
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total += calcEffort( item );
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for( FOOTPRINT* footprint : board->Footprints() )
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{
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for( PAD* pad : footprint->Pads() )
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total += calcEffort( pad );
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}
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for( PCB_TRACK* item : board->Tracks() )
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{
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if( !reportProgress( ii++, board->Tracks().size(), delta ) )
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ii += calcEffort( item );
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if( !reportProgress( ii, total, delta ) )
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return false; // DRC cancelled
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if( !checkAnnularWidth( item ) )
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break;
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}
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for( FOOTPRINT* footprint : board->Footprints() )
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{
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for( PAD* pad : footprint->Pads() )
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{
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ii += calcEffort( pad );
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if( !reportProgress( ii, total, delta ) )
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return false; // DRC cancelled
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if( !checkAnnularWidth( pad ) )
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break;
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}
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}
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reportRuleStatistics();
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return !m_drcEngine->IsCancelled();
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