Improved library management in simulator Now it also gathers information from Spice_Lib_File fields
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@ -56,6 +56,18 @@ bool NETLIST_EXPORTER_PSPICE::Format( OUTPUTFORMATTER* aFormatter, unsigned aCtl
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aFormatter->Print( 0, ".title KiCad schematic\n" );
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// Write .include directives
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for( auto lib : m_libraries )
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{
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if( ( aCtl & NET_ADJUST_INCLUDE_PATHS ) && m_paths )
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{
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// Look for the library in known search locations
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lib = m_paths->FindValidPath( lib );
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}
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aFormatter->Print( 0, ".include %s\n", (const char*) lib.c_str() );
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}
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for( const auto& item : m_spiceItems )
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{
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aFormatter->Print( 0, "%c%s ", item.m_primitive, (const char*) item.m_refName.c_str() );
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@ -203,9 +215,12 @@ wxString NETLIST_EXPORTER_PSPICE::GetSpiceFieldDefVal( SPICE_FIELD aField,
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// There is no default Spice library
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return wxEmptyString;
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break;
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default:
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wxASSERT_MSG( false, "Missing default value definition for a Spice field" );
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break;
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}
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wxASSERT_MSG( false, "Missing default value definition for a Spice field" );
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return wxString( "<unknown>" );
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}
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@ -220,16 +235,15 @@ void NETLIST_EXPORTER_PSPICE::ProcessNetlist( unsigned aCtl )
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for( unsigned ii = 0; ii < m_masterList->size(); ii++ )
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m_masterList->GetItem( ii )->m_Flag = 0;
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UpdateDirectives( aCtl );
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m_netMap.clear();
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// 0 is reserved for "GND"
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m_netMap["GND"] = 0;
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m_netMap["GND"] = 0; // 0 is reserved for "GND"
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int netIdx = 1;
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m_libraries.clear();
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m_ReferencesAlreadyFound.Clear();
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UpdateDirectives( aCtl );
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for( unsigned sheet_idx = 0; sheet_idx < sheetList.size(); sheet_idx++ )
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{
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// Process component attributes to find Spice directives
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@ -249,6 +263,7 @@ void NETLIST_EXPORTER_PSPICE::ProcessNetlist( unsigned aCtl )
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SCH_FIELD* fieldPrim = comp->FindField( GetSpiceFieldName( SPICE_PRIMITIVE ) );
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SCH_FIELD* fieldModel = comp->FindField( GetSpiceFieldName( SPICE_MODEL ) );
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SCH_FIELD* fieldEnabled = comp->FindField( GetSpiceFieldName( SPICE_ENABLED ) );
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SCH_FIELD* fieldLibFile = comp->FindField( GetSpiceFieldName( SPICE_LIB_FILE ) );
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SCH_FIELD* fieldSeq = comp->FindField( GetSpiceFieldName( SPICE_NODE_SEQUENCE ) );
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spiceItem.m_primitive = fieldPrim ? fieldPrim->GetText()[0]
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@ -260,7 +275,10 @@ void NETLIST_EXPORTER_PSPICE::ProcessNetlist( unsigned aCtl )
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spiceItem.m_refName = comp->GetRef( &sheetList[sheet_idx] );
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// Check to see if component should be removed from Spice netlist
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spiceItem.m_enabled = fieldEnabled ? StringToBool( fieldEnabled->GetText() ) : true;
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spiceItem.m_enabled = fieldEnabled ? StringToBool( fieldEnabled->GetText() ) : true;
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if( fieldLibFile && !fieldLibFile->GetText().IsEmpty() )
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m_libraries.insert( fieldLibFile->GetText() );
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wxArrayString pinNames;
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@ -336,12 +354,12 @@ void NETLIST_EXPORTER_PSPICE::UpdateDirectives( unsigned aCtl )
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{
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wxString directive( tokenizer.GetNextToken() );
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// Fix paths for .include directives
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if( aCtl & NET_ADJUST_INCLUDE_PATHS && m_paths && directive.StartsWith( ".inc" ) )
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if( directive.StartsWith( ".inc" ) )
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{
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wxString file( directive.AfterFirst( ' ' ) );
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wxString path( m_paths->FindValidPath( file ) );
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m_directives.push_back( wxString( ".include " ) + path );
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wxString lib = directive.AfterFirst( ' ' );
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if( !lib.IsEmpty() )
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m_libraries.insert( lib );
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}
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else
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{
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@ -453,5 +471,6 @@ const std::vector<wxString> NETLIST_EXPORTER_PSPICE::m_spiceFields = {
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"Spice_Primitive",
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"Spice_Model",
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"Spice_Netlist_Enabled",
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"Spice_Node_Sequence"
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"Spice_Node_Sequence",
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"Spice_Lib_File"
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};
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@ -154,9 +154,12 @@ protected:
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virtual void writeDirectives( OUTPUTFORMATTER* aFormatter, unsigned aCtl ) const;
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private:
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// Spice directives found in the processed schematic sheet
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///> Spice directives found in the processed schematic sheet
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std::vector<wxString> m_directives;
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///> Libraries used by the simulated circuit
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std::set<wxString> m_libraries;
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NET_INDEX_MAP m_netMap;
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SPICE_ITEM_LIST m_spiceItems;
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