Translated using Weblate (Chinese (Simplified))
Currently translated at 100.0% (9148 of 9148 strings) Translation: KiCad EDA/master source Translate-URL: https://hosted.weblate.org/projects/kicad/master-source/zh_Hans/
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@ -34,8 +34,8 @@ msgstr ""
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"Project-Id-Version: KiCad_zh_CN_Master_v0.0.32\n"
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"Report-Msgid-Bugs-To: \n"
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"POT-Creation-Date: 2024-01-21 16:53-0800\n"
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"PO-Revision-Date: 2024-01-24 01:51+0000\n"
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"Last-Translator: Hubert Hu <qinghan.hu@gmail.com>\n"
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"PO-Revision-Date: 2024-01-24 02:44+0000\n"
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"Last-Translator: 向阳阳 <hinata.hoshino@foxmail.com>\n"
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"Language-Team: Chinese (Simplified) <https://hosted.weblate.org/projects/"
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"kicad/master-source/zh_Hans/>\n"
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"Language: zh_CN\n"
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@ -6335,7 +6335,9 @@ msgstr "从 '%s' 解析数值失败"
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msgid ""
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"'%s' does not appear to be a valid EasyEDA (JLCEDA) Pro project or library "
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"file. Cannot find project.json or device.json."
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msgstr "文件 '%s' 似乎不是有效的 KiCad 工程文件。"
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msgstr ""
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"文件 '%s' 似乎不是有效的 EasyEDA (立创 EDA) 专业版工程文件或者库文件。"
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"无法在其中找到 project.json 或者 device.json。"
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#: common/io/easyedapro/easyedapro_import_utils.cpp:181
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#, c-format
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@ -8385,14 +8387,14 @@ msgstr "Allegro 网表文件"
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#: common/wildcards_and_files_ext.cpp:298
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msgid "EasyEDA (JLCEDA) Std backup archive"
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msgstr "EasyEDA(嘉立创 EDA)标准版备份压缩包"
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msgstr "EasyEDA(立创 EDA)标准版备份压缩包"
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#: common/wildcards_and_files_ext.cpp:304
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#: eeschema/sch_io/easyedapro/sch_io_easyedapro.h:46
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#: eeschema/sch_io/easyedapro/sch_io_easyedapro.h:51
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#: pcbnew/pcb_io/easyedapro/pcb_io_easyedapro.h:51
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msgid "EasyEDA (JLCEDA) Pro files"
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msgstr "EasyEDA(嘉立创 EDA)专业版文件"
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msgstr "EasyEDA(立创 EDA)专业版文件"
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#: common/wildcards_and_files_ext.cpp:310
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#: pcbnew/pcb_io/kicad_sexpr/pcb_io_kicad_sexpr.h:288
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@ -16544,7 +16546,7 @@ msgstr "加载原理图 \"%s\" 时出错:%s"
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#: eeschema/sch_io/easyeda/sch_io_easyeda.h:50
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#: pcbnew/pcb_io/easyeda/pcb_io_easyeda_plugin.h:37
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msgid "EasyEDA (JLCEDA) Std files"
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msgstr "EasyEDA(嘉立创 EDA)标准版文件"
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msgstr "EasyEDA(立创 EDA)标准版文件"
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#: eeschema/sch_io/easyedapro/sch_easyedapro_parser.cpp:72
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#: pcbnew/pcb_io/easyedapro/pcb_io_easyedapro_parser.cpp:73
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@ -23461,11 +23463,11 @@ msgstr "导入 Eagle 工程文件"
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#: kicad/import_project.cpp:142
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msgid "Import EasyEDA Std Backup"
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msgstr "导入 EasyEDA 标准版备份"
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msgstr "导入 EasyEDA (立创 EDA) 标准版备份"
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#: kicad/import_project.cpp:149
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msgid "Import EasyEDA Pro Project"
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msgstr "导入 EasyEDA Pro 工程"
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msgstr "导入 EasyEDA (立创 EDA) 专业版工程"
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#: kicad/kicad.cpp:317
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#, c-format
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@ -23577,19 +23579,19 @@ msgstr "导入 EAGLE CAD XML 原理图和电路板"
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#: kicad/menubar.cpp:116
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msgid "EasyEDA (JLCEDA) Std Backup..."
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msgstr "EasyEDA (JLCEDA) 标准版备份..."
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msgstr "EasyEDA (立创 EDA) 标准版备份..."
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#: kicad/menubar.cpp:117
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msgid "Import EasyEDA (JLCEDA) Standard schematic and board"
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msgstr "导入 EasyEDA (JLCEDA) 原理图和电路板"
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msgstr "导入 EasyEDA (立创 EDA) 原理图和电路板"
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#: kicad/menubar.cpp:121
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msgid "EasyEDA (JLCEDA) Pro Project..."
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msgstr "EasyEDA (JLCEDA) 专业版工程 ..."
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msgstr "EasyEDA (立创 EDA) 专业版工程 ..."
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#: kicad/menubar.cpp:122
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msgid "Import EasyEDA (JLCEDA) Professional schematic and board"
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msgstr "导入 EasyEDA (JLCEDA) 专业版原理图和电路板"
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msgstr "导入 EasyEDA (立创 EDA) 专业版原理图和电路板"
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#: kicad/menubar.cpp:128
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msgid "&Archive Project..."
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@ -34137,7 +34139,7 @@ msgstr "间距 (s):"
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msgid ""
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"Minimum spacing between adjacent tuning segments. The resulting spacing may "
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"be greater based on design rules."
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msgstr "相邻调谐段之间的最小间距。根据设计规则,所产生的间距可能更大。"
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msgstr "相邻等长走线之间的最小间距。根据设计规则,所产生的间距可能更大。"
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#: pcbnew/dialogs/dialog_tuning_pattern_properties_base.cpp:84
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#: pcbnew/dialogs/panel_setup_tuning_patterns_base.cpp:109
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@ -34162,7 +34164,7 @@ msgstr "单侧"
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#: pcbnew/dialogs/dialog_tuning_pattern_properties_base.h:74
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msgid "Tuning Pattern Properties"
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msgstr "调谐模式属性"
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msgstr "等长模式属性"
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#: pcbnew/dialogs/dialog_unused_pad_layers.cpp:51
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msgid "Remove Unused Layers"
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@ -36596,15 +36598,15 @@ msgstr "过孔间距"
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#: pcbnew/dialogs/panel_setup_tuning_patterns_base.cpp:19
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msgid "Default properties for single-track tuning:"
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msgstr "单导线调谐的默认属性:"
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msgstr "单端走线等长的默认属性:"
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#: pcbnew/dialogs/panel_setup_tuning_patterns_base.cpp:148
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msgid "Default properties for differential-pairs:"
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msgstr "差分对的默认属性:"
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msgstr "差分对走线等长的默认属性:"
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#: pcbnew/dialogs/panel_setup_tuning_patterns_base.cpp:283
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msgid "Default properties for differential-pair skews:"
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msgstr "差分对偏移的默认属性:"
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msgstr "差分对走线偏移的默认属性:"
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#: pcbnew/drc/drc_cache_generator.cpp:123
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msgid "Gathering copper items..."
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@ -36655,7 +36657,7 @@ msgstr "网络类 '%s'"
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#: pcbnew/drc/drc_engine.cpp:307
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#, c-format
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msgid "netclass '%s' (diff pair)"
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msgstr "网络类 '%s' (差分队)"
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msgstr "网络类 '%s' (差分对)"
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#: pcbnew/drc/drc_engine.cpp:353
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#, c-format
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@ -38792,15 +38794,15 @@ msgstr "从库 '%s' 加载封装 %s 时出错。"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:259
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#: pcbnew/generators/pcb_tuning_pattern.cpp:1988
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msgid "Tuning Pattern"
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msgstr "调谐模式"
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msgstr "等长模式"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:264
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msgid "Tuning Patterns"
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msgstr "调谐模式"
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msgstr "等长模式"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:417
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msgid "Tuning"
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msgstr "调谐"
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msgstr "等长"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:1288
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msgid "too long"
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@ -38812,11 +38814,11 @@ msgstr "太短"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:1290
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msgid "tuned"
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msgstr "调谐的"
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msgstr "调整就绪"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:1364
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msgid "Edit Tuning Pattern"
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msgstr "编辑调谐模式"
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msgstr "编辑等长模式"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:1834
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msgid "current skew"
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@ -38852,7 +38854,7 @@ msgstr "目标偏移:%s"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:1950
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#: pcbnew/generators/pcb_tuning_pattern.cpp:1972
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msgid "(from tuning pattern properties)"
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msgstr "(来自调谐模式属性)"
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msgstr "(来自等长模式属性)"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:1958
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#, c-format
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@ -38871,7 +38873,7 @@ msgstr "长度约束: %s"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:2178
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msgid "Tune"
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msgstr "调谐"
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msgstr "调整"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:2275
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msgid "Single track"
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@ -38891,7 +38893,7 @@ msgstr "模式属性"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:2306
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msgid "Tuning Mode"
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msgstr "调谐模式"
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msgstr "等长模式"
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#: pcbnew/generators/pcb_tuning_pattern.cpp:2312
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msgid "Min Amplitude"
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@ -40850,7 +40852,7 @@ msgstr "封装 '%s' 无法在工程 '%s' 中找到"
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#: pcbnew/pcb_io/easyedapro/pcb_io_easyedapro.h:40
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#: pcbnew/pcb_io/easyedapro/pcb_io_easyedapro.h:45
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msgid "EasyEDA (JLCEDA) Pro project"
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msgstr "EasyEDA (JLCEDA) 专业版项目"
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msgstr "EasyEDA (立创 EDA) 专业版项目"
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#: pcbnew/pcb_io/fabmaster/import_fabmaster.cpp:249
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#, c-format
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# 此处需要考证step的真正位置以便匹配其翻译
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#: pcbnew/tools/pcb_actions.cpp:195
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msgid "Increase tuning pattern spacing by one step."
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msgstr "将调谐模式间距增大一步。"
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msgstr "将等长间距增大一步。"
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#: pcbnew/tools/pcb_actions.cpp:203
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msgid "Decrease Spacing"
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#: pcbnew/tools/pcb_actions.cpp:204
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msgid "Decrease tuning pattern spacing by one step."
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msgstr "将调谐模式间距减小一步。"
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msgstr "将等长间距减小一步。"
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#: pcbnew/tools/pcb_actions.cpp:212
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msgid "Increase Amplitude"
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#: pcbnew/tools/pcb_actions.cpp:213
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msgid "Increase tuning pattern amplitude by one step."
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msgstr "将调谐模式幅度增大一布。"
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msgstr "将等长蛇形幅度增大一步。"
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#: pcbnew/tools/pcb_actions.cpp:221
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msgid "Decrease Amplitude"
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#: pcbnew/tools/pcb_actions.cpp:222
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msgid "Decrease tuning pattern amplitude by one step."
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msgstr "将调谐模式幅度减小一步。"
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msgstr "将等长蛇形幅度减小一步。"
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#: pcbnew/tools/pcb_actions.cpp:231
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msgid "Add Aligned Dimension"
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