Road map updates.
Update version 5 road map to reflect the actual tasks that will be completed during the current development cycle. Add version 6 road map and add tasks not completed from the version 5 road map and the general road map.
This commit is contained in:
parent
88df496168
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9c758c4010
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@ -34,33 +34,6 @@ This section defines the tasks that affect all or most of KiCad or do not
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fit under as specific part of the code such as the board editor or the
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schematic editor.
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## User Interface Modernization ## {#v5_wxaui}
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**Goal:**
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Give KiCad a more modern user interface with dockable tool bars and windows.
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Create perspectives to allow users to arrange dockable windows as they prefer.
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**Task:**
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- Take advantage of the advanced UI features in wxAui such as detaching and
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hiding.
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- Study ergonomics of various commercial/proprietary PCB applications (when
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in doubt about any particular UI solution, check how it has been done in a
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certain proprietary app that is very popular among OSHW folks and do exactly
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opposite).
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- Clean up menu structure. Menus must allow access to all features of the
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program in a clear and logical way. Currently some functions of Pcbnew are
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accessible only through tool bars
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- Redesign dialogs, make sure they are following same style rules.
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- Check quality of translations. Either fix or remove bad quality translations.
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- Develop a global shortcut manager that allows the user assign arbitrary
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shortcuts for any tool or action.
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**Dependencies:**
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- None
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**Status:**
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- No progress.
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## Search Tree Control ## {#v5_re_search_control}
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**Goal:**
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@ -272,61 +245,6 @@ Provide a method of passing information to other tools via the net list.
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**Status:**
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- No progress.
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## Move Common Schematic Code into a Shared Object ## {#v5_sch_shared_object}
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**Goal:**
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Refactor all schematic object code so that it can be built into a shared object
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for use by the schematic editor, Python module, and linked into third party
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programs.
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**Task**
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- Split schematic object code from schematic and component editor code.
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- Generate shared object from schematic object code.
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- Update build configuration to build schematic and component editors
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against new schematic shared object.
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**Dependencies:**
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- None
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**Progress:**
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- No progress.
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## ERC Improvements ## {#v5_sch_erc_improvements}
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**Goal:**
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Improve the coverage and useability of the electrical rules checker (ERC).
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**Task:**
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- Add warning when multiple labels are defined for a single net. The user should
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be able to disable this warning.
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- Save electrical rules settings to project file between sessions.
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**Dependencies:**
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- None
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**Status:**
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- No progress.
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# CvPcb: Footprint Association Tool # {#v5_cvpcb}
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This section covers the source code of the footprint assignment tool CvPcb.
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## Improved Footprint Search Tool ## {#v5_cvpcb_search}
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**Goal:**
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Provide advanced search features such as wild card and regular expression
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searches using the type as you go feature of the current search dialog.
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**Task:**
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- Add code for wild card and regular expression pattern matching to search
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container objects.
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- Add search dialog to CvPcb to search container of footprint names.
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**Dependencies:**
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- [Search Tree Control](#v5_re_search_control)
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**Status:**
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- Pattern matching added to search container objects.
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# Circuit Simulation # {#simulation}
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**Goal:**
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@ -352,7 +270,7 @@ Provide quality circuit simulation capabilities similar to commercial products.
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- None
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**Status:**
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- Done ([announcement message](https://lists.launchpad.net/kicad-developers/msg25483.html))
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- Complete ([announcement message](https://lists.launchpad.net/kicad-developers/msg25483.html))
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# Pcbnew: Circuit Board Editor # {#v5_pcbnew}
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@ -401,8 +319,6 @@ available in OpenCascade.
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Add finishing touches to push and shove router.
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**Task:**
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- Microwave tools to be added as parametrized shapes generated by Python
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scripts.
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- Determine which features are feasible.
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- Factor out KiCad-specific code from PNS_ROUTER class.
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- Delete and backspace in idle mode
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@ -443,26 +359,6 @@ being selected by filtering.
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**Status:**
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- Initial design concept discussed.
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## Design Rule Check (DRC) Improvements. ## {#v5_drc_improvements}
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**Goal:**
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Create additional DRC tests for improved error checking.
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**Task:**
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- Replace geometry code with [unified geometry library](#v5_geometry_lib).
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- Remove floating point code from clearance calculations to prevent rounding
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errors.
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- Add checks for component, silk screen, and mask clearances.
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- Add checks for keep out zones.
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- Remove DRC related limitations such as no arc or text on copper layers.
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- Add option for saving and loading DRC options.
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**Dependencies:**
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- [Unified geometry library.](#v5_geometry_lib)
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**Progress:**
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- In progress.
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## Segment End Point Snapping. ## {#v5_segment_snapping}
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**Goal:**
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@ -489,42 +385,6 @@ GAL rendering.
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**Progress:**
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- Initial discussion.
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## Net Highlighting ## {#v5_pcb_net_highlight}
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**Goal:**
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Highlight rats nest links and/or traces when corresponding net in Eeschema is selected.
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**Task:**
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- Add communications link to handle net selection from Eeschema.
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- Implement highlight algorithm for objects connected to the selected net.
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- Highlight objects connected to net selected in Eeschema
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**Dependencies:**
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- None.
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**Status:**
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- No progress.
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## Complex Pad Shapes ## {#v5_pcb_complex_pads}
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**Goal:**
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Add capability to create complex pad shapes from existing primitives such as arcs,
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segments, and circles or polygons.
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**Task:**
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- Add new complex pad type.
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- Add code to load and save complex pad type.
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- Add code to convert complex pad type to polygon for DRC testing.
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- Add code to DRC to support complex pad types.
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- Add code to footprint editor to create complex pad types.
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**Dependencies:**
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- [Unified geometry library.](#v5_geometry_lib)
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**Progress:**
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- In progress.
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## Stitching Via Support ## {#v5_pcb_stitching_vias}
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**Goal:**
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@ -540,7 +400,6 @@ that do not require being attached to tracks.
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- Manual via placement tool.
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- Improve the DRC to handle cases of orphaned vias.
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**Dependencies:**
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- None
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@ -0,0 +1,410 @@
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# Version 6 Road Map # {#v6_road_map}
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This document is the KiCad version 6 Developer's road map document. It is
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living document that should be maintained during the version 6 development
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cycle. The goal of this document is to provide an overview for developers
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of the goals for the project for the version 6 release of KiCad. It is
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broken into sections for each major component of the KiCad source code and
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documentation. It defines tasks that developers an use to contribute to the
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project and provides updated status information. Tasks should define clear
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objectives and avoid vague generalizations so that a new developer can complete
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the task. It is not a place for developers to add their own personal wish.
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list. It should only be updated with approval of the project manager after
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discussion with the lead developers.
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Each entry in the road map is made up of four sections. The goal should
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be a brief description of the what the road map entry will accomplish. The
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task section should be a list of deliverable items that are specific enough
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hat they can be documented as completed. The dependencies sections is a list
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of requirements that must be completed before work can begin on any of the
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tasks. The status section should include a list of completed tasks or marked
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as complete as when the goal is met.
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[TOC]
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# General # {#v6_general}
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This section defines the tasks that affect all or most of KiCad or do not
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fit under as specific part of the code such as the board editor or the
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schematic editor.
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## User Interface Modernization ## {#v6_wxaui}
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**Goal:**
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Give KiCad a more modern user interface with dockable tool bars and windows.
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Create perspectives to allow users to arrange dockable windows as they prefer.
|
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|
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**Task:**
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- Take advantage of the advanced UI features in wxAui such as detaching and
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hiding.
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- Study ergonomics of various commercial/proprietary PCB applications (when
|
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in doubt about any particular UI solution, check how it has been done in a
|
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certain proprietary app that is very popular among OSHW folks and do exactly
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opposite).
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- Clean up menu structure. Menus must allow access to all features of the
|
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program in a clear and logical way. Currently some functions of Pcbnew are
|
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accessible only through tool bars
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- Redesign dialogs, make sure they are following same style rules.
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- Check quality of translations. Either fix or remove bad quality translations.
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- Develop a global shortcut manager that allows the user assign arbitrary
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shortcuts for any tool or action.
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**Dependencies:**
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- None
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**Status:**
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- No progress.
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# Eeschema: Schematic Editor # {#v6_eeschema}
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This section applies to the source code for the Eeschema schematic editor.
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## Move Common Schematic Code into a Shared Object ## {#v6_sch_shared_object}
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**Goal:**
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Refactor all schematic object code so that it can be built into a shared object
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for use by the schematic editor, Python module, and linked into third party
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programs.
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**Task**
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- Split schematic object code from schematic and component editor code.
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- Generate shared object from schematic object code.
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- Update build configuration to build schematic and component editors
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against new schematic shared object.
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**Dependencies:**
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- None
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**Progress:**
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- No progress.
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## ERC Improvements ## {#v6_sch_erc_improvements}
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**Goal:**
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Improve the coverage and usability of the electrical rules checker (ERC).
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**Task:**
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- Add warning when multiple labels are defined for a single net. The user should
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be able to disable this warning.
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- Save electrical rules settings to project file between sessions.
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**Dependencies:**
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- None
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**Status:**
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- No progress.
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# Implement GAL and New Tool Framework ## {#v6_sch_gal}
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**Goal:**
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Implement the GAL and the tool framework used by Pcbnew in Eechema to
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provide advanced graphics and tool capabilities.
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**Task:**
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- Implement graphics abstraction layer along side current legacy rendering
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framework.
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**Dependencies:**
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- None
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**Status:**
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- Initial Discussion..
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# Port Editing Tools ## {#v6_sch_tool_framework}
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**Goal:**
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Convert all editing tool to new tool framework.
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-**Task:**
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- Rewrite existing editing tools using the new tool framework.
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- Add new capabilities supported by the new tool framework to existing
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editing tools.
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-**Dependencies:**
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- [GAL and new tool framework port](#v6_sch_gal).
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-**Status:**
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- Initial Discussion..
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## Net Highlighting ## {#v6_sch_net_highlight}
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**Goal:**
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Highlight wires, buses, and junctions when corresponding net in Pcbnew is selected.
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**Task:**
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- Add communications link to handle net selection from Pcbnew.
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- Implement highlight algorithm for net objects.
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- Highlight objects connected to net selected in Pcbnew.
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**Dependencies:**
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- [GAL and new tool framework port, maybe](#v6_sch_gal).
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**Status:**
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- No progress.
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## Component Library Editor Improvements ## {#lib_editor_usability}
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**Goal:**
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Make editing components with multiple units and/or alternate graphical
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representations easier.
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**Task:**
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- Determine usability improvements in the library editor for components with
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multiple units and/or alternate graphical representations.
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- Implement said usability improvements.
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**Dependencies:**
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- None.
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**Status:**
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- No progress.
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## Allow Use of System Fonts ## {#sch_sys_fonts}
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**Goal:**
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Currently the schematic editor uses the stroke drawn fonts which aren't really
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necessary for accurate printing of schematics. Allow the use of system fonts
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for schematic text.
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**Task:**
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- Determine which library for font handling makes the most sense, wxWidgets or
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freetype.
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- Add support for selecting text object fonts.
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**Dependencies:**
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- [S-expression schematic file format](#sch_sexpr).
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**Status:**
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- No progress.
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# CvPcb: Footprint Association Tool # {#v6_cvpcb}
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This section covers the source code of the footprint assignment tool CvPcb.
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## Improved Footprint Search Tool ## {#v6_cvpcb_search}
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**Goal:**
|
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|
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Provide advanced search features such as wild card and regular expression
|
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searches using the type as you go feature of the current search dialog.
|
||||
|
||||
**Task:**
|
||||
- Add code for wild card and regular expression pattern matching to search
|
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container objects.
|
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- Add search dialog to CvPcb to search container of footprint names.
|
||||
|
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**Dependencies:**
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- [Search Tree Control](#v6_re_search_control)
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**Status:**
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- Pattern matching added to search container objects.
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# Pcbnew: Circuit Board Editor # {#v6_pcbnew}
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This section covers the source code of the board editing application Pcbnew.
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## Push and Shove Router Improvements ## {#v6_ps_router_improvements}
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**Goal:**
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Add finishing touches to push and shove router.
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||||
|
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**Task:**
|
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- Microwave tools to be added as parametrized shapes generated by Python
|
||||
scripts.
|
||||
|
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**Dependencies:**
|
||||
- None
|
||||
|
||||
**Status:**
|
||||
- None
|
||||
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## Design Rule Check (DRC) Improvements. ## {#v6_drc_improvements}
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**Goal:**
|
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|
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Create additional DRC tests for improved error checking.
|
||||
|
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**Task:**
|
||||
- Replace geometry code with [unified geometry library](#v6_geometry_lib).
|
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- Remove floating point code from clearance calculations to prevent rounding
|
||||
errors.
|
||||
- Add checks for component, silk screen, and mask clearances.
|
||||
- Add checks for keep out zones.
|
||||
- Remove DRC related limitations such as no arc or text on copper layers.
|
||||
- Add option for saving and loading DRC options.
|
||||
|
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**Dependencies:**
|
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- [Unified geometry library.](#v6_geometry_lib)
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**Progress:**
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- In progress.
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## Linked Objects ## {#v6_pcb_linked_objects}
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**Goal:**
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Provide a way to allow external objects such as footprints to be externally
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linked in the board file so that changes in the footprint are automatically
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updated. This will allow a one to many object relationship which can pave
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the way for reusable board modules.
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**Task:**
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- Add externally and internally linked objects to the file format to allow for
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footprints and/or other board objects to be shared (one to many relationship)
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instead of only supporting embedded objects (one to one relationship) that
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can only be edited in place.
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**Dependencies:**
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- None.
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**Status:**
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- No progress.
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## Pin and Part Swapping ## {#v6_pcb_drc}
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**Goal:**
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Allow Pcbnew to perform pin and/or part swapping during layout so the user
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does not have to do it in Eeschema and re-import the net list.
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**Task:**
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- Provide forward and back annotation between the schematic and board editors.
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- Define netlist file format changes required to handle pin/part swapping.
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- Update netlist file formatter and parser to handle file format changes.
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- Develop a netlist comparison engine that will produce a netlist diff that
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can be passed between the schematic and board editors.
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- Create pin/part swap dialog to manipulate swappable pins and parts.
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- Add support to handle net label back annotation changes.
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**Dependencies:**
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- None
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**Status:**
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- No progress.
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## Keepout Zones. ## {#v6_keepout_zones}
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**Goal:**
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Add support for keepout zones on boards and footprints.
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**Task:**
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- Add keepout support to zone classes.
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- Add keepout zone support to board editor.
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- Add keepout zone support to library editor.
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**Dependencies:**
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- [DRC Improvements.](#v6_drc_improvements)
|
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**Progress:**
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- Planning
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## Clipboard Support ## {#fp_edit_clipboard}
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**Goal:**
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Provide clipboard cut and paste for footprints.
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**Task:**
|
||||
- Clipboard cut and paste to and from clipboard of footprints in footprint
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editor.
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||||
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||||
**Dependencies:**
|
||||
- None
|
||||
|
||||
**Status:**
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||||
- No progress.
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||||
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## Net Highlighting ## {#pcb_net_highlight}
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**Goal:**
|
||||
|
||||
Highlight rats nest links and/or traces when corresponding net in Eeschema is selected.
|
||||
|
||||
**Task:**
|
||||
- Add communications link to handle net selection from Eeschema.
|
||||
- Implement highlight algorithm for objects connected to the selected net.
|
||||
- Highlight objects connected to net selected in Eeschema
|
||||
|
||||
**Dependencies:**
|
||||
- None.
|
||||
|
||||
**Status:**
|
||||
- No progress.
|
||||
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## Hatched Zone Filling ## {#pcb_hatched_zones}
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**Goal:**
|
||||
|
||||
Currently Pcbnew only supports solid zone files. Add option to fill zones
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with hatching.
|
||||
|
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**Task:**
|
||||
- Determine zone fill method, required filling code, and file format requirements.
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||||
- Add hatch option and hatch configuration to zone dialog.
|
||||
|
||||
**Dependencies:**
|
||||
- None.
|
||||
|
||||
**Status:**
|
||||
- No progress.
|
||||
|
||||
## Board Stack Up Impedance Calculator ## {#pcb_impedance_calc}
|
||||
**Goal:**
|
||||
|
||||
Provide a calculator to compute trace impedances using a full board stackup.
|
||||
Maybe this should be included in the PCB calculator application.
|
||||
|
||||
**Task:**
|
||||
- Design a trace impedance calculator that includes full board stackup.
|
||||
|
||||
**Dependencies:**
|
||||
- None.
|
||||
|
||||
**Status:**
|
||||
- No progress.
|
||||
|
||||
## Net Class Improvements ## {#pcb_net_class_improvements}
|
||||
**Goal:**
|
||||
|
||||
Add support for route impedance, color selection, etc in net class object.
|
||||
|
||||
**Task:**
|
||||
- Determine parameters to add to net class object.
|
||||
- Implement file parser and formatter changes to support net class object
|
||||
changes.
|
||||
- Implement tools to work with new net class parameters.
|
||||
- Create UI elements to configure new net class parameters.
|
||||
- Update the render tab UI code to view traces by net class.
|
||||
|
||||
**Dependencies:**
|
||||
- None.
|
||||
|
||||
**Status:**
|
||||
- No progress.
|
||||
|
||||
## Ratsnest Improvements ## {#pcb_ratsnest_improvements}
|
||||
**Goal:**
|
||||
|
||||
Add support for per net color and visibility settings.
|
||||
|
||||
**Task:**
|
||||
- Implement UI code to configure ratsnest color and visibility.
|
||||
- Update ratsnest code to handle per net color and visibility.
|
||||
|
||||
**Dependencies:**
|
||||
- None.
|
||||
|
||||
**Status:**
|
||||
- No progress.
|
||||
|
||||
|
||||
# GerbView: Gerber File Viewer # {#v6_gerbview}
|
||||
|
||||
This section covers the source code for the GerbView gerber file viewer.
|
||||
|
||||
## Graphics Abstraction Layer ## {#v6_gerbview_gal}
|
||||
**Goal:**
|
||||
|
||||
Graphics rendering unification.
|
||||
|
||||
**Task:**
|
||||
- Port graphics rendering layer to GAL.
|
||||
|
||||
**Dependencies:**
|
||||
- None.
|
||||
|
||||
**Status**
|
||||
- No progress.
|
Loading…
Reference in New Issue