Cleanup some dead code and make better use of iterators.

Also applies coding style around auto and lambdas.
This commit is contained in:
Jeff Young 2020-08-27 00:52:12 +01:00
parent 8b7c0cbe04
commit 9e12ea9bb6
18 changed files with 187 additions and 429 deletions

View File

@ -646,10 +646,8 @@ void BOARD_ADAPTER::createLayers( REPORTER* aStatusReporter )
std::vector<std::pair<const ZONE_CONTAINER*, PCB_LAYER_ID>> zones; std::vector<std::pair<const ZONE_CONTAINER*, PCB_LAYER_ID>> zones;
for( int i = 0; i < m_board->GetAreaCount(); i++ ) for( ZONE_CONTAINER* zone : m_board->Zones() )
{ {
const ZONE_CONTAINER* zone = m_board->GetArea( i );
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() ) for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
zones.emplace_back( std::make_pair( zone, layer ) ); zones.emplace_back( std::make_pair( zone, layer ) );
} }
@ -938,23 +936,15 @@ void BOARD_ADAPTER::createLayers( REPORTER* aStatusReporter )
// Draw non copper zones // Draw non copper zones
if( GetFlag( FL_ZONE ) ) if( GetFlag( FL_ZONE ) )
{ {
for( int ii = 0; ii < m_board->GetAreaCount(); ++ii ) for( ZONE_CONTAINER* zone : m_board->Zones() )
{ {
ZONE_CONTAINER* zone = m_board->GetArea( ii ); if( zone->IsOnLayer( curr_layer_id ) )
if( !zone->IsOnLayer( curr_layer_id ) )
continue;
AddSolidAreasShapesToContainer( zone, layerContainer, curr_layer_id ); AddSolidAreasShapesToContainer( zone, layerContainer, curr_layer_id );
} }
for( int ii = 0; ii < m_board->GetAreaCount(); ++ii ) for( ZONE_CONTAINER* zone : m_board->Zones() )
{ {
ZONE_CONTAINER* zone = m_board->GetArea( ii ); if( zone->IsOnLayer( curr_layer_id ) )
if( !zone->IsOnLayer( curr_layer_id ) )
continue;
zone->TransformSolidAreasShapesToPolygon( curr_layer_id, *layerPoly ); zone->TransformSolidAreasShapesToPolygon( curr_layer_id, *layerPoly );
} }
} }

View File

@ -24,11 +24,8 @@
*/ */
#include <fctsys.h> #include <fctsys.h>
#include <pcbnew.h>
#include <class_board.h> #include <class_board.h>
#include <class_board_item.h> #include <class_board_item.h>
#include <connectivity/connectivity_data.h> #include <connectivity/connectivity_data.h>
using namespace std::placeholders; using namespace std::placeholders;
@ -50,11 +47,6 @@ bool BOARD_CONNECTED_ITEM::SetNetCode( int aNetCode, bool aNoAssert )
// set the m_netinfo to the dummy NETINFO_LIST::ORPHANED // set the m_netinfo to the dummy NETINFO_LIST::ORPHANED
BOARD* board = GetBoard(); BOARD* board = GetBoard();
//auto connectivity = board ? board->GetConnectivity() : nullptr;
//bool addRatsnest = false;
//if( connectivity )
//addRatsnest = connectivity->Remove( this );
if( ( aNetCode >= 0 ) && board ) if( ( aNetCode >= 0 ) && board )
m_netinfo = board->FindNet( aNetCode ); m_netinfo = board->FindNet( aNetCode );
@ -64,10 +56,6 @@ bool BOARD_CONNECTED_ITEM::SetNetCode( int aNetCode, bool aNoAssert )
if( !aNoAssert ) if( !aNoAssert )
wxASSERT( m_netinfo ); wxASSERT( m_netinfo );
// Add only if it was previously added to the ratsnest
//if( addRatsnest )
// connectivity->Add( this );
return ( m_netinfo != NULL ); return ( m_netinfo != NULL );
} }

View File

@ -86,10 +86,8 @@ void BOARD::ConvertBrdLayerToPolygonalContours( PCB_LAYER_ID aLayer, SHAPE_POLY_
} }
// convert copper zones // convert copper zones
for( int ii = 0; ii < GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : Zones() )
{ {
ZONE_CONTAINER* zone = GetArea( ii );
if( zone->GetLayerSet().test( aLayer ) ) if( zone->GetLayerSet().test( aLayer ) )
zone->TransformSolidAreasShapesToPolygon( aLayer, aOutlines ); zone->TransformSolidAreasShapesToPolygon( aLayer, aOutlines );
} }

View File

@ -102,30 +102,25 @@ BOARD::BOARD() :
BOARD::~BOARD() BOARD::~BOARD()
{ {
while( m_ZoneDescriptorList.size() )
{
ZONE_CONTAINER* area_to_remove = m_ZoneDescriptorList[0];
Delete( area_to_remove );
}
// Clean up the owned elements // Clean up the owned elements
DeleteMARKERs(); DeleteMARKERs();
DeleteZONEOutlines();
// Delete the modules for( ZONE_CONTAINER* zone : m_zones )
for( auto m : m_modules ) delete zone;
m_zones.clear();
for( MODULE* m : m_modules )
delete m; delete m;
m_modules.clear(); m_modules.clear();
// Delete the tracks for( TRACK* t : m_tracks )
for( auto t : m_tracks )
delete t; delete t;
m_tracks.clear(); m_tracks.clear();
// Delete the drawings for ( BOARD_ITEM* d : m_drawings )
for (auto d : m_drawings )
delete d; delete d;
m_drawings.clear(); m_drawings.clear();
@ -246,7 +241,7 @@ TRACKS BOARD::TracksInNet( int aNetCode )
{ {
TRACKS ret; TRACKS ret;
INSPECTOR_FUNC inspector = [aNetCode,&ret] ( EDA_ITEM* item, void* testData ) INSPECTOR_FUNC inspector = [aNetCode, &ret]( EDA_ITEM* item, void* testData )
{ {
TRACK* t = (TRACK*) item; TRACK* t = (TRACK*) item;
@ -283,19 +278,15 @@ const PCB_LAYER_ID BOARD::GetLayerID( const wxString& aLayerName ) const
for( LAYER_NUM layer = 0; layer < PCB_LAYER_ID_COUNT; ++layer ) for( LAYER_NUM layer = 0; layer < PCB_LAYER_ID_COUNT; ++layer )
{ {
if ( IsCopperLayer( layer ) && ( m_Layer[ layer ].m_name == aLayerName ) ) if ( IsCopperLayer( layer ) && ( m_Layer[ layer ].m_name == aLayerName ) )
{
return ToLAYER_ID( layer ); return ToLAYER_ID( layer );
} }
}
// Otherwise fall back to the system standard layer names // Otherwise fall back to the system standard layer names
for( LAYER_NUM layer = 0; layer < PCB_LAYER_ID_COUNT; ++layer ) for( LAYER_NUM layer = 0; layer < PCB_LAYER_ID_COUNT; ++layer )
{ {
if( GetStandardLayerName( ToLAYER_ID( layer ) ) == aLayerName ) if( GetStandardLayerName( ToLAYER_ID( layer ) ) == aLayerName )
{
return ToLAYER_ID( layer ); return ToLAYER_ID( layer );
} }
}
return UNDEFINED_LAYER; return UNDEFINED_LAYER;
} }
@ -376,29 +367,14 @@ bool BOARD::SetLayerType( PCB_LAYER_ID aLayer, LAYER_T aLayerType )
const char* LAYER::ShowType( LAYER_T aType ) const char* LAYER::ShowType( LAYER_T aType )
{ {
const char* cp;
switch( aType ) switch( aType )
{ {
default: default:
case LT_SIGNAL: case LT_SIGNAL: return "signal";
cp = "signal"; case LT_POWER: return "power";
break; case LT_MIXED: return "mixed";
case LT_JUMPER: return "jumper";
case LT_POWER:
cp = "power";
break;
case LT_MIXED:
cp = "mixed";
break;
case LT_JUMPER:
cp = "jumper";
break;
} }
return cp;
} }
@ -507,20 +483,17 @@ void BOARD::SetElementVisibility( GAL_LAYER_ID aLayer, bool isEnabled )
// because we have a tool to show/hide ratsnest relative to a pad or a module // because we have a tool to show/hide ratsnest relative to a pad or a module
// so the hide/show option is a per item selection // so the hide/show option is a per item selection
for( auto track : Tracks() ) for( TRACK* track : Tracks() )
track->SetLocalRatsnestVisible( isEnabled ); track->SetLocalRatsnestVisible( isEnabled );
for( auto mod : Modules() ) for( MODULE* mod : Modules() )
{ {
for( auto pad : mod->Pads() ) for( D_PAD* pad : mod->Pads() )
pad->SetLocalRatsnestVisible( isEnabled ); pad->SetLocalRatsnestVisible( isEnabled );
} }
for( int i = 0; i<GetAreaCount(); i++ ) for( ZONE_CONTAINER* zone : Zones() )
{
auto zone = GetArea( i );
zone->SetLocalRatsnestVisible( isEnabled ); zone->SetLocalRatsnestVisible( isEnabled );
}
break; break;
} }
@ -574,7 +547,7 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, ADD_MODE aMode )
// this one uses a vector // this one uses a vector
case PCB_ZONE_AREA_T: case PCB_ZONE_AREA_T:
m_ZoneDescriptorList.push_back( (ZONE_CONTAINER*) aBoardItem ); m_zones.push_back( (ZONE_CONTAINER*) aBoardItem );
break; break;
case PCB_TRACE_T: case PCB_TRACE_T:
@ -649,35 +622,27 @@ void BOARD::Remove( BOARD_ITEM* aBoardItem )
} }
case PCB_MARKER_T: case PCB_MARKER_T:
m_markers.erase( std::remove_if( m_markers.begin(), m_markers.end(),
// find the item in the vector, then remove it [aBoardItem]( BOARD_ITEM* aItem )
for( unsigned i = 0; i<m_markers.size(); ++i )
{ {
if( m_markers[i] == (MARKER_PCB*) aBoardItem ) return aItem == aBoardItem;
{ } ) );
m_markers.erase( m_markers.begin() + i );
break;
}
}
break; break;
case PCB_GROUP_T: case PCB_GROUP_T:
m_groups.erase( std::remove_if( m_groups.begin(), m_groups.end(), m_groups.erase( std::remove_if( m_groups.begin(), m_groups.end(),
[aBoardItem]( BOARD_ITEM* aItem ){ return aItem == aBoardItem; } ) ); [aBoardItem]( BOARD_ITEM* aItem )
{
return aItem == aBoardItem;
} ) );
break; break;
case PCB_ZONE_AREA_T: // this one uses a vector case PCB_ZONE_AREA_T:
// find the item in the vector, then delete then erase it. m_zones.erase( std::remove_if( m_zones.begin(), m_zones.end(),
for( unsigned i = 0; i<m_ZoneDescriptorList.size(); ++i ) [aBoardItem]( BOARD_ITEM* aItem )
{ {
if( m_ZoneDescriptorList[i] == (ZONE_CONTAINER*) aBoardItem ) return aItem == aBoardItem;
{ } ) );
m_ZoneDescriptorList.erase( m_ZoneDescriptorList.begin() + i );
break;
}
}
break; break;
case PCB_MODULE_T: case PCB_MODULE_T:
@ -758,24 +723,16 @@ void BOARD::DeleteMARKERs( bool aWarningsAndErrors, bool aExclusions )
} }
void BOARD::DeleteZONEOutlines()
{
// the vector does not know how to delete the ZONE Outlines, it holds pointers
for( ZONE_CONTAINER* zone : m_ZoneDescriptorList )
delete zone;
m_ZoneDescriptorList.clear();
}
BOARD_ITEM* BOARD::GetItem( const KIID& aID ) BOARD_ITEM* BOARD::GetItem( const KIID& aID )
{ {
if( aID == niluuid ) if( aID == niluuid )
return nullptr; return nullptr;
for( TRACK* track : Tracks() ) for( TRACK* track : Tracks() )
{
if( track->m_Uuid == aID ) if( track->m_Uuid == aID )
return track; return track;
}
for( MODULE* module : Modules() ) for( MODULE* module : Modules() )
{ {
@ -783,8 +740,10 @@ BOARD_ITEM* BOARD::GetItem( const KIID& aID )
return module; return module;
for( D_PAD* pad : module->Pads() ) for( D_PAD* pad : module->Pads() )
{
if( pad->m_Uuid == aID ) if( pad->m_Uuid == aID )
return pad; return pad;
}
if( module->Reference().m_Uuid == aID ) if( module->Reference().m_Uuid == aID )
return &module->Reference(); return &module->Reference();
@ -793,25 +752,35 @@ BOARD_ITEM* BOARD::GetItem( const KIID& aID )
return &module->Value(); return &module->Value();
for( BOARD_ITEM* drawing : module->GraphicalItems() ) for( BOARD_ITEM* drawing : module->GraphicalItems() )
{
if( drawing->m_Uuid == aID )
return drawing;
}
}
for( ZONE_CONTAINER* zone : Zones() )
{
if( zone->m_Uuid == aID )
return zone;
}
for( BOARD_ITEM* drawing : Drawings() )
{
if( drawing->m_Uuid == aID ) if( drawing->m_Uuid == aID )
return drawing; return drawing;
} }
for( ZONE_CONTAINER* zone : Zones() )
if( zone->m_Uuid == aID )
return zone;
for( BOARD_ITEM* drawing : Drawings() )
if( drawing->m_Uuid == aID )
return drawing;
for( MARKER_PCB* marker : m_markers ) for( MARKER_PCB* marker : m_markers )
{
if( marker->m_Uuid == aID ) if( marker->m_Uuid == aID )
return marker; return marker;
}
for( PCB_GROUP* group : m_groups ) for( PCB_GROUP* group : m_groups )
{
if( group->m_Uuid == aID ) if( group->m_Uuid == aID )
return group; return group;
}
if( m_Uuid == aID ) if( m_Uuid == aID )
return this; return this;
@ -857,9 +826,10 @@ void BOARD::FillItemMap( std::map<KIID, EDA_ITEM*>& aMap )
unsigned BOARD::GetNodesCount( int aNet ) unsigned BOARD::GetNodesCount( int aNet )
{ {
unsigned retval = 0; unsigned retval = 0;
for( auto mod : Modules() )
for( MODULE* mod : Modules() )
{ {
for( auto pad : mod->Pads() ) for( D_PAD* pad : mod->Pads() )
{ {
if( ( aNet == -1 && pad->GetNetCode() > 0 ) || aNet == pad->GetNetCode() ) if( ( aNet == -1 && pad->GetNetCode() > 0 ) || aNet == pad->GetNetCode() )
retval++; retval++;
@ -884,7 +854,7 @@ EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const
&& PgmOrNull() && !PgmOrNull()->m_Printing; && PgmOrNull() && !PgmOrNull()->m_Printing;
// Check segments, dimensions, texts, and fiducials // Check segments, dimensions, texts, and fiducials
for( auto item : m_drawings ) for( BOARD_ITEM* item : m_drawings )
{ {
if( aBoardEdgesOnly && ( item->GetLayer() != Edge_Cuts ) ) if( aBoardEdgesOnly && ( item->GetLayer() != Edge_Cuts ) )
continue; continue;
@ -894,14 +864,14 @@ EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const
} }
// Check modules // Check modules
for( auto module : m_modules ) for( MODULE* module : m_modules )
{ {
if( !( module->GetLayerSet() & visible ).any() ) if( !( module->GetLayerSet() & visible ).any() )
continue; continue;
if( aBoardEdgesOnly ) if( aBoardEdgesOnly )
{ {
for( const auto edge : module->GraphicalItems() ) for( const BOARD_ITEM* edge : module->GraphicalItems() )
{ {
if( edge->GetLayer() == Edge_Cuts ) if( edge->GetLayer() == Edge_Cuts )
area.Merge( edge->GetBoundingBox() ); area.Merge( edge->GetBoundingBox() );
@ -916,14 +886,14 @@ EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const
if( !aBoardEdgesOnly ) if( !aBoardEdgesOnly )
{ {
// Check tracks // Check tracks
for( auto track : m_tracks ) for( TRACK* track : m_tracks )
{ {
if( ( track->GetLayerSet() & visible ).any() ) if( ( track->GetLayerSet() & visible ).any() )
area.Merge( track->GetBoundingBox() ); area.Merge( track->GetBoundingBox() );
} }
// Check zones // Check zones
for( auto aZone : m_ZoneDescriptorList ) for( ZONE_CONTAINER* aZone : m_zones )
{ {
if( ( aZone->GetLayerSet() & visible ).any() ) if( ( aZone->GetLayerSet() & visible ).any() )
area.Merge( aZone->GetBoundingBox() ); area.Merge( aZone->GetBoundingBox() );
@ -940,7 +910,7 @@ void BOARD::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PANEL_ITEM>
int viasCount = 0; int viasCount = 0;
int trackSegmentsCount = 0; int trackSegmentsCount = 0;
for( auto item : m_tracks ) for( TRACK* item : m_tracks )
{ {
if( item->Type() == PCB_VIA_T ) if( item->Type() == PCB_VIA_T )
viasCount++; viasCount++;
@ -1052,51 +1022,8 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR inspector, void* testData, const KICAD_T s
break; break;
} }
;
break; break;
#if 0 // both these are on same list, so we must scan it twice in order
// to get VIA priority, using new #else code below.
// But we are not using separate lists for TRACKs and VIA, because
// items are ordered (sorted) in the linked
// list by netcode AND by physical distance:
// when created, if a track or via is connected to an existing track or
// via, it is put in linked list after this existing track or via
// So usually, connected tracks or vias are grouped in this list
// So the algorithm (used in ratsnest computations) which computes the
// track connectivity is faster (more than 100 time regarding to
// a non ordered list) because when it searches for a connection, first
// it tests the near (near in term of linked list) 50 items
// from the current item (track or via) in test.
// Usually, because of this sort, a connected item (if exists) is
// found.
// If not found (and only in this case) an exhaustive (and time
// consuming) search is made, but this case is statistically rare.
case PCB_VIA_T:
case PCB_TRACE_T:
case PCB_ARC_T:
result = IterateForward( m_Track, inspector, testData, p );
// skip over any types handled in the above call.
for( ; ; )
{
switch( stype = *++p )
{
case PCB_VIA_T:
case PCB_TRACE_T:
case PCB_ARC_T:
continue;
default:
;
}
break;
}
break;
#else
case PCB_VIA_T: case PCB_VIA_T:
result = IterateForward<TRACK*>( m_tracks, inspector, testData, p ); result = IterateForward<TRACK*>( m_tracks, inspector, testData, p );
++p; ++p;
@ -1107,14 +1034,11 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR inspector, void* testData, const KICAD_T s
result = IterateForward<TRACK*>( m_tracks, inspector, testData, p ); result = IterateForward<TRACK*>( m_tracks, inspector, testData, p );
++p; ++p;
break; break;
#endif
case PCB_MARKER_T: case PCB_MARKER_T:
for( MARKER_PCB* marker : m_markers )
// MARKER_PCBS are in the m_markers std::vector
for( unsigned i = 0; i<m_markers.size(); ++i )
{ {
result = m_markers[i]->Visit( inspector, testData, p ); result = marker->Visit( inspector, testData, p );
if( result == SEARCH_RESULT::QUIT ) if( result == SEARCH_RESULT::QUIT )
break; break;
@ -1124,11 +1048,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR inspector, void* testData, const KICAD_T s
break; break;
case PCB_ZONE_AREA_T: case PCB_ZONE_AREA_T:
for( ZONE_CONTAINER* zone : m_zones)
// PCB_ZONE_AREA_T are in the m_ZoneDescriptorList std::vector
for( unsigned i = 0; i< m_ZoneDescriptorList.size(); ++i )
{ {
result = m_ZoneDescriptorList[i]->Visit( inspector, testData, p ); result = zone->Visit( inspector, testData, p );
if( result == SEARCH_RESULT::QUIT ) if( result == SEARCH_RESULT::QUIT )
break; break;
@ -1183,7 +1105,7 @@ MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const
// search only for MODULES // search only for MODULES
static const KICAD_T scanTypes[] = { PCB_MODULE_T, EOT }; static const KICAD_T scanTypes[] = { PCB_MODULE_T, EOT };
INSPECTOR_FUNC inspector = [&] ( EDA_ITEM* item, void* testData ) INSPECTOR_FUNC inspector = [&]( EDA_ITEM* item, void* testData )
{ {
MODULE* module = (MODULE*) item; MODULE* module = (MODULE*) item;
@ -1356,30 +1278,28 @@ int BOARD::SetAreasNetCodesFromNetNames()
{ {
int error_count = 0; int error_count = 0;
for( int ii = 0; ii < GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : Zones() )
{ {
ZONE_CONTAINER* it = GetArea( ii ); if( !zone->IsOnCopperLayer() )
if( !it->IsOnCopperLayer() )
{ {
it->SetNetCode( NETINFO_LIST::UNCONNECTED ); zone->SetNetCode( NETINFO_LIST::UNCONNECTED );
continue; continue;
} }
if( it->GetNetCode() != 0 ) // i.e. if this zone is connected to a net if( zone->GetNetCode() != 0 ) // i.e. if this zone is connected to a net
{ {
const NETINFO_ITEM* net = it->GetNet(); const NETINFO_ITEM* net = zone->GetNet();
if( net ) if( net )
{ {
it->SetNetCode( net->GetNet() ); zone->SetNetCode( net->GetNet() );
} }
else else
{ {
error_count++; error_count++;
// keep Net Name and set m_NetCode to -1 : error flag. // keep Net Name and set m_NetCode to -1 : error flag.
it->SetNetCode( -1 ); zone->SetNetCode( -1 );
} }
} }
} }
@ -1683,21 +1603,17 @@ std::list<ZONE_CONTAINER*> BOARD::GetZoneList( bool aIncludeZonesInFootprints )
{ {
std::list<ZONE_CONTAINER*> zones; std::list<ZONE_CONTAINER*> zones;
for( int ii = 0; ii < GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : Zones() )
{ zones.push_back( zone );
zones.push_back( GetArea( ii ) );
}
if( aIncludeZonesInFootprints ) if( aIncludeZonesInFootprints )
{ {
for( MODULE* mod : m_modules ) for( MODULE* mod : m_modules )
{ {
for( MODULE_ZONE_CONTAINER* zone : mod->Zones() ) for( MODULE_ZONE_CONTAINER* zone : mod->Zones() )
{
zones.push_back( zone ); zones.push_back( zone );
} }
} }
}
return zones; return zones;
} }
@ -1706,10 +1622,17 @@ std::list<ZONE_CONTAINER*> BOARD::GetZoneList( bool aIncludeZonesInFootprints )
ZONE_CONTAINER* BOARD::AddArea( PICKED_ITEMS_LIST* aNewZonesList, int aNetcode, PCB_LAYER_ID aLayer, ZONE_CONTAINER* BOARD::AddArea( PICKED_ITEMS_LIST* aNewZonesList, int aNetcode, PCB_LAYER_ID aLayer,
wxPoint aStartPointPosition, ZONE_BORDER_DISPLAY_STYLE aHatch ) wxPoint aStartPointPosition, ZONE_BORDER_DISPLAY_STYLE aHatch )
{ {
ZONE_CONTAINER* new_area = InsertArea( aNetcode, ZONE_CONTAINER* new_area = new ZONE_CONTAINER( this );
m_ZoneDescriptorList.size( ) - 1,
aLayer, aStartPointPosition.x, new_area->SetNetCode( aNetcode );
aStartPointPosition.y, aHatch ); new_area->SetLayer( aLayer );
m_zones.push_back( new_area );
new_area->SetHatchStyle( (ZONE_BORDER_DISPLAY_STYLE) aHatch );
// Add the first corner to the new zone
new_area->AppendCorner( aStartPointPosition, -1 );
if( aNewZonesList ) if( aNewZonesList )
{ {
@ -1739,32 +1662,10 @@ void BOARD::RemoveArea( PICKED_ITEMS_LIST* aDeletedList, ZONE_CONTAINER* area_to
} }
ZONE_CONTAINER* BOARD::InsertArea( int aNetcode, int aAreaIdx, PCB_LAYER_ID aLayer, int aCornerX,
int aCornerY, ZONE_BORDER_DISPLAY_STYLE aHatch )
{
ZONE_CONTAINER* new_area = new ZONE_CONTAINER( this );
new_area->SetNetCode( aNetcode );
new_area->SetLayer( aLayer );
if( aAreaIdx < (int) ( m_ZoneDescriptorList.size() - 1 ) )
m_ZoneDescriptorList.insert( m_ZoneDescriptorList.begin() + aAreaIdx + 1, new_area );
else
m_ZoneDescriptorList.push_back( new_area );
new_area->SetHatchStyle( (ZONE_BORDER_DISPLAY_STYLE) aHatch );
// Add the first corner to the new zone
new_area->AppendCorner( wxPoint( aCornerX, aCornerY ), -1 );
return new_area;
}
bool BOARD::NormalizeAreaPolygon( PICKED_ITEMS_LIST * aNewZonesList, ZONE_CONTAINER* aCurrArea ) bool BOARD::NormalizeAreaPolygon( PICKED_ITEMS_LIST * aNewZonesList, ZONE_CONTAINER* aCurrArea )
{ {
// mark all areas as unmodified except this one, if modified // mark all areas as unmodified except this one, if modified
for( ZONE_CONTAINER* zone : m_ZoneDescriptorList ) for( ZONE_CONTAINER* zone : m_zones )
zone->SetLocalFlags( 0 ); zone->SetLocalFlags( 0 );
aCurrArea->SetLocalFlags( 1 ); aCurrArea->SetLocalFlags( 1 );
@ -1851,58 +1752,28 @@ unsigned BOARD::GetPadCount()
{ {
unsigned retval = 0; unsigned retval = 0;
for( auto mod : Modules() ) for( MODULE* mod : Modules() )
retval += mod->Pads().size(); retval += mod->Pads().size();
return retval; return retval;
} }
/**
* Function GetPad
* @return D_PAD* - at the \a aIndex
*/
D_PAD* BOARD::GetPad( unsigned aIndex ) const
{
unsigned count = 0;
for( auto mod : m_modules )
{
for( auto pad : mod->Pads() )
{
if( count == aIndex )
return pad;
count++;
}
}
return nullptr;
}
const std::vector<BOARD_CONNECTED_ITEM*> BOARD::AllConnectedItems() const std::vector<BOARD_CONNECTED_ITEM*> BOARD::AllConnectedItems()
{ {
std::vector<BOARD_CONNECTED_ITEM*> items; std::vector<BOARD_CONNECTED_ITEM*> items;
for( auto track : Tracks() ) for( TRACK* track : Tracks() )
{
items.push_back( track ); items.push_back( track );
}
for( auto mod : Modules() ) for( MODULE* mod : Modules() )
{
for( auto pad : mod->Pads() )
{ {
for( D_PAD* pad : mod->Pads() )
items.push_back( pad ); items.push_back( pad );
} }
}
for( int i = 0; i<GetAreaCount(); i++ ) for( ZONE_CONTAINER* zone : Zones() )
{
auto zone = GetArea( i );
items.push_back( zone ); items.push_back( zone );
}
return items; return items;
} }
@ -2006,6 +1877,7 @@ PCB_GROUP* BOARD::TopLevelGroup( BOARD_ITEM* item, PCB_GROUP* scope )
for( PCB_GROUP* group : m_groups ) for( PCB_GROUP* group : m_groups )
{ {
BOARD_ITEM* toFind = ( candidate == NULL ) ? item : candidate; BOARD_ITEM* toFind = ( candidate == NULL ) ? item : candidate;
if( group->GetItems().find( toFind ) != group->GetItems().end() ) if( group->GetItems().find( toFind ) != group->GetItems().end() )
{ {
if( scope == group && candidate != NULL ) if( scope == group && candidate != NULL )

View File

@ -186,7 +186,7 @@ private:
MODULES m_modules; MODULES m_modules;
TRACKS m_tracks; TRACKS m_tracks;
GROUPS m_groups; GROUPS m_groups;
ZONE_CONTAINERS m_ZoneDescriptorList; ZONE_CONTAINERS m_zones;
LAYER m_Layer[PCB_LAYER_ID_COUNT]; LAYER m_Layer[PCB_LAYER_ID_COUNT];
@ -251,7 +251,8 @@ public:
DRAWINGS& Drawings() { return m_drawings; } DRAWINGS& Drawings() { return m_drawings; }
ZONE_CONTAINERS& Zones() { return m_ZoneDescriptorList; } ZONE_CONTAINERS& Zones() { return m_zones; }
const ZONE_CONTAINERS& Zones() const { return m_zones; }
MARKERS& Markers() { return m_markers; } MARKERS& Markers() { return m_markers; }
@ -290,8 +291,7 @@ public:
bool IsEmpty() const bool IsEmpty() const
{ {
return m_drawings.empty() && m_modules.empty() && m_tracks.empty() && return m_drawings.empty() && m_modules.empty() && m_tracks.empty() && m_zones.empty();
m_ZoneDescriptorList.empty();
} }
void Move( const wxPoint& aMoveVector ) override; void Move( const wxPoint& aMoveVector ) override;
@ -353,12 +353,6 @@ public:
void DeleteMARKERs( bool aWarningsAndErrors, bool aExclusions ); void DeleteMARKERs( bool aWarningsAndErrors, bool aExclusions );
/**
* Function DeleteZONEOutlines
* deletes ALL zone outlines from the board.
*/
void DeleteZONEOutlines();
PROJECT* GetProject() const { return m_project; } PROJECT* GetProject() const { return m_project; }
/** /**
@ -681,12 +675,6 @@ public:
*/ */
unsigned GetPadCount(); unsigned GetPadCount();
/**
* Function GetPad
* @return D_PAD* - at the \a aIndex
*/
D_PAD* GetPad( unsigned aIndex ) const;
/** /**
* Function GetPads * Function GetPads
* returns a reference to a list of all the pads. The returned list is not * returns a reference to a list of all the pads. The returned list is not
@ -870,7 +858,7 @@ public:
* @return : error count * @return : error count
* For non copper areas, netcode is set to 0 * For non copper areas, netcode is set to 0
*/ */
int SetAreasNetCodesFromNetNames( void ); int SetAreasNetCodesFromNetNames();
/** /**
* Function GetArea * Function GetArea
@ -880,29 +868,12 @@ public:
*/ */
ZONE_CONTAINER* GetArea( int index ) const ZONE_CONTAINER* GetArea( int index ) const
{ {
if( (unsigned) index < m_ZoneDescriptorList.size() ) if( (unsigned) index < m_zones.size() )
return m_ZoneDescriptorList[index]; return m_zones[index];
return NULL; return NULL;
} }
/**
* Function GetAreaIndex
* returns the Area Index for the given Zone Container.
* @param aArea :The ZONE_CONTAINER to find.
* @return an Area Index in m_ZoneDescriptorList or -1 if non found.
*/
int GetAreaIndex( const ZONE_CONTAINER* aArea ) const
{
for( int ii = 0; ii < GetAreaCount(); ii++ ) // Search for aArea in list
{
if( aArea == GetArea( ii ) ) // Found !
return ii;
}
return -1;
}
/** /**
* Function GetZoneList * Function GetZoneList
* @return a std::list of pointers to all board zones (possibly including zones in footprints) * @return a std::list of pointers to all board zones (possibly including zones in footprints)
@ -915,7 +886,7 @@ public:
*/ */
int GetAreaCount() const int GetAreaCount() const
{ {
return static_cast<int>( m_ZoneDescriptorList.size() ); return static_cast<int>( m_zones.size() );
} }
/* Functions used in test, merge and cut outlines */ /* Functions used in test, merge and cut outlines */
@ -934,19 +905,6 @@ public:
ZONE_CONTAINER* AddArea( PICKED_ITEMS_LIST* aNewZonesList, int aNetcode, PCB_LAYER_ID aLayer, ZONE_CONTAINER* AddArea( PICKED_ITEMS_LIST* aNewZonesList, int aNetcode, PCB_LAYER_ID aLayer,
wxPoint aStartPointPosition, ZONE_BORDER_DISPLAY_STYLE aHatch ); wxPoint aStartPointPosition, ZONE_BORDER_DISPLAY_STYLE aHatch );
/**
* Add a copper area to net, inserting after m_ZoneDescriptorList[aAreaIdx]
* @param aNetcode is the netcode of the new copper zone
* @param aAreaIdx is the netcode of the new copper zone
* @param aLayer is the copper layer id of the new copper zone
* @param aCornerX,aCornerY is the coordinate of the first corner
* (a zone cannot have a empty outline)
* @param aHatch is the hatch option
* @return pointer to the new area
*/
ZONE_CONTAINER* InsertArea( int aNetcode, int aAreaIdx, PCB_LAYER_ID aLayer, int aCornerX,
int aCornerY, ZONE_BORDER_DISPLAY_STYLE aHatch );
/** /**
* Function NormalizeAreaPolygon * Function NormalizeAreaPolygon
* Process an area that has been modified, by normalizing its polygon against itself. * Process an area that has been modified, by normalizing its polygon against itself.
@ -1004,7 +962,6 @@ public:
/** /**
* Function TestAreaIntersection * Function TestAreaIntersection
* Test for intersection of 2 copper areas * Test for intersection of 2 copper areas
* area_to_test must be after area_ref in m_ZoneDescriptorList
* @param area_ref = area reference * @param area_ref = area reference
* @param area_to_test = area to compare for intersection calculations * @param area_to_test = area to compare for intersection calculations
* @return : false if no intersection, true if intersection * @return : false if no intersection, true if intersection

View File

@ -47,18 +47,18 @@ const KICAD_T GENERAL_COLLECTOR::AllBoardItems[] = {
// all items in m_Drawings for instance should be contiguous. // all items in m_Drawings for instance should be contiguous.
// *** all items in a same list (shown here) must be contiguous **** // *** all items in a same list (shown here) must be contiguous ****
PCB_MARKER_T, // in m_markers PCB_MARKER_T, // in m_markers
PCB_TEXT_T, // in m_Drawings PCB_TEXT_T, // in m_drawings
PCB_LINE_T, // in m_Drawings PCB_LINE_T, // in m_drawings
PCB_DIMENSION_T, // in m_Drawings PCB_DIMENSION_T, // in m_drawings
PCB_TARGET_T, // in m_Drawings PCB_TARGET_T, // in m_drawings
PCB_VIA_T, // in m_Tracks PCB_VIA_T, // in m_tracks
PCB_TRACE_T, // in m_Tracks PCB_TRACE_T, // in m_tracks
PCB_ARC_T, // in m_Tracks PCB_ARC_T, // in m_tracks
PCB_PAD_T, // in modules PCB_PAD_T, // in modules
PCB_MODULE_TEXT_T, // in modules PCB_MODULE_TEXT_T, // in modules
PCB_MODULE_T, // in m_Modules PCB_MODULE_T, // in m_modules
PCB_GROUP_T, // in m_Groups ? PCB_GROUP_T, // in m_groups
PCB_ZONE_AREA_T, // in m_ZoneDescriptorList PCB_ZONE_AREA_T, // in m_zones
EOT EOT
}; };

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@ -394,24 +394,17 @@ const CN_CONNECTIVITY_ALGO::CLUSTERS CN_CONNECTIVITY_ALGO::SearchClusters( CLUST
void CN_CONNECTIVITY_ALGO::Build( BOARD* aBoard ) void CN_CONNECTIVITY_ALGO::Build( BOARD* aBoard )
{ {
for( int i = 0; i<aBoard->GetAreaCount(); i++ ) for( ZONE_CONTAINER* zone : aBoard->Zones() )
{
auto zone = aBoard->GetArea( i );
Add( zone ); Add( zone );
}
for( auto tv : aBoard->Tracks() ) for( TRACK* tv : aBoard->Tracks() )
Add( tv ); Add( tv );
for( auto mod : aBoard->Modules() ) for( MODULE* mod : aBoard->Modules() )
{ {
for( auto pad : mod->Pads() ) for( D_PAD* pad : mod->Pads() )
Add( pad ); Add( pad );
} }
/*wxLogTrace( "CN", "zones : %lu, pads : %lu vias : %lu tracks : %lu\n",
m_zoneList.Size(), m_padList.Size(),
m_viaList.Size(), m_trackList.Size() );*/
} }

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@ -503,10 +503,8 @@ void DIALOG_COPPER_ZONE::ExportSetupToOtherCopperZones( wxCommandEvent& event )
// Export settings ( but layer and netcode ) to others copper zones // Export settings ( but layer and netcode ) to others copper zones
BOARD* pcb = m_Parent->GetBoard(); BOARD* pcb = m_Parent->GetBoard();
for( int ii = 0; ii < pcb->GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : pcb->Zones() )
{ {
ZONE_CONTAINER* zone = pcb->GetArea( ii );
// Cannot export settings from a copper zone // Cannot export settings from a copper zone
// to a zone keepout: // to a zone keepout:
if( zone->GetIsKeepout() ) if( zone->GetIsKeepout() )

View File

@ -563,10 +563,8 @@ const std::vector<BOARD_ITEM*> HYPERLYNX_EXPORTER::collectNetObjects( int netcod
rv.push_back( item ); rv.push_back( item );
} }
for( int i = 0; i < m_board->GetAreaCount(); i++ ) for( ZONE_CONTAINER* zone : m_board->Zones() )
{ {
ZONE_CONTAINER* zone = m_board->GetArea( i );
if( check( zone ) ) if( check( zone ) )
rv.push_back( zone ); rv.push_back( zone );
} }

View File

@ -1024,10 +1024,8 @@ static void export_vrml_tracks( MODEL_VRML& aModel, BOARD* pcb )
static void export_vrml_zones( MODEL_VRML& aModel, BOARD* aPcb, COMMIT* aCommit ) static void export_vrml_zones( MODEL_VRML& aModel, BOARD* aPcb, COMMIT* aCommit )
{ {
for( int ii = 0; ii < aPcb->GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : aPcb->Zones() )
{ {
ZONE_CONTAINER* zone = aPcb->GetArea( ii );
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() ) for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
{ {
VRML_LAYER* vl; VRML_LAYER* vl;

View File

@ -516,10 +516,8 @@ void GERBER_JOBFILE_WRITER::addJSONDesignRules()
minclearanceOuter = INT_MAX; minclearanceOuter = INT_MAX;
minclearanceInner = INT_MAX; minclearanceInner = INT_MAX;
for( int ii = 0; ii < m_pcb->GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : m_pcb->Zones() )
{ {
ZONE_CONTAINER* zone = m_pcb->GetArea( ii );
if( zone->GetIsKeepout() || !zone->IsOnCopperLayer() ) if( zone->GetIsKeepout() || !zone->IsOnCopperLayer() )
continue; continue;

View File

@ -22,10 +22,10 @@
*/ */
#include <fctsys.h> #include <fctsys.h>
#include <gr_basic.h> //#include <gr_basic.h>
#include <common.h> //#include <common.h>
#include <macros.h> //#include <macros.h>
#include <pcbnew.h> //#include <pcbnew.h>
#include <class_board.h> #include <class_board.h>
#include <class_module.h> #include <class_module.h>
#include <class_pad.h> #include <class_pad.h>
@ -170,6 +170,7 @@ void NETINFO_LIST::Show() const
{ {
int i = 0; int i = 0;
NETNAMES_MAP::const_iterator it, itEnd; NETNAMES_MAP::const_iterator it, itEnd;
for( it = m_netNames.begin(), itEnd = m_netNames.end(); it != itEnd; ++it ) for( it = m_netNames.begin(), itEnd = m_netNames.end(); it != itEnd; ++it )
{ {
wxLogDebug( "[%d]: netcode:%d netname:<%s>\n", wxLogDebug( "[%d]: netcode:%d netname:<%s>\n",
@ -183,7 +184,8 @@ void NETINFO_LIST::Show() const
int NETINFO_LIST::getFreeNetCode() int NETINFO_LIST::getFreeNetCode()
{ {
do { do
{
if( m_newNetCode < 0 ) if( m_newNetCode < 0 )
m_newNetCode = 0; m_newNetCode = 0;
} while( m_netCodes.count( ++m_newNetCode ) != 0 ); } while( m_netCodes.count( ++m_newNetCode ) != 0 );
@ -213,21 +215,19 @@ void NETINFO_MAPPING::Update()
nets.insert( 0 ); nets.insert( 0 );
// Zones // Zones
for( int i = 0; i < m_board->GetAreaCount(); ++i ) for( ZONE_CONTAINER* zone : m_board->Zones() )
nets.insert( m_board->GetArea( i )->GetNetCode() ); nets.insert( zone->GetNetCode() );
// Tracks // Tracks
for( auto track : m_board->Tracks() ) for( TRACK* track : m_board->Tracks() )
nets.insert( track->GetNetCode() ); nets.insert( track->GetNetCode() );
// Modules/pads // Modules/pads
for( auto module : m_board->Modules() ) for( MODULE* module : m_board->Modules() )
{
for( auto pad : module->Pads() )
{ {
for( D_PAD* pad : module->Pads() )
nets.insert( pad->GetNetCode() ); nets.insert( pad->GetNetCode() );
} }
}
// Prepare the new mapping // Prepare the new mapping
m_netMapping.clear(); m_netMapping.clear();
@ -235,8 +235,9 @@ void NETINFO_MAPPING::Update()
// Now the nets variable stores all the used net codes (not only for pads) and we are ready to // Now the nets variable stores all the used net codes (not only for pads) and we are ready to
// assign new consecutive net numbers // assign new consecutive net numbers
int newNetCode = 0; int newNetCode = 0;
for( std::set<int>::const_iterator it = nets.begin(), itEnd = nets.end(); it != itEnd; ++it )
m_netMapping[*it] = newNetCode++; for( auto net : nets )
m_netMapping[net] = newNetCode++;
} }

View File

@ -481,10 +481,8 @@ bool BOARD_NETLIST_UPDATER::updateComponentPadConnections( MODULE* aPcbComponent
void BOARD_NETLIST_UPDATER::cacheCopperZoneConnections() void BOARD_NETLIST_UPDATER::cacheCopperZoneConnections()
{ {
for( int ii = 0; ii < m_board->GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : m_board->Zones() )
{ {
ZONE_CONTAINER* zone = m_board->GetArea( ii );
if( !zone->IsOnCopperLayer() || zone->GetIsKeepout() ) if( !zone->IsOnCopperLayer() || zone->GetIsKeepout() )
continue; continue;
@ -556,10 +554,8 @@ bool BOARD_NETLIST_UPDATER::updateCopperZoneNets( NETLIST& aNetlist )
} }
// Test copper zones to detect "dead" nets (nets without any pad): // Test copper zones to detect "dead" nets (nets without any pad):
for( int i = 0; i < m_board->GetAreaCount(); i++ ) for( ZONE_CONTAINER* zone : m_board->Zones() )
{ {
ZONE_CONTAINER* zone = m_board->GetArea( i );
if( !zone->IsOnCopperLayer() || zone->GetIsKeepout() ) if( !zone->IsOnCopperLayer() || zone->GetIsKeepout() )
continue; continue;

View File

@ -1,7 +1,7 @@
/* /*
* This program source code file is part of KiCad, a free EDA CAD application. * This program source code file is part of KiCad, a free EDA CAD application.
* *
* Copyright (C) 2017 KiCad Developers, see AUTHORS.txt for contributors. * Copyright (C) 2017-2020 KiCad Developers, see AUTHORS.txt for contributors.
* *
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License * modify it under the terms of the GNU General Public License
@ -21,22 +21,12 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/ */
/**
* @file pcbnew_action_plugins.cpp
* @brief Class PCBNEW_PYTHON_ACTION_PLUGINS
*/
#include "pcbnew_action_plugins.h" #include "pcbnew_action_plugins.h"
#include <board_commit.h>
#include <class_board.h> #include <class_board.h>
#include <class_drawsegment.h>
#include <class_module.h> #include <class_module.h>
#include <class_track.h> #include <class_track.h>
#include <class_zone.h> #include <class_zone.h>
#include <cstdio>
#include <macros.h>
#include <menus_helpers.h> #include <menus_helpers.h>
#include <pcbnew_id.h>
#include <pcbnew_settings.h> #include <pcbnew_settings.h>
#include <python_scripting.h> #include <python_scripting.h>
#include <tool/action_menu.h> #include <tool/action_menu.h>
@ -220,30 +210,30 @@ void PCB_EDIT_FRAME::RunActionPlugin( ACTION_PLUGIN* aActionPlugin )
itemsList.m_Status = UNDO_REDO::CHANGED; itemsList.m_Status = UNDO_REDO::CHANGED;
// Append tracks: // Append tracks:
for( auto item : currentPcb->Tracks() ) for( TRACK* item : currentPcb->Tracks() )
{ {
ITEM_PICKER picker( nullptr, item, UNDO_REDO::CHANGED ); ITEM_PICKER picker( nullptr, item, UNDO_REDO::CHANGED );
itemsList.PushItem( picker ); itemsList.PushItem( picker );
} }
// Append modules: // Append modules:
for( auto item : currentPcb->Modules() ) for( MODULE* item : currentPcb->Modules() )
{ {
ITEM_PICKER picker( nullptr, item, UNDO_REDO::CHANGED ); ITEM_PICKER picker( nullptr, item, UNDO_REDO::CHANGED );
itemsList.PushItem( picker ); itemsList.PushItem( picker );
} }
// Append drawings // Append drawings
for( auto item : currentPcb->Drawings() ) for( BOARD_ITEM* item : currentPcb->Drawings() )
{ {
ITEM_PICKER picker( nullptr, item, UNDO_REDO::CHANGED ); ITEM_PICKER picker( nullptr, item, UNDO_REDO::CHANGED );
itemsList.PushItem( picker ); itemsList.PushItem( picker );
} }
// Append zones outlines // Append zones outlines
for( int ii = 0; ii < currentPcb->GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : currentPcb->Zones() )
{ {
ITEM_PICKER picker( nullptr, (EDA_ITEM*) currentPcb->GetArea( ii ), UNDO_REDO::CHANGED ); ITEM_PICKER picker( nullptr, zone, UNDO_REDO::CHANGED );
itemsList.PushItem( picker ); itemsList.PushItem( picker );
} }
@ -278,6 +268,7 @@ void PCB_EDIT_FRAME::RunActionPlugin( ACTION_PLUGIN* aActionPlugin )
// The list of existing items after running the action script // The list of existing items after running the action script
std::set<BOARD_ITEM*> currItemList; std::set<BOARD_ITEM*> currItemList;
// Append tracks: // Append tracks:
for( TRACK* item : currentPcb->Tracks() ) for( TRACK* item : currentPcb->Tracks() )
currItemList.insert( item ); currItemList.insert( item );
@ -291,8 +282,8 @@ void PCB_EDIT_FRAME::RunActionPlugin( ACTION_PLUGIN* aActionPlugin )
currItemList.insert( item ); currItemList.insert( item );
// Append zones outlines // Append zones outlines
for( int ii = 0; ii < currentPcb->GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : currentPcb->Zones() )
currItemList.insert( currentPcb->GetArea( ii ) ); currItemList.insert( zone );
// Found deleted modules // Found deleted modules
for( unsigned int i = 0; i < oldBuffer->GetCount(); i++ ) for( unsigned int i = 0; i < oldBuffer->GetCount(); i++ )
@ -340,11 +331,11 @@ void PCB_EDIT_FRAME::RunActionPlugin( ACTION_PLUGIN* aActionPlugin )
} }
} }
for( int ii = 0; ii < currentPcb->GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : currentPcb->Zones() )
{ {
if( !oldBuffer->ContainsItem( (EDA_ITEM*) currentPcb->GetArea( ii ) ) ) if( !oldBuffer->ContainsItem( zone ) )
{ {
ITEM_PICKER picker( nullptr, (EDA_ITEM*) currentPcb->GetArea( ii ), UNDO_REDO::NEWITEM ); ITEM_PICKER picker( nullptr, zone, UNDO_REDO::NEWITEM );
oldBuffer->PushItem( picker ); oldBuffer->PushItem( picker );
} }
} }
@ -387,13 +378,12 @@ void PCB_EDIT_FRAME::buildActionPluginMenus( ACTION_MENU* actionMenu )
void PCB_EDIT_FRAME::AddActionPluginTools() void PCB_EDIT_FRAME::AddActionPluginTools()
{ {
bool need_separator = true; bool need_separator = true;
const auto& orderedPlugins = GetOrderedActionPlugins(); const std::vector<ACTION_PLUGIN*>& orderedPlugins = GetOrderedActionPlugins();
for( const auto& ap : orderedPlugins ) for( ACTION_PLUGIN* ap : orderedPlugins )
{ {
if( GetActionPluginButtonVisible( ap->GetPluginPath(), ap->GetShowToolbarButton() ) ) if( GetActionPluginButtonVisible( ap->GetPluginPath(), ap->GetShowToolbarButton() ) )
{ {
if( need_separator ) if( need_separator )
{ {
m_mainToolBar->AddScaledSeparator( this ); m_mainToolBar->AddScaledSeparator( this );

View File

@ -199,8 +199,8 @@ int PCBNEW_CONTROL::ZoneDisplayMode( const TOOL_EVENT& aEvent )
m_frame->SetDisplayOptions( opts ); m_frame->SetDisplayOptions( opts );
for( int i = 0; i < board()->GetAreaCount(); ++i ) for( ZONE_CONTAINER* zone : board()->Zones() )
view()->Update( board()->GetArea( i ), KIGFX::GEOMETRY ); view()->Update( zone, KIGFX::GEOMETRY );
canvas()->Refresh(); canvas()->Refresh();

View File

@ -98,11 +98,8 @@ void PCB_EDIT_FRAME::Edit_Zone_Params( ZONE_CONTAINER* aZone )
wxBusyCursor dummy; wxBusyCursor dummy;
// Undraw old zone outlines // Undraw old zone outlines
for( int ii = 0; ii < GetBoard()->GetAreaCount(); ii++ ) for( ZONE_CONTAINER* zone : GetBoard()->Zones() )
{ GetCanvas()->GetView()->Update( zone );
ZONE_CONTAINER* edge_zone = GetBoard()->GetArea( ii );
GetCanvas()->GetView()->Update( edge_zone );
}
zoneInfo.ExportSetting( *aZone ); zoneInfo.ExportSetting( *aZone );

View File

@ -31,17 +31,8 @@
*/ */
#include <fctsys.h> #include <fctsys.h>
#include <common.h>
#include <confirm.h>
#include <undo_redo_container.h>
#include <class_board.h> #include <class_board.h>
#include <class_zone.h> #include <class_zone.h>
#include <class_marker_pcb.h>
#include <pcbnew.h>
#include <drc/drc.h>
#include <math_for_graphics.h>
bool BOARD::OnAreaPolygonModified( PICKED_ITEMS_LIST* aModifiedZonesList, bool BOARD::OnAreaPolygonModified( PICKED_ITEMS_LIST* aModifiedZonesList,
@ -59,13 +50,9 @@ bool BOARD::OnAreaPolygonModified( PICKED_ITEMS_LIST* aModifiedZonesList,
// Test for bad areas: all zones must have more than 2 corners: // Test for bad areas: all zones must have more than 2 corners:
// Note: should not happen, but just in case. // Note: should not happen, but just in case.
for( unsigned ii = 0; ii < m_ZoneDescriptorList.size(); ) for( ZONE_CONTAINER* zone : m_zones )
{ {
ZONE_CONTAINER* zone = m_ZoneDescriptorList[ii]; if( zone->GetNumCorners() < 3 )
if( zone->GetNumCorners() >= 3 )
ii++;
else // Remove zone because it is incorrect:
RemoveArea( aModifiedZonesList, zone ); RemoveArea( aModifiedZonesList, zone );
} }
@ -76,15 +63,15 @@ bool BOARD::OnAreaPolygonModified( PICKED_ITEMS_LIST* aModifiedZonesList,
bool BOARD::CombineAllAreasInNet( PICKED_ITEMS_LIST* aDeletedList, int aNetCode, bool BOARD::CombineAllAreasInNet( PICKED_ITEMS_LIST* aDeletedList, int aNetCode,
bool aUseLocalFlags ) bool aUseLocalFlags )
{ {
if( m_ZoneDescriptorList.size() <= 1 ) if( m_zones.size() <= 1 )
return false; return false;
bool modified = false; bool modified = false;
// Loop through all combinations // Loop through all combinations
for( unsigned ia1 = 0; ia1 < m_ZoneDescriptorList.size() - 1; ia1++ ) for( unsigned ia1 = 0; ia1 < m_zones.size() - 1; ia1++ )
{ {
ZONE_CONTAINER* curr_area = m_ZoneDescriptorList[ia1]; ZONE_CONTAINER* curr_area = m_zones[ia1];
if( curr_area->GetNetCode() != aNetCode ) if( curr_area->GetNetCode() != aNetCode )
continue; continue;
@ -93,9 +80,9 @@ bool BOARD::CombineAllAreasInNet( PICKED_ITEMS_LIST* aDeletedList, int aNetCode,
BOX2I b1 = curr_area->Outline()->BBox(); BOX2I b1 = curr_area->Outline()->BBox();
bool mod_ia1 = false; bool mod_ia1 = false;
for( unsigned ia2 = m_ZoneDescriptorList.size() - 1; ia2 > ia1; ia2-- ) for( unsigned ia2 = m_zones.size() - 1; ia2 > ia1; ia2-- )
{ {
ZONE_CONTAINER* area2 = m_ZoneDescriptorList[ia2]; ZONE_CONTAINER* area2 = m_zones[ia2];
if( area2->GetNetCode() != aNetCode ) if( area2->GetNetCode() != aNetCode )
continue; continue;
@ -141,10 +128,8 @@ bool BOARD::CombineAllAreasInNet( PICKED_ITEMS_LIST* aDeletedList, int aNetCode,
bool BOARD::TestAreaIntersections( ZONE_CONTAINER* area_to_test ) bool BOARD::TestAreaIntersections( ZONE_CONTAINER* area_to_test )
{ {
for( unsigned ia2 = 0; ia2 < m_ZoneDescriptorList.size(); ia2++ ) for( ZONE_CONTAINER* area2 : m_zones)
{ {
ZONE_CONTAINER* area2 = m_ZoneDescriptorList[ia2];
if( area_to_test->GetNetCode() != area2->GetNetCode() ) if( area_to_test->GetNetCode() != area2->GetNetCode() )
continue; continue;
@ -289,7 +274,7 @@ bool BOARD::CombineAreas( PICKED_ITEMS_LIST* aDeletedList, ZONE_CONTAINER* area_
// but we should never have more than 2 polys // but we should never have more than 2 polys
if( mergedOutlines.OutlineCount() > 2 ) if( mergedOutlines.OutlineCount() > 2 )
{ {
wxLogMessage(wxT("BOARD::CombineAreas error: more than 2 polys after merging") ); wxLogMessage( "BOARD::CombineAreas error: more than 2 polys after merging" );
return false; return false;
} }

View File

@ -668,7 +668,6 @@ void test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZones()
for( int ii = 0; ii < m_board->GetAreaCount(); ii++ ) for( int ii = 0; ii < m_board->GetAreaCount(); ii++ )
{ {
ZONE_CONTAINER* zone = m_board->GetArea( ii );
ZONE_CONTAINER* zoneRef = m_board->GetArea( ii ); ZONE_CONTAINER* zoneRef = m_board->GetArea( ii );
zoneRef->BuildSmoothedPoly( smoothed_polys[ii], zoneRef->GetLayer() ); zoneRef->BuildSmoothedPoly( smoothed_polys[ii], zoneRef->GetLayer() );