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Update demos to use sym-lib-table and recent libraries

This commit is contained in:
jean-pierre charras 2017-11-14 20:28:11 +01:00
parent c1879b269f
commit a6554861dd
15 changed files with 492 additions and 239 deletions
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2
demos/simulation/laser_driver/laser_driver-cache.lib
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 EESchema-LIBRARY Version 2.4
#encoding utf-8 #encoding utf-8
# #
# C # C

7
demos/simulation/laser_driver/laser_driver.pro
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@ -1,6 +1,6 @@
update=wto, 19 lip 2016, 23:56:07 update=14/11/2017 20:17:47
version=1 version=1
last_client=eeschema last_client=kicad
[general] [general]
version=1 version=1
RootSch= RootSch=
@ -29,5 +29,4 @@ version=1
NetIExt=net NetIExt=net
[eeschema] [eeschema]
version=1 version=1
[eeschema/libraries] LibDir=
LibName1=power

101
demos/simulation/laser_driver/laser_driver.sch
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@ -1,35 +1,6 @@
EESchema Schematic File Version 2 EESchema Schematic File Version 4
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:laser_driver-cache LIBS:laser_driver-cache
EELAYER 25 0 EELAYER 26 0
EELAYER END EELAYER END
$Descr A4 11693 8268 $Descr A4 11693 8268
encoding utf-8 encoding utf-8
@ -44,7 +15,7 @@ Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
$Comp $Comp
L VSOURCE V1 L laser_driver_schlib:VSOURCE V1
U 1 1 57336052 U 1 1 57336052
P 2650 3550 P 2650 3550
F 0 "V1" H 2778 3596 50 0000 L CNN F 0 "V1" H 2778 3596 50 0000 L CNN
@ -59,11 +30,11 @@ $EndComp
Text Notes 3150 5400 0 60 ~ 0 Text Notes 3150 5400 0 60 ~ 0
.tran 10p 150n .tran 10p 150n
$Comp $Comp
L Generic_Opamp U1 L laser_driver_schlib:Generic_Opamp U1
U 1 1 5788FF9F U 1 1 5788FF9F
P 5050 3500 P 5050 3500
F 0 "U1" H 5391 3546 50 0000 L CNN F 0 "U1" H 5050 3650 50 0000 L CNN
F 1 "AD8009" H 5391 3455 50 0000 L CNN F 1 "AD8009" H 5050 3350 50 0000 L CNN
F 2 "" H 4950 3400 50 0000 C CNN F 2 "" H 4950 3400 50 0000 C CNN
F 3 "" H 5050 3500 50 0000 C CNN F 3 "" H 5050 3500 50 0000 C CNN
F 4 "Value" H 5050 3500 60 0001 C CNN "Fieldname" F 4 "Value" H 5050 3500 60 0001 C CNN "Fieldname"
@ -75,7 +46,7 @@ F 8 "ad8009.lib" H 5050 3500 60 0001 C CNN "Spice_Lib_File"
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VSOURCE V2 L laser_driver_schlib:VSOURCE V2
U 1 1 578900BA U 1 1 578900BA
P 9650 1850 P 9650 1850
F 0 "V2" H 9778 1896 50 0000 L CNN F 0 "V2" H 9778 1896 50 0000 L CNN
@ -89,7 +60,7 @@ F 6 "1 2" H 9350 2050 60 0001 C CNN "Spice_Node_Sequence"
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VSOURCE V3 L laser_driver_schlib:VSOURCE V3
U 1 1 57890232 U 1 1 57890232
P 9650 2350 P 9650 2350
F 0 "V3" H 9778 2396 50 0000 L CNN F 0 "V3" H 9778 2396 50 0000 L CNN
@ -103,7 +74,7 @@ F 6 "1 2" H 9350 2550 60 0001 C CNN "Spice_Node_Sequence"
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR7 L laser_driver_schlib:GND #PWR7
U 1 1 578902D2 U 1 1 578902D2
P 9400 2100 P 9400 2100
F 0 "#PWR7" H 9400 1850 50 0001 C CNN F 0 "#PWR7" H 9400 1850 50 0001 C CNN
@ -114,7 +85,7 @@ F 3 "" H 9400 2100 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VDD #PWR8 L laser_driver_schlib:VDD #PWR8
U 1 1 578903C0 U 1 1 578903C0
P 9650 1600 P 9650 1600
F 0 "#PWR8" H 9650 1450 50 0001 C CNN F 0 "#PWR8" H 9650 1450 50 0001 C CNN
@ -125,7 +96,7 @@ F 3 "" H 9650 1600 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VSS #PWR9 L laser_driver_schlib:VSS #PWR9
U 1 1 578903E2 U 1 1 578903E2
P 9650 2600 P 9650 2600
F 0 "#PWR9" H 9650 2450 50 0001 C CNN F 0 "#PWR9" H 9650 2450 50 0001 C CNN
@ -136,7 +107,7 @@ F 3 "" H 9650 2600 50 0000 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L VDD #PWR3 L laser_driver_schlib:VDD #PWR3
U 1 1 57890425 U 1 1 57890425
P 4950 3200 P 4950 3200
F 0 "#PWR3" H 4950 3050 50 0001 C CNN F 0 "#PWR3" H 4950 3050 50 0001 C CNN
@ -147,7 +118,7 @@ F 3 "" H 4950 3200 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VSS #PWR4 L laser_driver_schlib:VSS #PWR4
U 1 1 57890453 U 1 1 57890453
P 4950 3800 P 4950 3800
F 0 "#PWR4" H 4950 3650 50 0001 C CNN F 0 "#PWR4" H 4950 3650 50 0001 C CNN
@ -158,7 +129,7 @@ F 3 "" H 4950 3800 50 0000 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L C C2 L laser_driver_schlib:C C2
U 1 1 5789085B U 1 1 5789085B
P 6800 4000 P 6800 4000
F 0 "C2" H 6915 3954 50 0000 L CNN F 0 "C2" H 6915 3954 50 0000 L CNN
@ -169,7 +140,7 @@ F 3 "" H 6800 4000 50 0000 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L R R5 L laser_driver_schlib:R R5
U 1 1 578EA6D8 U 1 1 578EA6D8
P 6400 4000 P 6400 4000
F 0 "R5" H 6469 3954 50 0000 L CNN F 0 "R5" H 6469 3954 50 0000 L CNN
@ -180,7 +151,7 @@ F 3 "" H 6400 4000 50 0000 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L R R1 L laser_driver_schlib:R R1
U 1 1 578EA7EE U 1 1 578EA7EE
P 4150 3600 P 4150 3600
F 0 "R1" V 3943 3600 50 0000 C CNN F 0 "R1" V 3943 3600 50 0000 C CNN
@ -191,7 +162,7 @@ F 3 "" H 4150 3600 50 0000 C CNN
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L R R3 L laser_driver_schlib:R R3
U 1 1 578EA8B4 U 1 1 578EA8B4
P 5400 4150 P 5400 4150
F 0 "R3" V 5193 4150 50 0000 C CNN F 0 "R3" V 5193 4150 50 0000 C CNN
@ -202,7 +173,7 @@ F 3 "" H 5400 4150 50 0000 C CNN
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L C C1 L laser_driver_schlib:C C1
U 1 1 578EB076 U 1 1 578EB076
P 5400 4400 P 5400 4400
F 0 "C1" V 5240 4400 50 0000 C CNN F 0 "C1" V 5240 4400 50 0000 C CNN
@ -213,7 +184,7 @@ F 3 "" H 5400 4400 50 0000 C CNN
0 -1 -1 0 0 -1 -1 0
$EndComp $EndComp
$Comp $Comp
L LED D1 L laser_driver_schlib:LED D1
U 1 1 578EB1E8 U 1 1 578EB1E8
P 6400 4900 P 6400 4900
F 0 "D1" V 6446 4792 50 0000 R CNN F 0 "D1" V 6446 4792 50 0000 R CNN
@ -230,7 +201,7 @@ F 9 "2 1" V 6400 4900 60 0001 C CNN "Spice_Node_Sequence"
0 -1 -1 0 0 -1 -1 0
$EndComp $EndComp
$Comp $Comp
L GND #PWR6 L laser_driver_schlib:GND #PWR6
U 1 1 578EB42D U 1 1 578EB42D
P 6400 5100 P 6400 5100
F 0 "#PWR6" H 6400 4850 50 0001 C CNN F 0 "#PWR6" H 6400 4850 50 0001 C CNN
@ -241,7 +212,7 @@ F 3 "" H 6400 5100 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L R R4 L laser_driver_schlib:R R4
U 1 1 578EBA35 U 1 1 578EBA35
P 6150 2900 P 6150 2900
F 0 "R4" V 5943 2900 50 0000 C CNN F 0 "R4" V 5943 2900 50 0000 C CNN
@ -252,7 +223,7 @@ F 3 "" H 6150 2900 50 0000 C CNN
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L R R2 L laser_driver_schlib:R R2
U 1 1 578EBB39 U 1 1 578EBB39
P 4350 2900 P 4350 2900
F 0 "R2" V 4143 2900 50 0000 C CNN F 0 "R2" V 4143 2900 50 0000 C CNN
@ -263,7 +234,7 @@ F 3 "" H 4350 2900 50 0000 C CNN
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L GND #PWR2 L laser_driver_schlib:GND #PWR2
U 1 1 578EBBE4 U 1 1 578EBBE4
P 4000 3600 P 4000 3600
F 0 "#PWR2" H 4000 3350 50 0001 C CNN F 0 "#PWR2" H 4000 3350 50 0001 C CNN
@ -273,17 +244,6 @@ F 3 "" H 4000 3600 50 0000 C CNN
1 4000 3600 1 4000 3600
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp
L VDD #PWR5
U 1 1 578EBCE4
P 6400 3300
F 0 "#PWR5" H 6400 3150 50 0001 C CNN
F 1 "VDD" H 6417 3473 50 0000 C CNN
F 2 "" H 6400 3300 50 0000 C CNN
F 3 "" H 6400 3300 50 0000 C CNN
1 6400 3300
1 0 0 -1
$EndComp
Wire Wire Line Wire Wire Line
9650 2100 9400 2100 9650 2100 9400 2100
Wire Wire Line Wire Wire Line
@ -330,7 +290,7 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
2650 2900 2650 3350 2650 2900 2650 3350
$Comp $Comp
L GND #PWR1 L laser_driver_schlib:GND #PWR1
U 1 1 578EC19D U 1 1 578EC19D
P 2650 4200 P 2650 4200
F 0 "#PWR1" H 2650 3950 50 0001 C CNN F 0 "#PWR1" H 2650 3950 50 0001 C CNN
@ -348,7 +308,7 @@ Wire Wire Line
7000 2900 7000 4350 7000 2900 7000 4350
Connection ~ 6800 4350 Connection ~ 6800 4350
$Comp $Comp
L Q_NPN_CBE Q1 L laser_driver_schlib:Q_NPN_CBE Q1
U 1 1 578EADCC U 1 1 578EADCC
P 6300 3500 P 6300 3500
F 0 "Q1" H 6491 3546 50 0000 L CNN F 0 "Q1" H 6491 3546 50 0000 L CNN
@ -379,4 +339,15 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
9650 2050 9650 2150 9650 2050 9650 2150
Connection ~ 9650 2100 Connection ~ 9650 2100
$Comp
L laser_driver_schlib:VDD #PWR?
U 1 1 5A0B5A9D
P 6400 3300
F 0 "#PWR?" H 6400 3150 50 0001 C CNN
F 1 "VDD" H 6417 3473 50 0000 C CNN
F 2 "" H 6400 3300 50 0000 C CNN
F 3 "" H 6400 3300 50 0000 C CNN
1 6400 3300
1 0 0 -1
$EndComp
$EndSCHEMATC $EndSCHEMATC

166
demos/simulation/laser_driver/laser_driver_schlib.lib Normal file
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@ -0,0 +1,166 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Generic_Opamp
#
DEF Generic_Opamp U 0 20 Y Y 1 F N
F0 "U" 0 250 50 H V L CNN
F1 "Generic_Opamp" 0 150 50 H V L CNN
F2 "" -100 -100 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X - 2 -300 -100 100 R 50 50 1 1 I
X V+ 3 -100 300 150 D 50 50 1 1 W
X V- 4 -100 -300 150 U 50 50 1 1 W
X ~ 5 300 0 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# LED
#
DEF LED D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "LED" 0 -100 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
LED-3MM
LED-5MM
LED-10MM
LED-0603
LED-0805
LED-1206
LEDV
$ENDFPLIST
DRAW
P 2 0 1 0 -50 50 -50 -50 N
P 3 0 1 0 -80 -25 -125 -65 -120 -40 N
P 3 0 1 0 -65 -40 -110 -80 -105 -55 N
P 3 0 1 0 50 50 -50 0 50 -50 F
X K 1 -200 0 150 R 40 40 1 1 P
X A 2 200 0 150 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# Q_NPN_CBE
#
DEF Q_NPN_CBE Q 0 0 Y N 1 F N
F0 "Q" 300 50 50 H V R CNN
F1 "Q_NPN_CBE" 600 -50 50 H V R CNN
F2 "" 200 100 29 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
X C 1 100 200 100 D 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 I
X E 3 100 -200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 30 V V C CNN
F3 "" 0 0 30 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 60 60 1 1 P
X ~ 2 0 -150 50 U 60 60 1 1 P
ENDDRAW
ENDDEF
#
# VDD
#
DEF VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VDD" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# VSS
#
DEF VSS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VSS" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VSS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

3
demos/simulation/laser_driver/sym-lib-table Normal file
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@ -0,0 +1,3 @@
(sym_lib_table
(lib (name laser_driver_schlib)(type Legacy)(uri ${KIPRJMOD}/laser_driver_schlib.lib)(options "")(descr ""))
)

2
demos/simulation/rectifier/rectifier-cache.lib
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 EESchema-LIBRARY Version 2.4
#encoding utf-8 #encoding utf-8
# #
# C # C

86
demos/simulation/rectifier/rectifier.pro
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@ -1,6 +1,6 @@
update=pią, 7 paź 2016, 14:28:36 update=14/11/2017 20:04:15
version=1 version=1
last_client=eeschema last_client=kicad
[general] [general]
version=1 version=1
RootSch= RootSch=
@ -29,84 +29,4 @@ version=1
NetIExt=net NetIExt=net
[eeschema] [eeschema]
version=1 version=1
LibDir=/home/twl/Kicad-dev/kicad-library/library LibDir=
[eeschema/libraries]
LibName1=74xgxx
LibName2=74xx
LibName3=ac-dc
LibName4=actel
LibName5=AD8051
LibName6=adc-dac
LibName7=Altera
LibName8=analog_devices
LibName9=analog_switches
LibName10=atmel
LibName11=audio
LibName12=bbd
LibName13=brooktre
LibName14=cmos4000
LibName15=cmos_ieee
LibName16=conn
LibName17=contrib
LibName18=cypress
LibName19=dc-dc
LibName20=device
LibName21=digital-audio
LibName22=diode
LibName23=display
LibName24=dsp
LibName25=elec-unifil
LibName26=ESD_Protection
LibName27=ftdi
LibName28=gennum
LibName29=graphic
LibName30=hc11
LibName31=intel
LibName32=interface
LibName33=ir
LibName34=Lattice
LibName35=linear
LibName36=logo
LibName37=maxim
LibName38=memory
LibName39=microchip
LibName40=microchip_dspic33dsc
LibName41=microchip_pic10mcu
LibName42=microchip_pic12mcu
LibName43=microchip_pic16mcu
LibName44=microchip_pic18mcu
LibName45=microchip_pic32mcu
LibName46=microcontrollers
LibName47=motor_drivers
LibName48=motorola
LibName49=msp430
LibName50=nordicsemi
LibName51=nxp_armmcu
LibName52=onsemi
LibName53=opto
LibName54=Oscillators
LibName55=philips
LibName56=power
LibName57=powerint
LibName58=Power_Management
LibName59=references
LibName60=regul
LibName61=relays
LibName62=rfcom
LibName63=sensors
LibName64=silabs
LibName65=siliconi
LibName66=stm8
LibName67=stm32
LibName68=supertex
LibName69=switches
LibName70=texas
LibName71=transf
LibName72=transistors
LibName73=ttl_ieee
LibName74=valves
LibName75=video
LibName76=Worldsemi
LibName77=Xicor
LibName78=xilinx
LibName79=Zilog

27
demos/simulation/rectifier/rectifier.sch
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@ -1,7 +1,6 @@
EESchema Schematic File Version 2 EESchema Schematic File Version 4
LIBS:power
LIBS:rectifier-cache LIBS:rectifier-cache
EELAYER 25 0 EELAYER 26 0
EELAYER END EELAYER END
$Descr A4 11693 8268 $Descr A4 11693 8268
encoding utf-8 encoding utf-8
@ -16,7 +15,7 @@ Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
$Comp $Comp
L VSOURCE V1 L rectifier_schlib:VSOURCE V1
U 1 1 57336052 U 1 1 57336052
P 4400 4050 P 4400 4050
F 0 "V1" H 4528 4096 50 0000 L CNN F 0 "V1" H 4528 4096 50 0000 L CNN
@ -30,10 +29,10 @@ F 6 "1 2" H 4100 4250 60 0001 C CNN "Spice_Node_Sequence"
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L GND #PWR1 L rectifier_schlib:GND #PWR01
U 1 1 573360D3 U 1 1 573360D3
P 4400 4350 P 4400 4350
F 0 "#PWR1" H 4400 4100 50 0001 C CNN F 0 "#PWR01" H 4400 4100 50 0001 C CNN
F 1 "GND" H 4405 4177 50 0000 C CNN F 1 "GND" H 4405 4177 50 0000 C CNN
F 2 "" H 4400 4350 50 0000 C CNN F 2 "" H 4400 4350 50 0000 C CNN
F 3 "" H 4400 4350 50 0000 C CNN F 3 "" H 4400 4350 50 0000 C CNN
@ -41,7 +40,7 @@ F 3 "" H 4400 4350 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L R R1 L rectifier_schlib:R R1
U 1 1 573360F5 U 1 1 573360F5
P 4650 3700 P 4650 3700
F 0 "R1" V 4443 3700 50 0000 C CNN F 0 "R1" V 4443 3700 50 0000 C CNN
@ -55,7 +54,7 @@ F 6 "R" V 4650 3700 60 0001 C CNN "Spice_Primitive"
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L D D1 L rectifier_schlib:D D1
U 1 1 573361B8 U 1 1 573361B8
P 5100 3700 P 5100 3700
F 0 "D1" H 5100 3485 50 0000 C CNN F 0 "D1" H 5100 3485 50 0000 C CNN
@ -69,7 +68,7 @@ F 6 "2 1" H 5100 3700 60 0001 C CNN "Spice_Node_Sequence"
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L C C1 L rectifier_schlib:C C1
U 1 1 5733628F U 1 1 5733628F
P 5400 4000 P 5400 4000
F 0 "C1" H 5515 4046 50 0000 L CNN F 0 "C1" H 5515 4046 50 0000 L CNN
@ -83,7 +82,7 @@ F 6 "1 2" H 5400 4000 60 0001 C CNN "SpiceMapping"
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L R R2 L rectifier_schlib:R R2
U 1 1 573362F7 U 1 1 573362F7
P 5750 4000 P 5750 4000
F 0 "R2" H 5680 3954 50 0000 R CNN F 0 "R2" H 5680 3954 50 0000 R CNN
@ -121,10 +120,10 @@ Wire Wire Line
4400 3850 4400 3700 4400 3850 4400 3700
Wire Wire Line Wire Wire Line
4400 3700 4500 3700 4400 3700 4500 3700
Text Label 4400 3800 0 60 ~ 0 Text Label 4400 3700 2 60 ~ 0
in signal_in
Text Label 5550 3700 0 60 ~ 0 Text Label 5750 3700 0 60 ~ 0
rect rect_out
Text Notes 4300 5000 0 60 ~ 0 Text Notes 4300 5000 0 60 ~ 0
*.ac dec 10 1 1Meg\n *.ac dec 10 1 1Meg\n
$EndSCHEMATC $EndSCHEMATC

101
demos/simulation/rectifier/rectifier_schlib.lib Normal file
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@ -0,0 +1,101 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
Capacitors_ThroughHole:C_Radial_D10_L13_P5
Capacitors_SMD:C_0805
Capacitors_SMD:C_1206
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# D
#
DEF D D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "D" 0 -100 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Diode_*
D-Pak_TO252AA
*SingleDiode
*_Diode_*
*SingleDiode*
$ENDFPLIST
DRAW
P 2 0 1 6 -50 50 -50 -50 N
P 3 0 1 0 50 50 -50 0 50 -50 F
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "GND" 0 -123 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 20 30 1 1 W N
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 50 V V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

3
demos/simulation/rectifier/sym-lib-table Normal file
View File

@ -0,0 +1,3 @@
(sym_lib_table
(lib (name rectifier_schlib)(type Legacy)(uri ${KIPRJMOD}/rectifier_schlib.lib)(options "")(descr ""))
)

8
demos/simulation/sallen_key/sallen_key-cache.lib
View File

@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 EESchema-LIBRARY Version 2.4
#encoding utf-8 #encoding utf-8
# #
# C # C
@ -85,11 +85,11 @@ X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #
# VSOURCE-RESCUE-sallen_key # VSOURCE
# #
DEF ~VSOURCE-RESCUE-sallen_key V 0 40 Y Y 1 F N DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE-RESCUE-sallen_key" 250 100 50 H I C CNN F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname" F4 "Value" 0 0 60 H I C CNN "Fieldname"

7
demos/simulation/sallen_key/sallen_key.pro
View File

@ -1,6 +1,6 @@
update=Fri 05 Aug 2016 05:58:16 PM CEST update=14/11/2017 21:16:02
version=1 version=1
last_client=eeschema last_client=kicad
[general] [general]
version=1 version=1
RootSch= RootSch=
@ -40,5 +40,4 @@ LabSize=60
ERC_TestSimilarLabels=1 ERC_TestSimilarLabels=1
[eeschema] [eeschema]
version=1 version=1
[eeschema/libraries] LibDir=
LibName2=power

94
demos/simulation/sallen_key/sallen_key.sch
View File

@ -1,36 +1,6 @@
EESchema Schematic File Version 2 EESchema Schematic File Version 4
LIBS:sallen_key-rescue
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:sallen_key-cache LIBS:sallen_key-cache
EELAYER 25 0 EELAYER 26 0
EELAYER END EELAYER END
$Descr A4 11693 8268 $Descr A4 11693 8268
encoding utf-8 encoding utf-8
@ -45,7 +15,7 @@ Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
$Comp $Comp
L VSOURCE-RESCUE-sallen_key V1 L sallen_key_schlib:VSOURCE V1
U 1 1 57336052 U 1 1 57336052
P 6000 4700 P 6000 4700
F 0 "V1" H 6128 4746 50 0000 L CNN F 0 "V1" H 6128 4746 50 0000 L CNN
@ -60,11 +30,11 @@ lowpass
Text Notes 4300 5000 0 60 ~ 0 Text Notes 4300 5000 0 60 ~ 0
.ac dec 10 1 1Meg\n .ac dec 10 1 1Meg\n
$Comp $Comp
L Generic_Opamp U1 L sallen_key_schlib:Generic_Opamp U1
U 1 1 5788FF9F U 1 1 5788FF9F
P 7850 4400 P 7850 4400
F 0 "U1" H 8191 4446 50 0000 L CNN F 0 "U1" H 7950 4550 50 0000 L CNN
F 1 "AD8051" H 8191 4355 50 0000 L CNN F 1 "AD8051" H 7900 4250 50 0000 L CNN
F 2 "" H 7750 4300 50 0000 C CNN F 2 "" H 7750 4300 50 0000 C CNN
F 3 "" H 7850 4400 50 0000 C CNN F 3 "" H 7850 4400 50 0000 C CNN
F 4 "X" H 7850 4400 60 0001 C CNN "Spice_Primitive" F 4 "X" H 7850 4400 60 0001 C CNN "Spice_Primitive"
@ -75,7 +45,7 @@ F 7 "Y" H 7850 4400 60 0001 C CNN "Spice_Netlist_Enabled"
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VSOURCE-RESCUE-sallen_key V2 L sallen_key_schlib:VSOURCE V2
U 1 1 578900BA U 1 1 578900BA
P 9650 1850 P 9650 1850
F 0 "V2" H 9778 1896 50 0000 L CNN F 0 "V2" H 9778 1896 50 0000 L CNN
@ -89,7 +59,7 @@ F 6 "1 2" H 9350 2050 60 0001 C CNN "Spice_Node_Sequence"
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VSOURCE-RESCUE-sallen_key V3 L sallen_key_schlib:VSOURCE V3
U 1 1 57890232 U 1 1 57890232
P 9650 2350 P 9650 2350
F 0 "V3" H 9778 2396 50 0000 L CNN F 0 "V3" H 9778 2396 50 0000 L CNN
@ -103,7 +73,7 @@ F 6 "1 2" H 9350 2550 60 0001 C CNN "Spice_Node_Sequence"
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR5 L sallen_key_schlib:GND #PWR5
U 1 1 578902D2 U 1 1 578902D2
P 9400 2100 P 9400 2100
F 0 "#PWR5" H 9400 1850 50 0001 C CNN F 0 "#PWR5" H 9400 1850 50 0001 C CNN
@ -114,7 +84,7 @@ F 3 "" H 9400 2100 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VDD #PWR6 L sallen_key_schlib:VDD #PWR6
U 1 1 578903C0 U 1 1 578903C0
P 9650 1600 P 9650 1600
F 0 "#PWR6" H 9650 1450 50 0001 C CNN F 0 "#PWR6" H 9650 1450 50 0001 C CNN
@ -125,7 +95,7 @@ F 3 "" H 9650 1600 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VSS #PWR7 L sallen_key_schlib:VSS #PWR7
U 1 1 578903E2 U 1 1 578903E2
P 9650 2600 P 9650 2600
F 0 "#PWR7" H 9650 2450 50 0001 C CNN F 0 "#PWR7" H 9650 2450 50 0001 C CNN
@ -136,7 +106,7 @@ F 3 "" H 9650 2600 50 0000 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L VDD #PWR3 L sallen_key_schlib:VDD #PWR3
U 1 1 57890425 U 1 1 57890425
P 7750 4100 P 7750 4100
F 0 "#PWR3" H 7750 3950 50 0001 C CNN F 0 "#PWR3" H 7750 3950 50 0001 C CNN
@ -147,7 +117,7 @@ F 3 "" H 7750 4100 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VSS #PWR4 L sallen_key_schlib:VSS #PWR4
U 1 1 57890453 U 1 1 57890453
P 7750 4700 P 7750 4700
F 0 "#PWR4" H 7750 4550 50 0001 C CNN F 0 "#PWR4" H 7750 4550 50 0001 C CNN
@ -158,7 +128,7 @@ F 3 "" H 7750 4700 50 0000 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L R R2 L sallen_key_schlib:R R2
U 1 1 57890691 U 1 1 57890691
P 6950 4300 P 6950 4300
F 0 "R2" V 6743 4300 50 0000 C CNN F 0 "R2" V 6743 4300 50 0000 C CNN
@ -172,7 +142,7 @@ F 6 "R" V 6950 4300 60 0001 C CNN "Spice_Primitive"
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L R R1 L sallen_key_schlib:R R1
U 1 1 578906FF U 1 1 578906FF
P 6400 4300 P 6400 4300
F 0 "R1" V 6193 4300 50 0000 C CNN F 0 "R1" V 6193 4300 50 0000 C CNN
@ -186,7 +156,7 @@ F 6 "R" V 6400 4300 60 0001 C CNN "Spice_Primitive"
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L C C1 L sallen_key_schlib:C C1
U 1 1 5789077D U 1 1 5789077D
P 7000 4950 P 7000 4950
F 0 "C1" V 6748 4950 50 0000 C CNN F 0 "C1" V 6748 4950 50 0000 C CNN
@ -197,7 +167,7 @@ F 3 "" H 7000 4950 50 0000 C CNN
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L C C2 L sallen_key_schlib:C C2
U 1 1 5789085B U 1 1 5789085B
P 7350 4000 P 7350 4000
F 0 "C2" H 7465 4046 50 0000 L CNN F 0 "C2" H 7465 4046 50 0000 L CNN
@ -211,7 +181,7 @@ F 6 "1 2" H 7350 4000 60 0001 C CNN "SpiceMapping"
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L GND #PWR2 L sallen_key_schlib:GND #PWR2
U 1 1 57890B95 U 1 1 57890B95
P 7350 3800 P 7350 3800
F 0 "#PWR2" H 7350 3550 50 0001 C CNN F 0 "#PWR2" H 7350 3550 50 0001 C CNN
@ -227,8 +197,6 @@ Wire Wire Line
8150 4400 8900 4400 8150 4400 8900 4400
Wire Wire Line Wire Wire Line
8350 4950 8350 4400 8350 4950 8350 4400
Wire Wire Line
7150 4950 8350 4950
Wire Wire Line Wire Wire Line
7400 4950 7400 4500 7400 4950 7400 4500
Wire Wire Line Wire Wire Line
@ -242,8 +210,6 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
6650 4950 6650 4300 6650 4950 6650 4300
Connection ~ 6650 4300 Connection ~ 6650 4300
Wire Wire Line
7400 4950 7450 4950
Connection ~ 7400 4950 Connection ~ 7400 4950
Wire Wire Line Wire Wire Line
7350 4150 7350 4300 7350 4150 7350 4300
@ -256,17 +222,6 @@ Wire Wire Line
6000 4300 6000 4500 6000 4300 6000 4500
Wire Wire Line Wire Wire Line
6000 4900 6000 5000 6000 4900 6000 5000
$Comp
L GND #PWR1
U 1 1 57890E7F
P 6000 5000
F 0 "#PWR1" H 6000 4750 50 0001 C CNN
F 1 "GND" H 6005 4827 50 0000 C CNN
F 2 "" H 6000 5000 50 0000 C CNN
F 3 "" H 6000 5000 50 0000 C CNN
1 6000 5000
1 0 0 -1
$EndComp
Connection ~ 8350 4400 Connection ~ 8350 4400
Wire Wire Line Wire Wire Line
9650 2600 9650 2550 9650 2600 9650 2550
@ -275,4 +230,17 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
9650 2050 9650 2150 9650 2050 9650 2150
Connection ~ 9650 2100 Connection ~ 9650 2100
Wire Wire Line
8350 4950 7150 4950
$Comp
L sallen_key_schlib:GND #PWR?
U 1 1 5A0B57F1
P 6000 5000
F 0 "#PWR?" H 6000 4750 50 0001 C CNN
F 1 "GND" H 6005 4827 50 0000 C CNN
F 2 "" H 6000 5000 50 0000 C CNN
F 3 "" H 6000 5000 50 0000 C CNN
1 6000 5000
1 0 0 -1
$EndComp
$EndSCHEMATC $EndSCHEMATC

121
demos/simulation/sallen_key/sallen_key_schlib.lib Normal file
View File

@ -0,0 +1,121 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Generic_Opamp
#
DEF Generic_Opamp U 0 20 Y Y 1 F N
F0 "U" 0 250 50 H V L CNN
F1 "Generic_Opamp" 0 150 50 H V L CNN
F2 "" -100 -100 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X - 2 -300 -100 100 R 50 50 1 1 I
X V+ 3 -100 300 150 D 50 50 1 1 W
X V- 4 -100 -300 150 U 50 50 1 1 W
X ~ 5 300 0 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 30 V V C CNN
F3 "" 0 0 30 H V C CNN
$FPLIST
R_*
Resistor_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 60 60 1 1 P
X ~ 2 0 -150 50 U 60 60 1 1 P
ENDDRAW
ENDDEF
#
# VDD
#
DEF VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VDD" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# VSOURCE
#
DEF ~VSOURCE V 0 40 Y Y 1 F N
F0 "V" 200 200 50 H V C CNN
F1 "VSOURCE" 250 100 50 H I C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F4 "Value" 0 0 60 H I C CNN "Fieldname"
F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
DRAW
C 0 0 100 0 1 0 N
P 2 0 1 0 0 -75 0 75 N
P 4 0 1 0 0 75 -25 25 25 25 0 75 F
X ~ 1 0 200 100 D 50 50 1 1 I
X ~ 2 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# VSS
#
DEF VSS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VSS" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VSS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

3
demos/simulation/sallen_key/sym-lib-table Normal file
View File

@ -0,0 +1,3 @@
(sym_lib_table
(lib (name sallen_key_schlib)(type Legacy)(uri ${KIPRJMOD}/sallen_key_schlib.lib)(options "")(descr ""))
)