Heirarchical sheet selection includes more.
Now the heirarchical sheet selection feature includes tracks that belong to a net spanning multiple sheets, but only by doing a logical connection from the pads of the modules. This is to be able to select connections between components on the same sheet. For example if the sheet contains a star power connection or something similar, then most of the sheet local connections will now also be included.
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@ -32,6 +32,7 @@
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#include <limits.h>
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#include <algorithm>
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#include <iterator>
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#include <fctsys.h>
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#include <common.h>
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@ -1560,6 +1561,21 @@ D_PAD* BOARD::GetPad( TRACK* aTrace, ENDPOINT_T aEndPoint )
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}
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return NULL;
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}
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std::list<TRACK*> BOARD::GetTracksByPosition( const wxPoint& aPosition, PCB_LAYER_ID aLayer ) const
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{
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std::list<TRACK*> tracks;
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for( TRACK *track = GetFirstTrack( m_Track); track; track = GetFirstTrack( track->Next() ) )
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{
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if( ( ( track->GetStart() == aPosition) || track->GetEnd() == aPosition ) &&
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( track->GetState( BUSY | IS_DELETED ) == 0 ) &&
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( ( aLayer == UNDEFINED_LAYER ) || ( track->IsOnLayer( aLayer ) ) ) )
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tracks.push_back( track );
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}
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return tracks;
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}
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@ -1151,6 +1151,16 @@ public:
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VIA* GetViaByPosition( const wxPoint& aPosition,
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PCB_LAYER_ID aLayer = PCB_LAYER_ID( -1 ) ) const;
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/**
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* Function GetTracksByPosition
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* finds the list of tracks that starts or ends at \a aPosition on \a aLayer.
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*
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* @param aPosition The wxPoint to check start agains against.
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* @param aLayer The layer to search. Use -1 (<PCB_LAYER_ID>::UNDEFINED_LAYER) for a don't care.
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* @return std::list<TRACK*> A list of TRACK* items that can be zero if no track is found.
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*/
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std::list<TRACK*> GetTracksByPosition( const wxPoint& aPosition, PCB_LAYER_ID aLayer = PCB_LAYER_ID( -1 ) ) const;
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/**
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* Function GetPad
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* finds a pad \a aPosition on \a aLayer.
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@ -498,5 +498,16 @@ inline VIA* GetFirstVia( TRACK* aTrk, const TRACK* aStopPoint = NULL )
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else
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return NULL;
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}
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inline TRACK* GetFirstTrack( TRACK* aTrk, const TRACK* aStopPoint = NULL )
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{
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while( aTrk && ( aTrk != aStopPoint ) && ( aTrk->Type() != PCB_TRACE_T ) )
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aTrk = aTrk->Next();
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// It could stop because of the stop point, not on a via
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if( aTrk && ( aTrk->Type() == PCB_TRACE_T ) )
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return static_cast<TRACK*>( aTrk );
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else
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return NULL;
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}
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#endif // CLASS_TRACK_H
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@ -897,6 +897,7 @@ void SELECTION_TOOL::selectAllItemsOnSheet( wxString& aSheetpath )
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//Generate a list of all pads, and of all nets they belong to.
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std::list<int> netcodeList;
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std::list<BOARD_CONNECTED_ITEM*> padList;
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for( MODULE* mmod : modList )
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{
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for( auto pad : mmod->Pads() )
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@ -904,14 +905,25 @@ void SELECTION_TOOL::selectAllItemsOnSheet( wxString& aSheetpath )
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if( pad->IsConnected() )
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{
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netcodeList.push_back( pad->GetNetCode() );
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padList.push_back( pad );
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}
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}
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}
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// remove all duplicates
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netcodeList.sort();
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netcodeList.unique();
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// auto select trivial connections segments which are launched from the pads
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std::list<TRACK*> launchTracks;
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for( auto pad : padList )
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{
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launchTracks = board()->GetTracksByPosition( pad->GetPosition() );
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for ( auto track : launchTracks )
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{
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selectAllItemsConnectedToTrack( *track );
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}
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}
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// now we need to find all modules that are connected to each of these nets
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// then we need to determine if these modules are in the list of modules
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// belonging to this sheet ( modList )
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