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Add missing KIID to edge_module 

In order to support grouping in the footprint editor, we need full KIIDs
stored with the footprint elements.
This commit is contained in:
Seth Hillbrand 2020-07-24 15:42:23 -07:00
parent 0a5f11fb37
commit ad625d8d76
3 changed files with 15 additions and 2 deletions
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4
pcbnew/kicad_plugin.cpp
View File

@ -865,6 +865,8 @@ void PCB_IO::format( EDGE_MODULE* aModuleDrawing, int aNestLevel ) const
m_out->Print( 0, " (width %s)", FormatInternalUnits( aModuleDrawing->GetWidth() ).c_str() ); m_out->Print( 0, " (width %s)", FormatInternalUnits( aModuleDrawing->GetWidth() ).c_str() );
m_out->Print( 0, " (tstamp %s)", TO_UTF8( aModuleDrawing->m_Uuid.AsString() ) );
m_out->Print( 0, ")\n" ); m_out->Print( 0, ")\n" );
} }
@ -1529,6 +1531,8 @@ void PCB_IO::format( TEXTE_MODULE* aText, int aNestLevel ) const
aText->EDA_TEXT::Format( m_out, aNestLevel, m_ctl | CTL_OMIT_HIDE ); aText->EDA_TEXT::Format( m_out, aNestLevel, m_ctl | CTL_OMIT_HIDE );
m_out->Print( aNestLevel + 1, "(tstamp %s)\n", TO_UTF8( aText->m_Uuid.AsString() ) );
m_out->Print( aNestLevel, ")\n" ); m_out->Print( aNestLevel, ")\n" );
} }

3
pcbnew/kicad_plugin.h
View File

@ -71,7 +71,8 @@ class TEXTE_PCB;
//#define SEXPR_BOARD_FILE_VERSION 20200518 // save hole_to_hole_min //#define SEXPR_BOARD_FILE_VERSION 20200518 // save hole_to_hole_min
//#define SEXPR_BOARD_FILE_VERSION 20200614 // Add support for fp_rects and gr_rects //#define SEXPR_BOARD_FILE_VERSION 20200614 // Add support for fp_rects and gr_rects
//#define SEXPR_BOARD_FILE_VERSION 20200625 // Multilayer zones, zone names, island controls //#define SEXPR_BOARD_FILE_VERSION 20200625 // Multilayer zones, zone names, island controls
#define SEXPR_BOARD_FILE_VERSION 20200628 // remove visibility settings //#define SEXPR_BOARD_FILE_VERSION 20200628 // remove visibility settings
#define SEXPR_BOARD_FILE_VERSION 20200724 // Add KIID to module components
#define CTL_STD_LAYER_NAMES (1 << 0) ///< Use English Standard layer names #define CTL_STD_LAYER_NAMES (1 << 0) ///< Use English Standard layer names
#define CTL_OMIT_NETS (1 << 1) ///< Omit pads net names (useless in library) #define CTL_OMIT_NETS (1 << 1) ///< Omit pads net names (useless in library)

10
pcbnew/pcb_parser.cpp
View File

@ -2635,11 +2635,13 @@ MODULE* PCB_PARSER::parseMODULE_unchecked( wxArrayString* aInitialComments )
{ {
case TEXTE_MODULE::TEXT_is_REFERENCE: case TEXTE_MODULE::TEXT_is_REFERENCE:
module->Reference() = *text; module->Reference() = *text;
const_cast<KIID&>( module->Reference().m_Uuid ) = text->m_Uuid;
delete text; delete text;
break; break;
case TEXTE_MODULE::TEXT_is_VALUE: case TEXTE_MODULE::TEXT_is_VALUE:
module->Value() = *text; module->Value() = *text;
const_cast<KIID&>( module->Value().m_Uuid ) = text->m_Uuid;
delete text; delete text;
break; break;
@ -2807,8 +2809,14 @@ TEXTE_MODULE* PCB_PARSER::parseTEXTE_MODULE()
parseEDA_TEXT( (EDA_TEXT*) text.get() ); parseEDA_TEXT( (EDA_TEXT*) text.get() );
break; break;
case T_tstamp:
NextTok();
const_cast<KIID&>( text->m_Uuid ) = KIID( CurStr() );
NeedRIGHT();
break;
default: default:
Expecting( "hide or effects" ); Expecting( "layer, hide, effects or tstamp" );
} }
} }