Add silk clearance checking to Resolve Clearances...
Also fixes a bug in order of RTrees in silk collision checker.
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@ -620,18 +620,19 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRulesForItems( DRC_CONSTRAINT_TYPE_T aConstraintI
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REPORT( "" )
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if( aConstraintId == DRC_CONSTRAINT_TYPE_CLEARANCE )
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if( aConstraintId == DRC_CONSTRAINT_TYPE_CLEARANCE
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|| aConstraintId == DRC_CONSTRAINT_TYPE_SILK_CLEARANCE
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|| aConstraintId == DRC_CONSTRAINT_TYPE_HOLE_CLEARANCE
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|| aConstraintId == DRC_CONSTRAINT_TYPE_COURTYARD_CLEARANCE )
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{
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int clearance = rcons->constraint.m_Value.Min();
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REPORT( wxString::Format( implicit ? _( "Checking %s; clearance: %s." )
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: _( "Checking rule %s; clearance: %s."),
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REPORT( wxString::Format( _( "Checking %s; clearance: %s." ),
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rcons->constraint.GetName(),
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MessageTextFromValue( UNITS, clearance ) ) )
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}
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else
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{
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REPORT( wxString::Format( implicit ? _( "Checking %s." )
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: _( "Checking rule %s."),
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REPORT( wxString::Format( _( "Checking %s." ),
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rcons->constraint.GetName() ) )
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}
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@ -199,11 +199,13 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run()
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return true;
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};
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int numSilk = forEachGeometryItem( { PCB_SHAPE_T, PCB_FP_SHAPE_T, PCB_TEXT_T, PCB_FP_TEXT_T },
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forEachGeometryItem( { PCB_SHAPE_T, PCB_FP_SHAPE_T, PCB_TEXT_T, PCB_FP_TEXT_T },
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LSET( 2, F_SilkS, B_SilkS ), addToSilkTree );
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forEachGeometryItem( {}, LSET::FrontMask() | LSET::BackMask(), addToTargetTree );
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reportAux( _("Testing %d silkscreen features."), numSilk );
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reportAux( _("Testing %d silkscreen features against %d board items."),
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silkTree.size(),
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targetTree.size() );
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const std::vector<DRC_RTREE::LAYER_PAIR> layerPairs =
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{
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@ -225,7 +227,7 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run()
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DRC_RTREE::LAYER_PAIR( B_SilkS, Edge_Cuts ),
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};
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silkTree.QueryCollidingPairs( &targetTree, layerPairs, checkClearance, m_largestClearance );
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targetTree.QueryCollidingPairs( &silkTree, layerPairs, checkClearance, m_largestClearance );
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reportRuleStatistics();
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@ -183,8 +183,9 @@ void PCB_INSPECTION_TOOL::reportZoneConnection( ZONE_CONTAINER* aZone, D_PAD* aP
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}
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void PCB_INSPECTION_TOOL::reportCopperClearance( PCB_LAYER_ID aLayer, BOARD_CONNECTED_ITEM* aA,
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BOARD_ITEM* aB, REPORTER* r )
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void PCB_INSPECTION_TOOL::reportClearance( DRC_CONSTRAINT_TYPE_T aClearanceType,
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PCB_LAYER_ID aLayer, BOARD_ITEM* aA, BOARD_ITEM* aB,
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REPORTER* r )
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{
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r->Report( "" );
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@ -201,8 +202,7 @@ void PCB_INSPECTION_TOOL::reportCopperClearance( PCB_LAYER_ID aLayer, BOARD_CONN
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return;
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}
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auto constraint = drcEngine.EvalRulesForItems( DRC_CONSTRAINT_TYPE_CLEARANCE, aA, aB,
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aLayer, r );
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auto constraint = drcEngine.EvalRulesForItems( aClearanceType, aA, aB, aLayer, r );
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if( r )
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{
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@ -248,9 +248,32 @@ int PCB_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent )
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else if( !a->IsConnected() && b->IsConnected() )
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std::swap( a, b );
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if( !IsCopperLayer( layer ) )
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auto getItemDescription =
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[&]( BOARD_ITEM* aItem )
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{
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r->Report( wxString::Format( _( "Active layer (%s) is not a copper layer. "
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wxString s = aItem->GetSelectMenuText( r->GetUnits() );
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if( auto* cItem = dynamic_cast<BOARD_CONNECTED_ITEM*>( aItem ) )
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s += wxString::Format( _( " [netclass %s]" ), cItem->GetNetClassName() );
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return s;
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};
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if( layer == F_SilkS || layer == B_SilkS )
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{
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r->Report( _( "<h7>Silkscreen clearance resolution for:</h7>" ) );
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r->Report( wxString::Format( wxT( "<ul><li>%s %s</li><li>%s</li><li>%s</li></ul>" ),
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_( "Layer" ),
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m_frame->GetBoard()->GetLayerName( layer ),
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getItemDescription( a ),
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getItemDescription( b ) ) );
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reportClearance( DRC_CONSTRAINT_TYPE_SILK_CLEARANCE, layer, a, b, r );
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}
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else if( !IsCopperLayer( layer ) )
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{
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r->Report( wxString::Format( _( "Active layer (%s) is not a silk or copper layer. "
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"No clearance defined." ),
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m_frame->GetBoard()->GetLayerName( layer ) ) );
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}
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@ -272,17 +295,6 @@ int PCB_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent )
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}
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else
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{
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auto getItemDescription =
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[&]( BOARD_ITEM* aItem )
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{
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wxString s = aItem->GetSelectMenuText( r->GetUnits() );
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if( auto* cItem = dynamic_cast<BOARD_CONNECTED_ITEM*>( aItem ) )
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s += wxString::Format( _( " [netclass %s]" ), cItem->GetNetClassName() );
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return s;
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};
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r->Report( _( "<h7>Clearance resolution for:</h7>" ) );
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r->Report( wxString::Format( wxT( "<ul><li>%s %s</li><li>%s</li><li>%s</li></ul>" ),
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@ -311,7 +323,7 @@ int PCB_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent )
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else if( ac )
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{
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// Different nets (or second unconnected)....
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reportCopperClearance( layer, ac, b, r );
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reportClearance( DRC_CONSTRAINT_TYPE_CLEARANCE, layer, ac, b, r );
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}
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}
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@ -116,8 +116,8 @@ private:
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void reportZoneConnection( ZONE_CONTAINER* aZone, D_PAD* aPad, REPORTER* r );
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void reportCopperClearance( PCB_LAYER_ID aLayer, BOARD_CONNECTED_ITEM* aA, BOARD_ITEM* aB,
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REPORTER* r );
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void reportClearance( DRC_CONSTRAINT_TYPE_T aClearanceType, PCB_LAYER_ID aLayer,
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BOARD_ITEM* aA, BOARD_ITEM* aB, REPORTER* r );
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private:
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PCB_EDIT_FRAME* m_frame; // Pointer to the currently used edit frame.
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