Don't return holes that have a parent pad or via.
(While we don't currently have holes without a parent pad or via, you could imagine using HOLEs in the future to represent a hole in a first-class board outline, so better not to build this assumption in.)
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@ -63,7 +63,13 @@ public:
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BOARD_ITEM* Parent() const override
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{
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return m_parentPadVia ? m_parentPadVia->Parent() : nullptr;
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if( m_parent )
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return m_parent;
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if( m_parentPadVia )
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return m_parentPadVia->Parent();
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return nullptr;
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}
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void SetCenter( const VECTOR2I& aCenter );
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@ -129,8 +129,6 @@ public:
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void ClearCaches() override;
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private:
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int holeRadius( const PNS::ITEM* aItem ) const;
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/**
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* Checks for netnamed differential pairs.
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* This accepts nets named suffixed by 'P', 'N', '+', '-', as well as additional
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@ -174,27 +172,6 @@ PNS_PCBNEW_RULE_RESOLVER::~PNS_PCBNEW_RULE_RESOLVER()
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}
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int PNS_PCBNEW_RULE_RESOLVER::holeRadius( const PNS::ITEM* aItem ) const
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{
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if( aItem->Kind() == PNS::ITEM::SOLID_T )
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{
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const PAD* pad = dynamic_cast<const PAD*>( aItem->Parent() );
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if( pad && pad->GetDrillShape() == PAD_DRILL_SHAPE_CIRCLE )
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return pad->GetDrillSize().x / 2;
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}
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else if( aItem->Kind() == PNS::ITEM::VIA_T )
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{
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const PCB_VIA* via = dynamic_cast<const PCB_VIA*>( aItem->Parent() );
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if( via )
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return via->GetDrillValue() / 2;
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}
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return 0;
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}
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bool PNS_PCBNEW_RULE_RESOLVER::IsDiffPair( const PNS::ITEM* aA, const PNS::ITEM* aB )
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{
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int net_p, net_n;
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@ -1573,13 +1573,15 @@ ITEM *NODE::FindItemByParent( const BOARD_ITEM* aParent )
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if( aParent->IsConnected() )
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{
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const BOARD_CONNECTED_ITEM* cItem = static_cast<const BOARD_CONNECTED_ITEM*>( aParent );
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INDEX::NET_ITEMS_LIST* l_cur = m_index->GetItemsForNet( cItem->GetNetCode() );
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INDEX::NET_ITEMS_LIST* l_cur = m_index->GetItemsForNet( cItem->GetNetCode() );
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if( l_cur )
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{
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for( ITEM* item : *l_cur )
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{
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if( item->OfKind( PNS::ITEM::HOLE_T ) && static_cast<HOLE*>( item )->ParentPadVia() )
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continue;
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if( item->Parent() == aParent )
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return item;
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}
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