more amazing free software
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@ -1782,7 +1782,7 @@ public:
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ELEM( T_placement, aParent )
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{
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unit = 0;
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flip_style = T_mirror_first;
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flip_style = T_NONE;
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}
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~PLACEMENT()
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@ -2711,43 +2711,52 @@ public:
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aShape->SetParent( this );
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}
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}
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void FormatContents( OUTPUTFORMATTER* out, int nestLevel ) throw( IOError )
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void Format( OUTPUTFORMATTER* out, int nestLevel ) throw( IOError )
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{
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out->Print( nestLevel, "(%s ", LEXER::GetTokenText( Type() ) );
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if( shape )
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shape->Format( out, nestLevel );
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shape->Format( out, 0 );
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if( net_id.size() )
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{
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const char* quote = out->GetQuoteChar( net_id.c_str() );
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out->Print( nestLevel, "(net %s%s%s)\n",
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out->Print( 0, "(net %s%s%s)",
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quote, net_id.c_str(), quote );
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}
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if( turret >= 0 )
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out->Print( nestLevel, "(turrent %d)\n", turret );
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out->Print( 0, "(turrent %d)", turret );
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if( type != T_NONE )
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out->Print( nestLevel, "(type %s)\n", LEXER::GetTokenText( type ) );
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out->Print( 0, "(type %s)", LEXER::GetTokenText( type ) );
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if( attr != T_NONE )
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out->Print( nestLevel, "(attr %s)\n", LEXER::GetTokenText( attr ) );
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out->Print( 0, "(attr %s)", LEXER::GetTokenText( attr ) );
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if( shield.size() )
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{
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const char* quote = out->GetQuoteChar( shield.c_str() );
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out->Print( nestLevel, "(shield %s%s%s)\n",
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out->Print( 0, "(shield %s%s%s)",
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quote, shield.c_str(), quote );
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}
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for( WINDOWS::iterator i=windows.begin(); i!=windows.end(); ++i )
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i->Format( out, nestLevel );
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if( windows.size() )
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{
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out->Print( 0, "\n" );
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for( WINDOWS::iterator i=windows.begin(); i!=windows.end(); ++i )
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i->Format( out, nestLevel+1 );
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}
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if( connect )
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connect->Format( out, nestLevel );
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connect->Format( out, 0 );
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if( supply )
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out->Print( nestLevel, "(supply)\n" );
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out->Print( 0, "(supply)" );
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out->Print( 0, ")\n" );
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}
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};
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typedef boost::ptr_vector<WIRE> WIRES;
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@ -3407,8 +3416,13 @@ class SPECCTRA_DB : public OUTPUTFORMATTER
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STRINGFORMATTER sf;
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// FromBOARD() uses this
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STRINGS layerIds;
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STRINGS layerIds; ///< indexed by PCB layer number
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/// maps BOARD layer number to PCB layer numbers
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std::vector<int> kicadLayer2pcb;
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/// maps PCB layer number to BOARD layer numbers
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std::vector<int> pcbLayer2kicad;
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/**
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@ -215,9 +215,8 @@ static int Pad_list_Sort_by_Shapes( const void* refptr, const void* objptr )
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/*********************************************************************/
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/*
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static int Track_list_Sort_by_Netcode( const void* o1, const void* o2 )
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/*********************************************************************/
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{
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TRACK* t1 = *(TRACK**) o1;
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TRACK* t2 = *(TRACK**) o2;
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@ -232,6 +231,7 @@ static int Track_list_Sort_by_Netcode( const void* o1, const void* o2 )
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return diff; // zero here
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}
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*/
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/**
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@ -327,13 +327,11 @@ void SPECCTRA_DB::makePADSTACKs( BOARD* aBoard, TYPE_COLLECTOR& aPads )
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D_PAD* old_pad = NULL;
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#define COPPER_LAYERS 2 // top and bottom
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for( int i=0; i<aPads.GetCount(); ++i )
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{
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D_PAD* pad = (D_PAD*) aPads[i];
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bool doLayer[COPPER_LAYERS] = {
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bool doLayer[2] = { // top and bottom layers only
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pad->IsOnLayer( LAYER_CMP_N ),
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pad->IsOnLayer( COPPER_LAYER_N )
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};
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@ -373,8 +371,11 @@ void SPECCTRA_DB::makePADSTACKs( BOARD* aBoard, TYPE_COLLECTOR& aPads )
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POINT padOffset( scale(pad->m_Offset.x), -scale(pad->m_Offset.y) );
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// for now, we will report only one layer for the pads. SMD pads are reported on the
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// top layer, and through hole are reported on <reserved_layer_name> "signal"
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// For now, we will report only one layer for the pads. SMD pads are reported on the
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// top layer, and through hole are reported on <reserved_layer_name> "signal".
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// We could do better if there was actually a "layer type" field within
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// Kicad which would hold one of: T_signal, T_power, T_mixed, T_jumper
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// See bottom of page 74 of the SECCTRA Design Language Reference, May 2000.
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int reportedLayers = 1; // how many layers are reported.
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doLayer[0] = true;
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@ -681,12 +682,19 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
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int layerCount = aBoard->GetCopperLayerCount();
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layerIds.clear();
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pcbLayer2kicad.resize( layerCount );
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kicadLayer2pcb.resize( LAYER_CMP_N+1 );
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for( int ndx=layerCount-1; ndx >= 0; --ndx )
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for( int kiNdx=layerCount-1, pcbNdx=0; kiNdx >= 0; --kiNdx, ++pcbNdx )
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{
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int kilayer = kiNdx>0 && kiNdx==layerCount-1 ? LAYER_CMP_N : kiNdx;
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// establish bi-directional mapping between kicad's BOARD layer and PCB layer
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pcbLayer2kicad[pcbNdx] = kilayer;
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kicadLayer2pcb[kilayer] = pcbNdx;
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// save the specctra layer name in SPECCTRA_DB::layerIds for later.
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layerIds.push_back( CONV_TO_UTF8(
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aBoard->GetLayerName( ndx>0 && ndx==layerCount-1 ? LAYER_CMP_N : ndx )));
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layerIds.push_back( CONV_TO_UTF8( aBoard->GetLayerName( kilayer ) ) );
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LAYER* layer = new LAYER( pcb->structure );
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pcb->structure->layers.push_back( layer );
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@ -699,10 +707,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
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// for now, report on only the top and bottom layers with respect to the copper
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// within a pad's padstack. this is usually correct, but not rigorous. We could do
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// better if there was actually a "layer type" field within Kicad which would
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// hold one of: T_signal, T_power, T_mixed, T_jumper
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// See bottom of page 74 of the SECCTRA Design Language Reference, May 2000.
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// within a pad's padstack. this is usually correct, but not rigorous.
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// a space in a quoted token is NOT a terminator, true establishes this.
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pcb->parser->space_in_quoted_tokens = true;
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@ -805,7 +810,49 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
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}
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//-----<zone containers become planes>--------------------------------------------
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//-----<rules>--------------------------------------------------------
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{
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// put out these rules, the user can then edit them with a text editor
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char rule[80]; // padstack name builder
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int curTrackWidth = aBoard->m_BoardSettings->m_CurrentTrackWidth;
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int curTrackClear = aBoard->m_BoardSettings->m_TrackClearence;
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double clearance = scale(curTrackClear);
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STRINGS& rules = pcb->structure->rules->rules;
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sprintf( rule, "(width %.6g)", scale( curTrackWidth ) );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g)", clearance );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g (type pad_to_turn_gap))", clearance );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g (type smd_to_turn_gap))", clearance );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g (type via_via))", clearance );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g (type via_smd))", clearance );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g (type via_pin))", clearance );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g (type pin_pin))", clearance );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g (type smd_pin))", clearance );
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rules.push_back( rule );
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sprintf( rule, "(clearance %.6g (type smd_smd))", clearance );
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rules.push_back( rule );
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}
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//-----<zone containers become planes>--------------------------------
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{
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static const KICAD_T scanZONEs[] = { TYPEZONE_CONTAINER, EOT };
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items.Collect( aBoard, scanZONEs );
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@ -958,75 +1005,71 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
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//-----<create the wires from tracks>-----------------------------------
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{
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#if 0
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// export all of them for now, later we'll decide what controls we need
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// on this.
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static KICAD_T scanTRACKs[] = { TYPETRACK, TYPEVIA, EOT };
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static KICAD_T scanTRACKs[] = { TYPETRACK, EOT };
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items.Collect( aBoard, scanTRACKs );
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/*
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if( items.GetCount() )
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qsort( (void*) items.BasePtr(), items.GetCount(),
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sizeof(TRACK*), Track_list_Sort_by_Netcode );
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*/
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WIRING* wiring = pcb->wiring;
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WIRE* wire;
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std::string netname;
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WIRING* wiring = pcb->wiring;
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PATH* path = 0;
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int old_netcode = -1;
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int old_width = -1;
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int old_layer = -1;
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int old_netcode = -1;
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int old_width = -1;
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int old_layer = -1;
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for( int i=0; i<items.GetCount(); ++i )
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{
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TRACK* track = (TRACK*) items[i]; // torv == track or via
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TRACK* track = (TRACK*) items[i];
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if( track->GetNet() == 0 )
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continue;
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if( old_netcode != track->GetNet() )
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{
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old_netcode = track->GetNet();
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EQUIPOT* equipot = aBoard->FindNet( track->GetNet() );
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wxASSERT( equipot );
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wire = new WIRE( wiring );
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wiring->wires.push_back( wire );
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wire->net_id = CONV_TO_UTF8( equipot->m_Netname );
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}
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if( old_width != track->m_Width )
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if( old_netcode != track->GetNet()
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|| old_width != track->m_Width
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|| old_layer != track->GetLayer()
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|| (path && path->points.back() != mapPt(track->m_Start) )
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)
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{
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old_width = track->m_Width;
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wire = new WIRE( wiring );
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wiring.wires.push_back( wire );
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old_width = track->m_Width;
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old_layer = track->GetLayer();
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wire->net_id = CONV_TO_UTF8( equipot->m_NetName );
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}
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if( (track->Type() == TYPETRACK) || (track->Type() == TYPEZONE) )
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{
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if( old_layer != track->GetLayer() )
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if( old_netcode != track->GetNet() )
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{
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old_layer = track->GetLayer();
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fprintf( file, "LAYER %s\n",
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CONV_TO_UTF8( GenCAD_Layer_Name[track->GetLayer() & 0x1F] ) );
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old_netcode = track->GetNet();
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EQUIPOT* equipot = aBoard->FindNet( track->GetNet() );
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wxASSERT( equipot );
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netname = CONV_TO_UTF8( equipot->m_Netname );
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}
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fprintf( file, "LINE %d %d %d %d\n",
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mapXto( track->m_Start.x ), mapYto( track->m_Start.y ),
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mapXto( track->m_End.x ), mapYto( track->m_End.y ) );
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}
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if( track->Type() == TYPEVIA )
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{
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fprintf( file, "VIA viapad%d %d %d ALL %d via%d\n",
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track->m_Width,
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mapXto( track->m_Start.x ), mapYto( track->m_Start.y ),
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g_DesignSettings.m_ViaDrill, vianum++ );
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WIRE* wire = new WIRE( wiring );
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wiring->wires.push_back( wire );
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wire->net_id = netname;
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int kiLayer = track->GetLayer();
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int pcbLayer = kicadLayer2pcb[kiLayer];
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path = new PATH( wire );
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wire->SetShape( path );
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path->layer_id = layerIds[pcbLayer];
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path->aperture_width = scale( old_width );
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path->AppendPoint( mapPt( track->m_Start ) );
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}
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path->AppendPoint( mapPt( track->m_End ) );
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}
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#endif
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// @todo vias here.
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}
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//-----<restore MODULEs>------------------------------------------------
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