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Corrected a few pads layer settings in 'sonde xilinx' demo.

This commit is contained in:
Maciej Suminski 2015-04-16 09:33:33 +02:00
parent 4b22e8ed37
commit b85ed89ea5
1 changed files with 262 additions and 264 deletions
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526
demos/sonde xilinx/sonde xilinx.kicad_pcb
View File

@ -1,9 +1,9 @@
(kicad_pcb (version 3) (host pcbnew "(2014-01-04 BZR 4608)-product") (kicad_pcb (version 4) (host pcbnew "(2015-03-10 BZR 5499)-product")
(general (general
(links 66) (links 66)
(no_connects 0) (no_connects 0)
(area 102.717599 67.157599 184.302401 110.642401) (area 87.894885 61.823599 196.621401 118.313201)
(thickness 1.6002) (thickness 1.6002)
(drawings 19) (drawings 19)
(tracks 265) (tracks 265)
@ -19,21 +19,21 @@
) )
(layers (layers
(15 Dessus signal) (0 Dessus signal)
(0 Dessous signal) (31 Dessous signal)
(16 B.Adhes user) (32 B.Adhes user)
(17 F.Adhes user) (33 F.Adhes user)
(18 B.Paste user) (34 B.Paste user)
(19 F.Paste user) (35 F.Paste user)
(20 B.SilkS user) (36 B.SilkS user)
(21 F.SilkS user) (37 F.SilkS user)
(22 B.Mask user) (38 B.Mask user)
(23 F.Mask user) (39 F.Mask user)
(24 Dwgs.User user) (40 Dwgs.User user)
(25 Cmts.User user) (41 Cmts.User user)
(26 Eco1.User user) (42 Eco1.User user)
(27 Eco2.User user) (43 Eco2.User user)
(28 Edge.Cuts user) (44 Edge.Cuts user)
) )
(setup (setup
@ -60,13 +60,13 @@
(mod_edge_width 0.3) (mod_edge_width 0.3)
(mod_text_size 0.3 1.5) (mod_text_size 0.3 1.5)
(mod_text_width 0.3) (mod_text_width 0.3)
(pad_size 1.5748 2.286) (pad_size 1.778 5.08)
(pad_drill 0.8128) (pad_drill 0)
(pad_to_mask_clearance 0.254) (pad_to_mask_clearance 0.254)
(aux_axis_origin 0 0) (aux_axis_origin 0 0)
(visible_elements 7FFFFFFF) (visible_elements 7FFFFFFF)
(pcbplotparams (pcbplotparams
(layerselection 3178497) (layerselection 0x00030_80000001)
(usegerberextensions false) (usegerberextensions false)
(excludeedgelayer false) (excludeedgelayer false)
(linewidth 0.150000) (linewidth 0.150000)
@ -82,7 +82,6 @@
(psa4output false) (psa4output false)
(plotreference true) (plotreference true)
(plotvalue true) (plotvalue true)
(plotothertext true)
(plotinvisibletext false) (plotinvisibletext false)
(padsonsilk false) (padsonsilk false)
(subtractmaskfromsilk false) (subtractmaskfromsilk false)
@ -128,7 +127,6 @@
(via_drill 0.635) (via_drill 0.635)
(uvia_dia 0.508) (uvia_dia 0.508)
(uvia_drill 0.127) (uvia_drill 0.127)
(add_net "")
(add_net /CLK-D1) (add_net /CLK-D1)
(add_net /CTRL-D3) (add_net /CTRL-D3)
(add_net /DONE-SELECT*) (add_net /DONE-SELECT*)
@ -984,7 +982,7 @@
) )
) )
(module DB9M_CI_INVERT (layer Dessus) (tedit 3F98DD7A) (tstamp 3) (module DB9M_CI_INVERT (layer Dessus) (tedit 552F658C) (tstamp 3)
(at 184.15 90.17 270) (at 184.15 90.17 270)
(descr "Connecteur DB9 femelle encarte") (descr "Connecteur DB9 femelle encarte")
(tags "CONN DB9") (tags "CONN DB9")
@ -1015,11 +1013,11 @@
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(pad 4 connect rect (at 2.794 2.54 270) (size 1.778 5.08) (layers Dessous B.Mask) (pad 4 connect rect (at 2.794 2.54 270) (size 1.778 5.08) (layers Dessous B.Mask)
(net 5 /TCK-CCLK)) (net 5 /TCK-CCLK))
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(net 8 /TDI-DIN)) (net 8 /TDI-DIN))
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(net 6 /TD0-DONE)) (net 6 /TD0-DONE))
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(net 4 /PWR_3,3-5V)) (net 4 /PWR_3,3-5V))
(pad 5 connect rect (at 5.588 2.54 270) (size 1.778 5.08) (layers Dessous B.Mask) (pad 5 connect rect (at 5.588 2.54 270) (size 1.778 5.08) (layers Dessous B.Mask)
(net 10 /TMS-PROG)) (net 10 /TMS-PROG))
@ -1085,271 +1083,271 @@
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