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PNS: Use a via to resolve via sizes

This commit is contained in:
Jon Evans 2023-08-07 18:29:16 -04:00
parent 93b7862615
commit bb13e8e754
1 changed files with 11 additions and 10 deletions
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21
pcbnew/router/pns_kicad_iface.cpp
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@ -661,15 +661,23 @@ bool PNS_KICAD_IFACE_BASE::ImportSizes( PNS::SIZES_SETTINGS& aSizes, PNS::ITEM*
int viaDiameter = bds.m_ViasMinSize;
int viaDrill = bds.m_MinThroughDrill;
PNS::VIA dummyVia, coupledVia;
if( aStartItem )
{
dummyVia.SetNet( aStartItem->Net() );
coupledVia.SetNet( m_ruleResolver->DpCoupledNet( aStartItem->Net() ) );
}
if( bds.UseNetClassVia() && aStartItem ) // netclass value
{
if( m_ruleResolver->QueryConstraint( PNS::CONSTRAINT_TYPE::CT_VIA_DIAMETER, aStartItem,
if( m_ruleResolver->QueryConstraint( PNS::CONSTRAINT_TYPE::CT_VIA_DIAMETER, &dummyVia,
nullptr, m_startLayer, &constraint ) )
{
viaDiameter = std::max( viaDiameter, constraint.m_Value.Opt() );
}
if( m_ruleResolver->QueryConstraint( PNS::CONSTRAINT_TYPE::CT_VIA_HOLE, aStartItem,
if( m_ruleResolver->QueryConstraint( PNS::CONSTRAINT_TYPE::CT_VIA_HOLE, &dummyVia,
nullptr, m_startLayer, &constraint ) )
{
viaDrill = std::max( viaDrill, constraint.m_Value.Opt() );
@ -734,14 +742,7 @@ bool PNS_KICAD_IFACE_BASE::ImportSizes( PNS::SIZES_SETTINGS& aSizes, PNS::ITEM*
aSizes.SetDiffPairViaGap( diffPairViaGap );
aSizes.SetDiffPairViaGapSameAsTraceGap( false );
int holeToHoleMin = bds.m_HoleToHoleMin;
PNS::VIA dummyVia, coupledVia;
if( aStartItem )
{
dummyVia.SetNet( aStartItem->Net() );
coupledVia.SetNet( m_ruleResolver->DpCoupledNet( aStartItem->Net() ) );
}
int holeToHoleMin = bds.m_HoleToHoleMin;
if( m_ruleResolver->QueryConstraint( PNS::CONSTRAINT_TYPE::CT_HOLE_TO_HOLE, &dummyVia,
&dummyVia, UNDEFINED_LAYER, &constraint ) )