Naming conventions and nullptr usage. No functional changes.

This commit is contained in:
Jeff Young 2023-04-01 15:14:35 +01:00
parent 4fbb85aa4f
commit bf9a42d7e1
4 changed files with 921 additions and 925 deletions

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -228,7 +228,7 @@ static bool isRoundKeepout( PAD* aPad )
*/ */
static PATH* makePath( const POINT& aStart, const POINT& aEnd, const std::string& aLayerName ) static PATH* makePath( const POINT& aStart, const POINT& aEnd, const std::string& aLayerName )
{ {
PATH* path = new PATH( 0, T_path ); PATH* path = new PATH( nullptr, T_path );
path->AppendPoint( aStart ); path->AppendPoint( aStart );
path->AppendPoint( aEnd ); path->AppendPoint( aEnd );
@ -614,9 +614,9 @@ IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, FOOTPRINT* aFootprint )
// get all the FOOTPRINT's pads. // get all the FOOTPRINT's pads.
fpItems.Collect( aFootprint, { PCB_PAD_T } ); fpItems.Collect( aFootprint, { PCB_PAD_T } );
IMAGE* image = new IMAGE( 0 ); IMAGE* image = new IMAGE( nullptr );
image->image_id = aFootprint->GetFPID().Format().c_str(); image->m_image_id = aFootprint->GetFPID().Format().c_str();
// from the pads, and make an IMAGE using collated padstacks. // from the pads, and make an IMAGE using collated padstacks.
for( int p = 0; p < fpItems.GetCount(); ++p ) for( int p = 0; p < fpItems.GetCount(); ++p )
@ -637,7 +637,7 @@ IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, FOOTPRINT* aFootprint )
{ {
KEEPOUT* keepout = new KEEPOUT( image, T_keepout ); KEEPOUT* keepout = new KEEPOUT( image, T_keepout );
image->keepouts.push_back( keepout ); image->m_keepouts.push_back( keepout );
CIRCLE* circle = new CIRCLE( keepout ); CIRCLE* circle = new CIRCLE( keepout );
@ -674,7 +674,7 @@ IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, FOOTPRINT* aFootprint )
PIN* pin = new PIN( image ); PIN* pin = new PIN( image );
padNumber = pad->GetNumber(); padNumber = pad->GetNumber();
pin->pin_id = TO_UTF8( padNumber ); pin->m_pin_id = TO_UTF8( padNumber );
if( padNumber != wxEmptyString && pinmap.find( padNumber ) == pinmap.end() ) if( padNumber != wxEmptyString && pinmap.find( padNumber ) == pinmap.end() )
{ {
@ -687,14 +687,14 @@ IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, FOOTPRINT* aFootprint )
sprintf( buf, "@%d", duplicates ); sprintf( buf, "@%d", duplicates );
pin->pin_id += buf; // append "@1" or "@2", etc. to pin name pin->m_pin_id += buf; // append "@1" or "@2", etc. to pin name
} }
pin->kiNetCode = pad->GetNetCode(); pin->m_kiNetCode = pad->GetNetCode();
image->pins.push_back( pin ); image->m_pins.push_back( pin );
pin->padstack_id = padstack->m_padstack_id; pin->m_padstack_id = padstack->m_padstack_id;
EDA_ANGLE angle = pad->GetOrientation() - aFootprint->GetOrientation(); EDA_ANGLE angle = pad->GetOrientation() - aFootprint->GetOrientation();
pin->SetRotation( angle.Normalize().AsDegrees() ); pin->SetRotation( angle.Normalize().AsDegrees() );
@ -904,8 +904,8 @@ IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, FOOTPRINT* aFootprint )
if( !zone->IsOnLayer( PCB_LAYER_ID( layer ) ) ) if( !zone->IsOnLayer( PCB_LAYER_ID( layer ) ) )
continue; continue;
KEEPOUT* keepout = new KEEPOUT( m_pcb->structure, keepout_type ); KEEPOUT* keepout = new KEEPOUT( m_pcb->m_structure, keepout_type );
image->keepouts.push_back( keepout ); image->m_keepouts.push_back( keepout );
PATH* mainPolygon = new PATH( keepout, T_polygon ); PATH* mainPolygon = new PATH( keepout, T_polygon );
keepout->SetShape( mainPolygon ); keepout->SetShape( mainPolygon );
@ -1066,7 +1066,7 @@ void SPECCTRA_DB::fillBOUNDARY( BOARD* aBoard, BOUNDARY* boundary )
keepout->SetShape( poly_ko ); keepout->SetShape( poly_ko );
poly_ko->SetLayerId( "signal" ); poly_ko->SetLayerId( "signal" );
m_pcb->structure->keepouts.push_back( keepout ); m_pcb->m_structure->m_keepouts.push_back( keepout );
SHAPE_LINE_CHAIN& hole = m_brd_outlines.Hole( cnt, ii ); SHAPE_LINE_CHAIN& hole = m_brd_outlines.Hole( cnt, ii );
@ -1132,9 +1132,9 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
for( int pcbNdx=0; pcbNdx<layerCount; ++pcbNdx ) for( int pcbNdx=0; pcbNdx<layerCount; ++pcbNdx )
{ {
LAYER* layer = new LAYER( m_pcb->structure ); LAYER* layer = new LAYER( m_pcb->m_structure );
m_pcb->structure->layers.push_back( layer ); m_pcb->m_structure->m_layers.push_back( layer );
layer->name = m_layerIds[pcbNdx]; layer->name = m_layerIds[pcbNdx];
@ -1164,25 +1164,25 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
} }
// a space in a quoted token is NOT a terminator, true establishes this. // a space in a quoted token is NOT a terminator, true establishes this.
m_pcb->parser->space_in_quoted_tokens = true; m_pcb->m_parser->space_in_quoted_tokens = true;
//-----<unit_descriptor> & <resolution_descriptor>-------------------- //-----<unit_descriptor> & <resolution_descriptor>--------------------
{ {
// Tell freerouter to use "tenths of micrometers", which is 100 nm resolution. Possibly // Tell freerouter to use "tenths of micrometers", which is 100 nm resolution. Possibly
// more resolution is possible in freerouter, but it would need testing. // more resolution is possible in freerouter, but it would need testing.
m_pcb->unit->units = T_um; m_pcb->m_unit->units = T_um;
m_pcb->resolution->units = T_um; m_pcb->m_resolution->units = T_um;
m_pcb->resolution->value = 10; // tenths of a um m_pcb->m_resolution->value = 10; // tenths of a um
} }
//-----<boundary_descriptor>------------------------------------------ //-----<boundary_descriptor>------------------------------------------
{ {
// Because fillBOUNDARY() can throw an exception, we link in an empty boundary so the // Because fillBOUNDARY() can throw an exception, we link in an empty boundary so the
// BOUNDARY does not get lost in the event of of an exception. // BOUNDARY does not get lost in the event of of an exception.
BOUNDARY* boundary = new BOUNDARY( 0 ); BOUNDARY* boundary = new BOUNDARY( nullptr );
m_pcb->structure->SetBOUNDARY( boundary ); m_pcb->m_structure->SetBOUNDARY( boundary );
fillBOUNDARY( aBoard, boundary ); fillBOUNDARY( aBoard, boundary );
} }
@ -1193,7 +1193,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
int defaultClearance = netSettings->m_DefaultNetClass->GetClearance(); int defaultClearance = netSettings->m_DefaultNetClass->GetClearance();
double clearance = scale( defaultClearance ); double clearance = scale( defaultClearance );
STRINGS& rules = m_pcb->structure->rules->rules; STRINGS& rules = m_pcb->m_structure->m_rules->m_rules;
sprintf( rule, "(width %.6g)", scale( defaultTrackWidth ) ); sprintf( rule, "(width %.6g)", scale( defaultTrackWidth ) );
rules.push_back( rule ); rules.push_back( rule );
@ -1251,31 +1251,31 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
if( !zone->IsOnLayer( PCB_LAYER_ID( layer ) ) ) if( !zone->IsOnLayer( PCB_LAYER_ID( layer ) ) )
continue; continue;
COPPER_PLANE* plane = new COPPER_PLANE( m_pcb->structure ); COPPER_PLANE* plane = new COPPER_PLANE( m_pcb->m_structure );
m_pcb->structure->planes.push_back( plane ); m_pcb->m_structure->m_planes.push_back( plane );
PATH* mainPolygon = new PATH( plane, T_polygon ); PATH* mainPolygon = new PATH( plane, T_polygon );
plane->SetShape( mainPolygon ); plane->SetShape( mainPolygon );
plane->name = TO_UTF8( zone->GetNetname() ); plane->m_name = TO_UTF8( zone->GetNetname() );
if( plane->name.size() == 0 ) if( plane->m_name.size() == 0 )
{ {
char name[32]; char name[32];
// This is one of those no connection zones, netcode=0, and it has no name. // This is one of those no connection zones, netcode=0, and it has no name.
// Create a unique, bogus netname. // Create a unique, bogus netname.
NET* no_net = new NET( m_pcb->network ); NET* no_net = new NET( m_pcb->m_network );
sprintf( name, "@:no_net_%d", netlessZones++ ); sprintf( name, "@:no_net_%d", netlessZones++ );
no_net->net_id = name; no_net->m_net_id = name;
// add the bogus net name to network->nets. // add the bogus net name to network->nets.
m_pcb->network->nets.push_back( no_net ); m_pcb->m_network->m_nets.push_back( no_net );
// use the bogus net name in the netless zone. // use the bogus net name in the netless zone.
plane->name = no_net->net_id; plane->m_name = no_net->m_net_id;
} }
mainPolygon->layer_id = m_layerIds[ m_kicadLayer2pcb[ layer ] ]; mainPolygon->layer_id = m_layerIds[ m_kicadLayer2pcb[ layer ] ];
@ -1306,8 +1306,8 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
} }
} }
WINDOW* window = 0; WINDOW* window = nullptr;
PATH* cutout = 0; PATH* cutout = nullptr;
bool isStartContour = true; bool isStartContour = true;
@ -1383,8 +1383,8 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
if( !zone->IsOnLayer( PCB_LAYER_ID( layer ) ) ) if( !zone->IsOnLayer( PCB_LAYER_ID( layer ) ) )
continue; continue;
KEEPOUT* keepout = new KEEPOUT( m_pcb->structure, keepout_type ); KEEPOUT* keepout = new KEEPOUT( m_pcb->m_structure, keepout_type );
m_pcb->structure->keepouts.push_back( keepout ); m_pcb->m_structure->m_keepouts.push_back( keepout );
PATH* mainPolygon = new PATH( keepout, T_polygon ); PATH* mainPolygon = new PATH( keepout, T_polygon );
keepout->SetShape( mainPolygon ); keepout->SetShape( mainPolygon );
@ -1460,7 +1460,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
//-----<build the images, components, and netlist>----------------------- //-----<build the images, components, and netlist>-----------------------
{ {
PIN_REF empty( m_pcb->network ); PIN_REF empty( m_pcb->m_network );
std::string componentId; std::string componentId;
int highestNetCode = 0; int highestNetCode = 0;
NETINFO_LIST& netInfo = aBoard->GetNetInfo(); NETINFO_LIST& netInfo = aBoard->GetNetInfo();
@ -1475,12 +1475,12 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
m_nets.resize( highestNetCode + 1, nullptr ); m_nets.resize( highestNetCode + 1, nullptr );
for( unsigned i = 1 /* skip "No Net" at [0] */; i < m_nets.size(); ++i ) for( unsigned i = 1 /* skip "No Net" at [0] */; i < m_nets.size(); ++i )
m_nets[i] = new NET( m_pcb->network ); m_nets[i] = new NET( m_pcb->m_network );
for( NETINFO_LIST::iterator i = netInfo.begin(); i != netInfo.end(); ++i ) for( NETINFO_LIST::iterator i = netInfo.begin(); i != netInfo.end(); ++i )
{ {
if( i->GetNetCode() > 0 ) if( i->GetNetCode() > 0 )
m_nets[i->GetNetCode()]->net_id = TO_UTF8( i->GetNetname() ); m_nets[i->GetNetCode()]->m_net_id = TO_UTF8( i->GetNetname() );
} }
m_padstackset.clear(); m_padstackset.clear();
@ -1497,25 +1497,25 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
// necessarily long. The exported netlist will have some fabricated pin names in it. // necessarily long. The exported netlist will have some fabricated pin names in it.
// If you don't like fabricated pin names, then make sure all pads within your // If you don't like fabricated pin names, then make sure all pads within your
// FOOTPRINTs are uniquely named! // FOOTPRINTs are uniquely named!
for( unsigned p = 0; p < image->pins.size(); ++p ) for( unsigned p = 0; p < image->m_pins.size(); ++p )
{ {
PIN* pin = &image->pins[p]; PIN* pin = &image->m_pins[p];
int netcode = pin->kiNetCode; int netcode = pin->m_kiNetCode;
if( netcode > 0 ) if( netcode > 0 )
{ {
NET* net = m_nets[netcode]; NET* net = m_nets[netcode];
net->pins.push_back( empty ); net->m_pins.push_back( empty );
PIN_REF& pin_ref = net->pins.back(); PIN_REF& pin_ref = net->m_pins.back();
pin_ref.component_id = componentId; pin_ref.component_id = componentId;
pin_ref.pin_id = pin->pin_id; pin_ref.pin_id = pin->m_pin_id;
} }
} }
IMAGE* registered = m_pcb->library->LookupIMAGE( image ); IMAGE* registered = m_pcb->m_library->LookupIMAGE( image );
if( registered != image ) if( registered != image )
{ {
@ -1525,15 +1525,15 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
image = registered; image = registered;
} }
COMPONENT* comp = m_pcb->placement->LookupCOMPONENT( image->GetImageId() ); COMPONENT* comp = m_pcb->m_placement->LookupCOMPONENT( image->GetImageId() );
PLACE* place = new PLACE( comp ); PLACE* place = new PLACE( comp );
comp->places.push_back( place ); comp->m_places.push_back( place );
place->SetRotation( footprint->GetOrientationDegrees() ); place->SetRotation( footprint->GetOrientationDegrees() );
place->SetVertex( mapPt( footprint->GetPosition() ) ); place->SetVertex( mapPt( footprint->GetPosition() ) );
place->component_id = componentId; place->m_component_id = componentId;
place->part_number = TO_UTF8( footprint->GetValue() ); place->m_part_number = TO_UTF8( footprint->GetValue() );
// footprint is flipped from bottom side, set side to T_back // footprint is flipped from bottom side, set side to T_back
if( footprint->GetFlag() ) if( footprint->GetFlag() )
@ -1541,7 +1541,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
EDA_ANGLE angle = ANGLE_180 - footprint->GetOrientation(); EDA_ANGLE angle = ANGLE_180 - footprint->GetOrientation();
place->SetRotation( angle.Normalize().AsDegrees() ); place->SetRotation( angle.Normalize().AsDegrees() );
place->side = T_back; place->m_side = T_back;
} }
} }
@ -1553,7 +1553,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
PADSTACKSET::auto_type ps = m_padstackset.release( i ); PADSTACKSET::auto_type ps = m_padstackset.release( i );
PADSTACK* padstack = ps.release(); PADSTACK* padstack = ps.release();
m_pcb->library->AddPadstack( padstack ); m_pcb->m_library->AddPadstack( padstack );
} }
// copy our SPECCTRA_DB::nets to the pcb->network // copy our SPECCTRA_DB::nets to the pcb->network
@ -1561,11 +1561,11 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
{ {
NET* net = m_nets[n]; NET* net = m_nets[n];
if( net->pins.size() ) if( net->m_pins.size() )
{ {
// give ownership to pcb->network // give ownership to pcb->network
m_pcb->network->nets.push_back( net ); m_pcb->m_network->m_nets.push_back( net );
m_nets[n] = 0; m_nets[n] = nullptr;
} }
} }
} }
@ -1589,8 +1589,8 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
// we AppendVia() this first one, there is no way it can be a duplicate, // we AppendVia() this first one, there is no way it can be a duplicate,
// the pcb->library via container is empty at this point. After this, // the pcb->library via container is empty at this point. After this,
// we'll have to use LookupVia(). // we'll have to use LookupVia().
wxASSERT( m_pcb->library->vias.size() == 0 ); wxASSERT( m_pcb->m_library->m_vias.size() == 0 );
m_pcb->library->AppendVia( via ); m_pcb->m_library->AppendVia( via );
// set the "spare via" index at the start of the // set the "spare via" index at the start of the
// pcb->library->spareViaIndex = pcb->library->vias.size(); // pcb->library->spareViaIndex = pcb->library->vias.size();
@ -1602,7 +1602,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
m_top_via_layer, m_bot_via_layer ); m_top_via_layer, m_bot_via_layer );
// maybe add 'via' to the library, but only if unique. // maybe add 'via' to the library, but only if unique.
PADSTACK* registered = m_pcb->library->LookupVia( via ); PADSTACK* registered = m_pcb->m_library->LookupVia( via );
if( registered != via ) if( registered != via )
delete via; delete via;
@ -1613,8 +1613,8 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
{ {
// export all of them for now, later we'll decide what controls we need on this. // export all of them for now, later we'll decide what controls we need on this.
std::string netname; std::string netname;
WIRING* wiring = m_pcb->wiring; WIRING* wiring = m_pcb->m_wiring;
PATH* path = 0; PATH* path = nullptr;
int old_netcode = -1; int old_netcode = -1;
int old_width = -1; int old_width = -1;
@ -1649,12 +1649,12 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
WIRE* wire = new WIRE( wiring ); WIRE* wire = new WIRE( wiring );
wiring->wires.push_back( wire ); wiring->wires.push_back( wire );
wire->net_id = netname; wire->m_net_id = netname;
if( track->IsLocked() ) if( track->IsLocked() )
wire->wire_type = T_fix; // tracks with fix property are not returned in .ses files wire->m_wire_type = T_fix; // tracks with fix property are not returned in .ses files
else else
wire->wire_type = T_route; // could be T_protect wire->m_wire_type = T_route; // could be T_protect
int kiLayer = track->GetLayer(); int kiLayer = track->GetLayer();
int pcbLayer = m_kicadLayer2pcb[kiLayer]; int pcbLayer = m_kicadLayer2pcb[kiLayer];
@ -1686,29 +1686,29 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
continue; continue;
PADSTACK* padstack = makeVia( via ); PADSTACK* padstack = makeVia( via );
PADSTACK* registered = m_pcb->library->LookupVia( padstack ); PADSTACK* registered = m_pcb->m_library->LookupVia( padstack );
// if the one looked up is not our padstack, then delete our padstack // if the one looked up is not our padstack, then delete our padstack
// since it was a duplicate of one already registered. // since it was a duplicate of one already registered.
if( padstack != registered ) if( padstack != registered )
delete padstack; delete padstack;
WIRE_VIA* dsnVia = new WIRE_VIA( m_pcb->wiring ); WIRE_VIA* dsnVia = new WIRE_VIA( m_pcb->m_wiring );
m_pcb->wiring->wire_vias.push_back( dsnVia ); m_pcb->m_wiring->wire_vias.push_back( dsnVia );
dsnVia->padstack_id = registered->m_padstack_id; dsnVia->m_padstack_id = registered->m_padstack_id;
dsnVia->vertexes.push_back( mapPt( via->GetPosition() ) ); dsnVia->m_vertexes.push_back( mapPt( via->GetPosition() ) );
NETINFO_ITEM* net = aBoard->FindNet( netcode ); NETINFO_ITEM* net = aBoard->FindNet( netcode );
wxASSERT( net ); wxASSERT( net );
dsnVia->net_id = TO_UTF8( net->GetNetname() ); dsnVia->m_net_id = TO_UTF8( net->GetNetname() );
if( via->IsLocked() ) if( via->IsLocked() )
dsnVia->via_type = T_fix; // vias with fix property are not returned in .ses files dsnVia->m_via_type = T_fix; // vias with fix property are not returned in .ses files
else else
dsnVia->via_type = T_route; // could be T_protect dsnVia->m_via_type = T_route; // could be T_protect
} }
} }
@ -1720,10 +1720,10 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard )
// Output the vias in the padstack list here, by name only. This must be done after // Output the vias in the padstack list here, by name only. This must be done after
// exporting existing vias as WIRE_VIAs. // exporting existing vias as WIRE_VIAs.
VIA* vias = m_pcb->structure->via; VIA* vias = m_pcb->m_structure->m_via;
for( unsigned viaNdx = 0; viaNdx < m_pcb->library->vias.size(); ++viaNdx ) for( unsigned viaNdx = 0; viaNdx < m_pcb->m_library->m_vias.size(); ++viaNdx )
vias->AppendVia( m_pcb->library->vias[viaNdx].m_padstack_id.c_str() ); vias->AppendVia( m_pcb->m_library->m_vias[viaNdx].m_padstack_id.c_str() );
} }
//-----<output NETCLASSs>---------------------------------------------------- //-----<output NETCLASSs>----------------------------------------------------
@ -1767,34 +1767,34 @@ void SPECCTRA_DB::exportNETCLASS( const std::shared_ptr<NETCLASS>& aNetClass, BO
char text[256]; char text[256];
CLASS* clazz = new CLASS( m_pcb->network ); CLASS* clazz = new CLASS( m_pcb->m_network );
m_pcb->network->classes.push_back( clazz ); m_pcb->m_network->m_classes.push_back( clazz );
// Freerouter creates a class named 'default' anyway, and if we try to use that we end up // Freerouter creates a class named 'default' anyway, and if we try to use that we end up
// with two 'default' via rules so use something else as the name of our default class. // with two 'default' via rules so use something else as the name of our default class.
clazz->class_id = TO_UTF8( aNetClass->GetName() ); clazz->m_class_id = TO_UTF8( aNetClass->GetName() );
for( NETINFO_ITEM* net : aBoard->GetNetInfo() ) for( NETINFO_ITEM* net : aBoard->GetNetInfo() )
{ {
if( net->GetNetClass()->GetName() == clazz->class_id ) if( net->GetNetClass()->GetName() == clazz->m_class_id )
clazz->net_ids.push_back( TO_UTF8( net->GetNetname() ) ); clazz->m_net_ids.push_back( TO_UTF8( net->GetNetname() ) );
} }
clazz->rules = new RULE( clazz, T_rule ); clazz->m_rules = new RULE( clazz, T_rule );
// output the track width. // output the track width.
int trackWidth = aNetClass->GetTrackWidth(); int trackWidth = aNetClass->GetTrackWidth();
sprintf( text, "(width %.6g)", scale( trackWidth ) ); sprintf( text, "(width %.6g)", scale( trackWidth ) );
clazz->rules->rules.push_back( text ); clazz->m_rules->m_rules.push_back( text );
// output the clearance. // output the clearance.
int clearance = aNetClass->GetClearance(); int clearance = aNetClass->GetClearance();
sprintf( text, "(clearance %.6g)", scale( clearance ) + safetyMargin ); sprintf( text, "(clearance %.6g)", scale( clearance ) + safetyMargin );
clazz->rules->rules.push_back( text ); clazz->m_rules->m_rules.push_back( text );
if( aNetClass->GetName() == NETCLASS::Default ) if( aNetClass->GetName() == NETCLASS::Default )
clazz->class_id = "kicad_default"; clazz->m_class_id = "kicad_default";
// The easiest way to get the via name is to create a temporary via (which generates the // The easiest way to get the via name is to create a temporary via (which generates the
// name internal to the PADSTACK), and then grab the name and delete the via. There are not // name internal to the PADSTACK), and then grab the name and delete the via. There are not
@ -1804,7 +1804,7 @@ void SPECCTRA_DB::exportNETCLASS( const std::shared_ptr<NETCLASS>& aNetClass, BO
m_top_via_layer, m_bot_via_layer ); m_top_via_layer, m_bot_via_layer );
snprintf( text, sizeof(text), "(use_via %s)", via->GetPadstackId().c_str() ); snprintf( text, sizeof(text), "(use_via %s)", via->GetPadstackId().c_str() );
clazz->circuit.push_back( text ); clazz->m_circuit.push_back( text );
delete via; delete via;
} }

View File

@ -173,7 +173,7 @@ PCB_TRACK* SPECCTRA_DB::makeTRACK( WIRE* wire, PATH* aPath, int aPointIndex, int
// wire->wire_type = T_fix, T_route, T_normal or T_protect // wire->wire_type = T_fix, T_route, T_normal or T_protect
// fix and protect could be used as lock option // fix and protect could be used as lock option
// but protect is returned for all tracks having initially the route or protect property // but protect is returned for all tracks having initially the route or protect property
if( wire->wire_type == T_fix ) if( wire->m_wire_type == T_fix )
track->SetLocked( true ); track->SetLocked( true );
return track; return track;
@ -183,7 +183,7 @@ PCB_TRACK* SPECCTRA_DB::makeTRACK( WIRE* wire, PATH* aPath, int aPointIndex, int
PCB_VIA* SPECCTRA_DB::makeVIA( WIRE_VIA*aVia, PADSTACK* aPadstack, const POINT& aPoint, int aNetCode, PCB_VIA* SPECCTRA_DB::makeVIA( WIRE_VIA*aVia, PADSTACK* aPadstack, const POINT& aPoint, int aNetCode,
int aViaDrillDefault ) int aViaDrillDefault )
{ {
PCB_VIA* via = 0; PCB_VIA* via = nullptr;
SHAPE* shape; SHAPE* shape;
int shapeCount = aPadstack->Length(); int shapeCount = aPadstack->Length();
int drill_diam_iu = -1; int drill_diam_iu = -1;
@ -324,7 +324,7 @@ PCB_VIA* SPECCTRA_DB::makeVIA( WIRE_VIA*aVia, PADSTACK* aPadstack, const POINT&
// aVia->via_type = T_fix, T_route, T_normal or T_protect // aVia->via_type = T_fix, T_route, T_normal or T_protect
// fix and protect could be used as lock option // fix and protect could be used as lock option
// but protect is returned for all tracks having initially the route or protect property // but protect is returned for all tracks having initially the route or protect property
if( aVia->via_type == T_fix ) if( aVia->m_via_type == T_fix )
via->SetLocked( true ); via->SetLocked( true );
return via; return via;
@ -375,16 +375,16 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard )
// Walk the PLACEMENT object's COMPONENTs list, and for each PLACE within // Walk the PLACEMENT object's COMPONENTs list, and for each PLACE within
// each COMPONENT, reposition and re-orient each component and put on // each COMPONENT, reposition and re-orient each component and put on
// correct side of the board. // correct side of the board.
COMPONENTS& components = m_session->placement->components; COMPONENTS& components = m_session->placement->m_components;
for( COMPONENTS::iterator comp=components.begin(); comp!=components.end(); ++comp ) for( COMPONENTS::iterator comp=components.begin(); comp!=components.end(); ++comp )
{ {
PLACES& places = comp->places; PLACES& places = comp->m_places;
for( unsigned i=0; i<places.size(); ++i ) for( unsigned i=0; i<places.size(); ++i )
{ {
PLACE* place = &places[i]; // '&' even though places[] holds a pointer! PLACE* place = &places[i]; // '&' even though places[] holds a pointer!
wxString reference = FROM_UTF8( place->component_id.c_str() ); wxString reference = FROM_UTF8( place->m_component_id.c_str() );
FOOTPRINT* footprint = aBoard->FindFootprintByReference( reference ); FOOTPRINT* footprint = aBoard->FindFootprintByReference( reference );
if( !footprint ) if( !footprint )
@ -393,19 +393,19 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard )
reference ) ); reference ) );
} }
if( !place->hasVertex ) if( !place->m_hasVertex )
continue; continue;
UNIT_RES* resolution = place->GetUnits(); UNIT_RES* resolution = place->GetUnits();
wxASSERT( resolution ); wxASSERT( resolution );
VECTOR2I newPos = mapPt( place->vertex, resolution ); VECTOR2I newPos = mapPt( place->m_vertex, resolution );
footprint->SetPosition( newPos ); footprint->SetPosition( newPos );
if( place->side == T_front ) if( place->m_side == T_front )
{ {
// convert from degrees to tenths of degrees used in KiCad. // convert from degrees to tenths of degrees used in KiCad.
EDA_ANGLE orientation( place->rotation, DEGREES_T ); EDA_ANGLE orientation( place->m_rotation, DEGREES_T );
if( footprint->GetLayer() != F_Cu ) if( footprint->GetLayer() != F_Cu )
{ {
@ -415,9 +415,9 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard )
footprint->SetOrientation( orientation ); footprint->SetOrientation( orientation );
} }
else if( place->side == T_back ) else if( place->m_side == T_back )
{ {
EDA_ANGLE orientation( place->rotation + 180.0, DEGREES_T ); EDA_ANGLE orientation( place->m_rotation + 180.0, DEGREES_T );
if( footprint->GetLayer() != B_Cu ) if( footprint->GetLayer() != B_Cu )
{ {
@ -458,7 +458,7 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard )
for( unsigned i = 0; i<wires.size(); ++i ) for( unsigned i = 0; i<wires.size(); ++i )
{ {
WIRE* wire = &wires[i]; WIRE* wire = &wires[i];
DSN_T shape = wire->shape->Type(); DSN_T shape = wire->m_shape->Type();
if( shape != T_path ) if( shape != T_path )
{ {
@ -476,7 +476,7 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard )
} }
else else
{ {
PATH* path = (PATH*) wire->shape; PATH* path = (PATH*) wire->m_shape;
for( unsigned pt=0; pt < path->points.size()-1; ++pt ) for( unsigned pt=0; pt < path->points.size()-1; ++pt )
{ {
@ -526,9 +526,9 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard )
int via_drill_default = netSettings->m_DefaultNetClass->GetViaDrill(); int via_drill_default = netSettings->m_DefaultNetClass->GetViaDrill();
for( unsigned v = 0; v < wire_via->vertexes.size(); ++v ) for( unsigned v = 0; v < wire_via->m_vertexes.size(); ++v )
{ {
PCB_VIA* via = makeVIA( wire_via, padstack, wire_via->vertexes[v], netCode, PCB_VIA* via = makeVIA( wire_via, padstack, wire_via->m_vertexes[v], netCode,
via_drill_default ); via_drill_default );
aBoard->Add( via ); aBoard->Add( via );
} }