Add regression tests for track cleaner.
This commit is contained in:
Jeff Young
parent
95b87ba29a
commit
c00f4ed5d2
|
|
@ -1516,20 +1516,25 @@ bool SHAPE_POLY_SET::Collide( const SHAPE* aShape, int aClearance, int* aActual,
|
|||
{
|
||||
for( const TRIANGULATED_POLYGON::TRI& tri : tpoly->Triangles() )
|
||||
{
|
||||
int triActual;
|
||||
VECTOR2I triLocation;
|
||||
|
||||
if( aShape->Collide( &tri, aClearance, &triActual, &triLocation ) )
|
||||
if( aActual || aLocation )
|
||||
{
|
||||
if( !aActual && !aLocation )
|
||||
return true;
|
||||
int triActual;
|
||||
VECTOR2I triLocation;
|
||||
|
||||
if( triActual < actual )
|
||||
if( aShape->Collide( &tri, aClearance, &triActual, &triLocation ) )
|
||||
{
|
||||
actual = triActual;
|
||||
location = triLocation;
|
||||
if( triActual < actual )
|
||||
{
|
||||
actual = triActual;
|
||||
location = triLocation;
|
||||
}
|
||||
}
|
||||
}
|
||||
else // A much faster version of above
|
||||
{
|
||||
if( aShape->Collide( &tri, aClearance ) )
|
||||
return true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,216 @@
|
|||
(kicad_pcb (version 20200119) (host pcbnew "(5.99.0-1404-g52d891940-dirty)")
|
||||
|
||||
(general
|
||||
(thickness 4.62)
|
||||
(drawings 1)
|
||||
(tracks 5)
|
||||
(modules 1)
|
||||
(nets 1)
|
||||
)
|
||||
|
||||
(page "A4")
|
||||
(layers
|
||||
(0 "F.Cu" signal)
|
||||
(1 "In1.Cu" signal)
|
||||
(2 "In2.Cu" signal)
|
||||
(31 "B.Cu" signal)
|
||||
(32 "B.Adhes" user)
|
||||
(33 "F.Adhes" user)
|
||||
(34 "B.Paste" user)
|
||||
(35 "F.Paste" user)
|
||||
(36 "B.SilkS" user)
|
||||
(37 "F.SilkS" user)
|
||||
(38 "B.Mask" user)
|
||||
(39 "F.Mask" user)
|
||||
(40 "Dwgs.User" user)
|
||||
(41 "Cmts.User" user)
|
||||
(42 "Eco1.User" user)
|
||||
(43 "Eco2.User" user)
|
||||
(44 "Edge.Cuts" user)
|
||||
(45 "Margin" user)
|
||||
(46 "B.CrtYd" user)
|
||||
(47 "F.CrtYd" user)
|
||||
(48 "B.Fab" user)
|
||||
(49 "F.Fab" user)
|
||||
)
|
||||
|
||||
(setup
|
||||
(stackup
|
||||
(layer "F.SilkS" (type "Top Silk Screen"))
|
||||
(layer "F.Paste" (type "Top Solder Paste"))
|
||||
(layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01))
|
||||
(layer "F.Cu" (type "copper") (thickness 0.035))
|
||||
(layer "dielectric 1" (type "core") (thickness 1.44) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
|
||||
(layer "In1.Cu" (type "copper") (thickness 0.035))
|
||||
(layer "dielectric 2" (type "prepreg") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
|
||||
(layer "In2.Cu" (type "copper") (thickness 0.035))
|
||||
(layer "dielectric 3" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
|
||||
(layer "B.Cu" (type "copper") (thickness 0.035))
|
||||
(layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01))
|
||||
(layer "B.Paste" (type "Bottom Solder Paste"))
|
||||
(layer "B.SilkS" (type "Bottom Silk Screen"))
|
||||
(copper_finish "HAL lead-free")
|
||||
(dielectric_constraints no)
|
||||
)
|
||||
(last_trace_width 0.25)
|
||||
(user_trace_width 1)
|
||||
(trace_clearance 0.2)
|
||||
(zone_clearance 0.508)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.2)
|
||||
(via_size 0.8)
|
||||
(via_drill 0.4)
|
||||
(via_min_size 0.4)
|
||||
(via_min_drill 0.3)
|
||||
(uvia_size 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(uvias_allowed no)
|
||||
(uvia_min_size 0.2)
|
||||
(uvia_min_drill 0.1)
|
||||
(max_error 0.005)
|
||||
(defaults
|
||||
(edge_clearance 0.01)
|
||||
(edge_cuts_line_width 0.05)
|
||||
(courtyard_line_width 0.05)
|
||||
(copper_line_width 0.2)
|
||||
(copper_text_dims (size 1.5 1.5) (thickness 0.3))
|
||||
(silk_line_width 0.12)
|
||||
(silk_text_dims (size 1 1) (thickness 0.15))
|
||||
(other_layers_line_width 0.1)
|
||||
(other_layers_text_dims (size 1 1) (thickness 0.15))
|
||||
(dimension_units 0)
|
||||
(dimension_precision 1)
|
||||
)
|
||||
(pad_size 1.5 1.5)
|
||||
(pad_drill 0)
|
||||
(pad_to_mask_clearance 0.2)
|
||||
(aux_axis_origin 0 0)
|
||||
(visible_elements FFFFFF7F)
|
||||
(pcbplotparams
|
||||
(layerselection 0x01000_7ffffff9)
|
||||
(usegerberextensions false)
|
||||
(usegerberattributes false)
|
||||
(usegerberadvancedattributes false)
|
||||
(creategerberjobfile false)
|
||||
(excludeedgelayer true)
|
||||
(linewidth 0.101600)
|
||||
(plotframeref false)
|
||||
(viasonmask false)
|
||||
(mode 1)
|
||||
(useauxorigin false)
|
||||
(hpglpennumber 1)
|
||||
(hpglpenspeed 20)
|
||||
(hpglpendiameter 15.000000)
|
||||
(psnegative false)
|
||||
(psa4output false)
|
||||
(plotreference true)
|
||||
(plotvalue true)
|
||||
(plotinvisibletext false)
|
||||
(padsonsilk false)
|
||||
(subtractmaskfromsilk false)
|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 0)
|
||||
(scaleselection 1)
|
||||
(outputdirectory "${plot}")
|
||||
)
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
|
||||
(net_class "Default" "This is the default net class."
|
||||
(clearance 0.2)
|
||||
(trace_width 0.25)
|
||||
(via_dia 0.8)
|
||||
(via_drill 0.4)
|
||||
(uvia_dia 0.3)
|
||||
(uvia_drill 0.1)
|
||||
)
|
||||
|
||||
(module "Housings_DIP:DIP-40_W15.24mm" (layer "F.Cu") (tedit 54130A77) (tstamp 00000000-0000-0000-0000-00005e384273)
|
||||
(at 164.719 77.597)
|
||||
(descr "40-lead dip package, row spacing 15.24 mm (600 mils)")
|
||||
(tags "dil dip 2.54 600")
|
||||
(fp_text reference "U1" (at 0 -5.22) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "DIP-40_W15.24mm${stuff}" (at 0 -3.72) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "field on copper" (at 7.85622 26.98242 unlocked) (layer "F.Cu")
|
||||
(effects (font (size 1 1) (thickness 0.2)))
|
||||
)
|
||||
(fp_line (start 0.135 -1.025) (end -0.8 -1.025) (layer "F.SilkS") (width 0.15))
|
||||
(fp_line (start 0.135 50.555) (end 15.105 50.555) (layer "F.SilkS") (width 0.15))
|
||||
(fp_line (start 0.135 -2.295) (end 15.105 -2.295) (layer "F.SilkS") (width 0.15))
|
||||
(fp_line (start 0.135 50.555) (end 0.135 49.285) (layer "F.SilkS") (width 0.15))
|
||||
(fp_line (start 15.105 50.555) (end 15.105 49.285) (layer "F.SilkS") (width 0.15))
|
||||
(fp_line (start 15.105 -2.295) (end 15.105 -1.025) (layer "F.SilkS") (width 0.15))
|
||||
(fp_line (start 0.135 -2.295) (end 0.135 -1.025) (layer "F.SilkS") (width 0.15))
|
||||
(fp_line (start -1.05 50.75) (end 16.3 50.75) (layer "F.CrtYd") (width 0.05))
|
||||
(fp_line (start -1.05 -2.45) (end 16.3 -2.45) (layer "F.CrtYd") (width 0.05))
|
||||
(fp_line (start 16.3 -2.45) (end 16.3 50.75) (layer "F.CrtYd") (width 0.05))
|
||||
(fp_line (start -1.05 -2.45) (end -1.05 50.75) (layer "F.CrtYd") (width 0.05))
|
||||
(pad "40" thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 3c03b006-992b-4656-8d8b-1a40717bad9b))
|
||||
(pad "39" thru_hole oval (at 15.24 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 17e4ee73-c0b6-4f16-a52f-3352b4c4a589))
|
||||
(pad "38" thru_hole oval (at 15.24 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 078e3443-d124-424c-8675-549896b6e109))
|
||||
(pad "37" thru_hole oval (at 15.24 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp c80e473b-e8f3-40b2-a34a-cb8ba2396f2c))
|
||||
(pad "36" thru_hole oval (at 15.24 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp e272137d-dd3b-4558-883f-a111afa3585b))
|
||||
(pad "35" thru_hole oval (at 15.24 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 05ee1c41-eca6-4139-9ea4-47a6d84294ba))
|
||||
(pad "34" thru_hole oval (at 15.24 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp e4636fae-e5c5-4bba-a464-4ac9b773ed47))
|
||||
(pad "33" thru_hole oval (at 15.24 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 6ed828ab-d8d8-4fe9-b16b-ebfc33e038e4))
|
||||
(pad "32" thru_hole oval (at 15.24 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 19d71dad-df19-4f33-b0e6-6c030568956a))
|
||||
(pad "31" thru_hole oval (at 15.24 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 3b8bd1af-63d2-4e0c-9197-0ad6380b78d7))
|
||||
(pad "30" thru_hole oval (at 15.24 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 3336d357-9487-4cef-80b0-4d77065fab3e))
|
||||
(pad "29" thru_hole oval (at 15.24 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 05ebfe05-f6e7-4ad1-b07f-9b049cf5b14b))
|
||||
(pad "28" thru_hole oval (at 15.24 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 24d921f2-823b-411d-a601-08992f32e566))
|
||||
(pad "27" thru_hole oval (at 15.24 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 456fa4e1-431b-49d2-a1db-9738e920f534))
|
||||
(pad "26" thru_hole oval (at 15.24 35.56) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 991a8590-8312-43da-b38f-102ea1fac869))
|
||||
(pad "25" thru_hole oval (at 15.24 38.1) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 63a7153a-fee4-461e-a81d-346402828e19))
|
||||
(pad "24" thru_hole oval (at 15.24 40.64) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp df527ce2-b732-425c-950a-a2246d2e2816))
|
||||
(pad "23" thru_hole oval (at 15.24 43.18) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 2652c9ab-ff66-4247-bb34-3a859d22dd65))
|
||||
(pad "22" thru_hole oval (at 15.24 45.72) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 1f4cc26e-f3c7-4fb3-b473-460f7b146bc1))
|
||||
(pad "21" thru_hole oval (at 15.24 48.26) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 32fe534f-83ab-48c1-bece-80fc1226c6d7))
|
||||
(pad "20" thru_hole oval (at 0 48.26) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp e876604e-ed53-40dd-9e3d-8ae62c69ec6f))
|
||||
(pad "19" thru_hole oval (at 0 45.72) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp d17f5e4d-a323-40ff-996e-9d1748ea4193))
|
||||
(pad "18" thru_hole oval (at 0 43.18) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp e0797ab1-555e-4086-945b-6adb8e80549c))
|
||||
(pad "17" thru_hole oval (at 0 40.64) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 898c11b5-3a02-432c-a417-e902595c7baa))
|
||||
(pad "16" thru_hole oval (at 0 38.1) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp ea9d9849-4c1c-4767-bc66-4a07ba4f6072))
|
||||
(pad "15" thru_hole oval (at 0 35.56) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 288bbbf0-75a5-4670-91ca-5f36d3c210d6))
|
||||
(pad "14" thru_hole oval (at 0 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 9d83fd3c-30f0-410d-b81f-c06388279e95))
|
||||
(pad "13" thru_hole oval (at 0 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 8d278dd7-c747-4010-9785-831b0766e30a))
|
||||
(pad "12" thru_hole oval (at 0 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp f0bbe286-d2de-445f-ac17-8293f5dc5a01))
|
||||
(pad "11" thru_hole oval (at 0 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp ef8288b1-8803-486f-884f-7b7ad74f6c41))
|
||||
(pad "10" thru_hole oval (at 0 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 9434a295-ac46-41d0-9f94-9671cf7b99b0))
|
||||
(pad "9" thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 6ba3a876-a0b2-4c5a-b07a-0387a0d52657))
|
||||
(pad "8" thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 1382b21a-9297-41c7-95bb-c4c8a5cf04dc))
|
||||
(pad "7" thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 87e8c4e5-6cef-426d-90b6-0abce8bcec3f))
|
||||
(pad "6" thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp bc4f65fe-8685-4fe9-b6e0-f903c1e2bae5))
|
||||
(pad "5" thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 687510dd-b060-4c32-8ca8-3f1db85c0207))
|
||||
(pad "4" thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp ef6bbd64-4a61-433f-90b6-1c71e2b5ea83))
|
||||
(pad "3" thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 72b089cd-8b4d-41b2-8e3f-4222bed7df10))
|
||||
(pad "2" thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 54f38516-e465-4f36-9335-8003d6c4f47c))
|
||||
(pad "1" thru_hole oval (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 02483e4d-3ab1-489c-951b-83a16cc9b30a))
|
||||
(model "/Users/jeff/kicad/Package_QFP.3dshapes/HTQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm.wrl"
|
||||
(opacity 0.6500) (offset (xyz 0 -13 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
(model "/Users/jeff/kicad/Package_QFP.3dshapes/TQFP-48_7x7mm_P0.5mm.wrl"
|
||||
(opacity 0.2100) (at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(gr_text "Text: ${LAYER} ${00000000-0000-0000-0000-00005e384273:REFERENCE}" (at 151.0919 104.5464) (layer "F.Cu") (tstamp 4a940769-dbd0-4522-898c-8e905a074b1e)
|
||||
(effects (font (size 1.5 1.5) (thickness 0.375)))
|
||||
)
|
||||
|
||||
(segment (start 156.93898 86.995) (end 148.04898 86.995) (width 1) (layer "F.Cu") (net 0) (tstamp cae62b0c-d3ee-4246-bdc8-283dac6f3145))
|
||||
(via (at 156.84754 86.995) (size 4) (drill 2) (layers "F.Cu" "B.Cu") (net 0) (tstamp 19ccc761-ed00-4cfc-bfdb-96decfd7b640))
|
||||
(segment (start 156.845 86.995) (end 147.955 86.995) (width 1) (layer "F.Cu") (net 0) (tstamp 5b13b4cc-9d32-4a9c-92f5-295a3af198b7))
|
||||
(via (at 156.845 86.995) (size 4) (drill 2) (layers "F.Cu" "B.Cu") (net 0) (tstamp 9f3db980-ce93-4ae6-813a-9832a6affc36))
|
||||
(via blind (at 147.955 86.995) (size 4) (drill 2) (layers "F.Cu" "In1.Cu") (net 0) (tstamp 645cc3b2-3724-4b57-962a-a7d28e4f84a5))
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,288 @@
|
|||
update=Friday 24 April 2020 at 14:38:42
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[P22LIB_TREE_MODEL_ADAPTER]
|
||||
version=1
|
||||
PinnedItems1=device:
|
||||
[PcbFrame]
|
||||
version=1
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=${plot}
|
||||
NetFmtName=Pcbnew
|
||||
SpiceAjustPassiveValues=0
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
LabSize=50
|
||||
TextOffsetRatio=0.2
|
||||
LineThickness=6
|
||||
BusThickness=12
|
||||
WireThickness=6
|
||||
JunctionSize=30
|
||||
FieldNameTemplates=(templatefields (field (name "test") visible))
|
||||
ERC_TestSimilarLabels=1
|
||||
ERC_CheckUniqueGlobalLabels=1
|
||||
ERC_CheckBusDriverConflicts=1
|
||||
ERC_CheckBusEntryConflicts=1
|
||||
ERC_CheckBusToBusConflicts=1
|
||||
ERC_CheckBusToNetConflicts=1
|
||||
[LibeditFrame]
|
||||
version=1
|
||||
PinnedItems1=device
|
||||
[ModEditFrame]
|
||||
version=1
|
||||
[SchematicFrame]
|
||||
version=1
|
||||
[sheetnames]
|
||||
1=00000000-0000-0000-0000-00005ea2d266:
|
||||
2=00000000-0000-0000-0000-00005e63adad:Untitled Sheet
|
||||
3=00000000-0000-0000-0000-000001234567:right
|
||||
4=00000000-0000-0000-0000-000034567890:left
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=../kicad/bin/
|
||||
LastSTEPExportPath=
|
||||
LastIDFExportPath=
|
||||
LastVRMLExportPath=
|
||||
LastSpecctraDSNExportPath=
|
||||
LastGenCADExportPath=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=4.62
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
CopperEdgeClearance=0.01
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=1
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=0
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=0
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.09999999999999999
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=0
|
||||
DimensionUnits=0
|
||||
DimensionPrecision=1
|
||||
SolderMaskClearance=0.2
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
[text_variables]
|
||||
1=plot:plot_files/
|
||||
2=stuff:whatever you want
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,172 @@
|
|||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.01,
|
||||
"min_hole_clearance": 0.0,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [],
|
||||
"via_dimensions": [],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "issue6945.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": []
|
||||
},
|
||||
"sheets": [],
|
||||
"text_variables": {}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,172 @@
|
|||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.01,
|
||||
"min_hole_clearance": 0.0,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [],
|
||||
"via_dimensions": [],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "issue8003.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": []
|
||||
},
|
||||
"sheets": [],
|
||||
"text_variables": {}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,616 @@
|
|||
(kicad_pcb (version 20210623) (generator pcbnew)
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
)
|
||||
|
||||
(paper "A3")
|
||||
(layers
|
||||
(0 "F.Cu" signal)
|
||||
(31 "B.Cu" signal)
|
||||
(34 "B.Paste" user)
|
||||
(35 "F.Paste" user)
|
||||
(36 "B.SilkS" user "B.Silkscreen")
|
||||
(37 "F.SilkS" user "F.Silkscreen")
|
||||
(38 "B.Mask" user)
|
||||
(39 "F.Mask" user)
|
||||
(40 "Dwgs.User" user "User.Drawings")
|
||||
(41 "Cmts.User" user "User.Comments")
|
||||
(42 "Eco1.User" user "User.Eco1")
|
||||
(44 "Edge.Cuts" user)
|
||||
(45 "Margin" user)
|
||||
(46 "B.CrtYd" user "B.Courtyard")
|
||||
(47 "F.CrtYd" user "F.Courtyard")
|
||||
(48 "B.Fab" user)
|
||||
(49 "F.Fab" user)
|
||||
)
|
||||
|
||||
(setup
|
||||
(stackup
|
||||
(layer "F.SilkS" (type "Top Silk Screen"))
|
||||
(layer "F.Paste" (type "Top Solder Paste"))
|
||||
(layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01))
|
||||
(layer "F.Cu" (type "copper") (thickness 0.035))
|
||||
(layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
|
||||
(layer "B.Cu" (type "copper") (thickness 0.035))
|
||||
(layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01))
|
||||
(layer "B.Paste" (type "Bottom Solder Paste"))
|
||||
(layer "B.SilkS" (type "Bottom Silk Screen"))
|
||||
(copper_finish "None")
|
||||
(dielectric_constraints no)
|
||||
)
|
||||
(pad_to_mask_clearance 0)
|
||||
(pcbplotparams
|
||||
(layerselection 0x00010fc_ffffffff)
|
||||
(disableapertmacros false)
|
||||
(usegerberextensions false)
|
||||
(usegerberattributes true)
|
||||
(usegerberadvancedattributes true)
|
||||
(creategerberjobfile true)
|
||||
(svguseinch false)
|
||||
(svgprecision 6)
|
||||
(excludeedgelayer true)
|
||||
(plotframeref false)
|
||||
(viasonmask false)
|
||||
(mode 1)
|
||||
(useauxorigin false)
|
||||
(hpglpennumber 1)
|
||||
(hpglpenspeed 20)
|
||||
(hpglpendiameter 15.000000)
|
||||
(dxfpolygonmode true)
|
||||
(dxfimperialunits true)
|
||||
(dxfusepcbnewfont true)
|
||||
(psnegative false)
|
||||
(psa4output false)
|
||||
(plotreference true)
|
||||
(plotvalue true)
|
||||
(plotinvisibletext false)
|
||||
(sketchpadsonfab false)
|
||||
(subtractmaskfromsilk false)
|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 1)
|
||||
(scaleselection 1)
|
||||
(outputdirectory "")
|
||||
)
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
(net 1 "GND")
|
||||
(net 2 "ADC12_IN14")
|
||||
(net 3 "+3V3")
|
||||
(net 4 "ADC2_IN15")
|
||||
(net 5 "ADC3_IN5")
|
||||
(net 6 "unconnected-(IC2-Pad19)")
|
||||
(net 7 "unconnected-(IC2-Pad18)")
|
||||
(net 8 "~{RESET}")
|
||||
(net 9 "Net-(C27-Pad1)")
|
||||
(net 10 "Net-(C28-Pad1)")
|
||||
(net 11 "unconnected-(IC2-Pad22)")
|
||||
(net 12 "PA15_IN_DFM")
|
||||
(net 13 "PC15_IN_PICKUP")
|
||||
(net 14 "PC13_OUT_BTS723_MV")
|
||||
(net 15 "PC14_OUT_BTS723_ALARM")
|
||||
(net 16 "ADC12_IN1")
|
||||
(net 17 "unconnected-(IC2-Pad40)")
|
||||
(net 18 "ADC12_IN2")
|
||||
(net 19 "USART2_TX")
|
||||
(net 20 "USART2_RX")
|
||||
(net 21 "SPI1_~{SS}")
|
||||
(net 22 "SPI1_SCK")
|
||||
(net 23 "SPI1_MISO")
|
||||
(net 24 "TIM1_CH1N")
|
||||
(net 25 "PB0_OUT_SM_STEP")
|
||||
(net 26 "TIM8_CH3N")
|
||||
(net 27 "ADC1_IN11")
|
||||
(net 28 "ADC1_IN5")
|
||||
(net 29 "TIM1_CH1")
|
||||
(net 30 "USART1_TX")
|
||||
(net 31 "USART1_RX")
|
||||
(net 32 "CAN1_RX")
|
||||
(net 33 "CAN1_TX")
|
||||
(net 34 "SWDIO")
|
||||
(net 35 "SWDCLK")
|
||||
(net 36 "SPI1_MOSI")
|
||||
(net 37 "CAN2_RX")
|
||||
(net 38 "CAN2_TX")
|
||||
(net 39 "PB7_OUT_SM_~{ENABLE}")
|
||||
(net 40 "PB8_OUT__LED")
|
||||
(net 41 "TIM8_CH3")
|
||||
(net 42 "Net-(IC2-Pad20)")
|
||||
|
||||
(footprint "0IBF_Crystal:Crystal_SMD_5032-2Pin_5.0x3.2mm_IBF" (layer "F.Cu")
|
||||
(tedit 60FD5043) (tstamp 0de9af20-f2c1-4152-8c27-34e4ce4bec78)
|
||||
(at 106.07 -86.88 90)
|
||||
(descr "SMD Crystal 5x3,2mm Quantek QC5CB / Interquip SMAC-5032 angepaßte Pads IBFEEW")
|
||||
(tags "SMD crystal")
|
||||
(property "Alternative" "Abracom ABM3-10.000MHZ-D2Y-T")
|
||||
(property "Bemerkung" "")
|
||||
(property "Farnell" "2508597")
|
||||
(property "MF" "Quantek")
|
||||
(property "MPN" "QC5CB10.0000F18B23M / QC5CB10.0000F18B23R")
|
||||
(property "RS" "813-6097")
|
||||
(property "Sheetfile" "controller.kicad_sch")
|
||||
(property "Sheetname" "Controller")
|
||||
(property "digikey" "")
|
||||
(property "mouser" "")
|
||||
(path "/21ecf582-2fe5-40fc-9946-89f54de57e7c/656de130-e9e8-49cd-b55f-f52948b09214")
|
||||
(attr smd)
|
||||
(fp_text reference "Q1" (at 0 -2.8 90) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 59ee8af3-c8d3-4c23-8657-70d98fa756b6)
|
||||
)
|
||||
(fp_text value "QC5CB10.000" (at 0 2.8 90) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 74fa71de-1c22-4758-b2dd-2c303737d498)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 3.82 0 90) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 67ae7ca2-ebc7-49a5-baf1-24115daa3026)
|
||||
)
|
||||
(fp_line (start -0.2 0) (end -0.5 0) (layer "F.SilkS") (width 0.07) (tstamp 02db9d19-a3cb-4be0-828b-49297dcf0845))
|
||||
(fp_line (start -2.8 1.7) (end 2.8 1.7) (layer "F.SilkS") (width 0.07) (tstamp 1492f2eb-82fb-460c-a712-3ecc1389d05d))
|
||||
(fp_line (start 2.8 -1.7) (end 2.8 -1.6) (layer "F.SilkS") (width 0.07) (tstamp 15c03324-3b1a-4c11-9142-f9c2b8a369aa))
|
||||
(fp_line (start -0.2 -0.7) (end -0.2 0.7) (layer "F.SilkS") (width 0.07) (tstamp 2ca4cd67-11e7-4bc4-b349-bec6803e66ed))
|
||||
(fp_line (start -2.8 1.6) (end -2.8 1.7) (layer "F.SilkS") (width 0.07) (tstamp 2dcf3f66-5257-4408-8283-570eeab368a6))
|
||||
(fp_line (start -2.8 -1.7) (end -2.8 -1.6) (layer "F.SilkS") (width 0.07) (tstamp 38b9d64d-8d84-4044-8396-27fb999961a9))
|
||||
(fp_line (start 0.1 -0.6) (end 0.1 0.6) (layer "F.SilkS") (width 0.07) (tstamp 48a896ae-a0f3-49b6-bdc7-a62b294294d4))
|
||||
(fp_line (start 0.1 0.6) (end -0.1 0.6) (layer "F.SilkS") (width 0.07) (tstamp 4d49a789-b0f1-4705-b19c-3809bec4414b))
|
||||
(fp_line (start -0.1 -0.6) (end 0.1 -0.6) (layer "F.SilkS") (width 0.07) (tstamp 7b374b50-4b0d-4c84-8586-a22780c1d664))
|
||||
(fp_line (start 2.8 -1.7) (end -2.8 -1.7) (layer "F.SilkS") (width 0.07) (tstamp a43f91a1-116a-4d40-a54b-8d5db52826c0))
|
||||
(fp_line (start 0.2 0) (end 0.6 0) (layer "F.SilkS") (width 0.07) (tstamp a4c12ca8-54d1-4a5a-b361-295a2d47471d))
|
||||
(fp_line (start 0.2 -0.7) (end 0.2 0.7) (layer "F.SilkS") (width 0.07) (tstamp a5118d1b-d818-4c65-8549-73ad4ccf7443))
|
||||
(fp_line (start 2.8 1.6) (end 2.8 1.7) (layer "F.SilkS") (width 0.07) (tstamp b65f86ac-bb27-4ddd-8769-0a03778d1811))
|
||||
(fp_line (start -0.1 0.6) (end -0.1 -0.6) (layer "F.SilkS") (width 0.07) (tstamp ef9e4629-ffd8-459b-9c3a-c80fc1d215ac))
|
||||
(fp_line (start 3.2 -1.9) (end -3.2 -1.9) (layer "F.CrtYd") (width 0.05) (tstamp 2ceab9df-6986-47e7-9061-5955ccf38699))
|
||||
(fp_line (start -3.2 1.9) (end 3.2 1.9) (layer "F.CrtYd") (width 0.05) (tstamp 80afb5ab-4177-4551-8787-1c944430afa5))
|
||||
(fp_line (start -3.2 -1.9) (end -3.2 1.9) (layer "F.CrtYd") (width 0.05) (tstamp a13bea0c-8bdc-41f7-abc8-c973b0f0538f))
|
||||
(fp_line (start 3.2 1.9) (end 3.2 -1.9) (layer "F.CrtYd") (width 0.05) (tstamp fcb074a8-a44c-486a-994f-f5865e99191d))
|
||||
(fp_line (start -2.3 -1.6) (end 2.3 -1.6) (layer "F.Fab") (width 0.1) (tstamp 02e3b2da-ecd6-4ec8-b312-3f9af36cb135))
|
||||
(fp_line (start 0.2 0) (end 0.6 0) (layer "F.Fab") (width 0.07) (tstamp 0c45a563-5e27-4fce-8af5-06ee0a6f1a1c))
|
||||
(fp_line (start 0.2 -0.7) (end 0.2 0.7) (layer "F.Fab") (width 0.07) (tstamp 1d7c950b-4361-4599-b3de-d1aee7824db3))
|
||||
(fp_line (start -2.3 1.6) (end -2.5 1.4) (layer "F.Fab") (width 0.1) (tstamp 1de822db-a0f9-41b7-a613-3545751f2426))
|
||||
(fp_line (start -0.2 -0.7) (end -0.2 0.7) (layer "F.Fab") (width 0.07) (tstamp 2bc58434-cbc6-4696-8426-3f8878fbf4ab))
|
||||
(fp_line (start 2.5 -1.4) (end 2.5 1.4) (layer "F.Fab") (width 0.1) (tstamp 3e247a21-39b4-4045-88d0-cacdceeafc93))
|
||||
(fp_line (start 2.5 1.4) (end 2.3 1.6) (layer "F.Fab") (width 0.1) (tstamp 46e283c6-ce96-417e-9b2b-58b60b2baab7))
|
||||
(fp_line (start -0.1 0.6) (end -0.1 -0.6) (layer "F.Fab") (width 0.07) (tstamp 63b19816-716c-41bf-9351-2df40ea7b6bf))
|
||||
(fp_line (start 0.1 0.6) (end -0.1 0.6) (layer "F.Fab") (width 0.07) (tstamp 704fbe02-9a47-437d-a3c1-99ca8ad88c2a))
|
||||
(fp_line (start -2.5 -1.4) (end -2.3 -1.6) (layer "F.Fab") (width 0.1) (tstamp 86c41ca5-1020-4e15-885c-0f8595be64ec))
|
||||
(fp_line (start 2.3 -1.6) (end 2.5 -1.4) (layer "F.Fab") (width 0.1) (tstamp a5b78643-ac93-4ff0-be94-2f958608b528))
|
||||
(fp_line (start -0.1 -0.6) (end 0.1 -0.6) (layer "F.Fab") (width 0.07) (tstamp adb710b1-4972-41b1-b8a9-755c11c76257))
|
||||
(fp_line (start -0.2 0) (end -0.5 0) (layer "F.Fab") (width 0.07) (tstamp b3510168-8969-45c5-a9fa-60ad00689094))
|
||||
(fp_line (start -2.5 0.6) (end -1.5 1.6) (layer "F.Fab") (width 0.1) (tstamp b9e98e16-fd1f-41e0-9cc1-f6952e941337))
|
||||
(fp_line (start -2.5 1.4) (end -2.5 -1.4) (layer "F.Fab") (width 0.1) (tstamp c472a57f-95fe-4470-9816-70cb04bae7b8))
|
||||
(fp_line (start 2.3 1.6) (end -2.3 1.6) (layer "F.Fab") (width 0.1) (tstamp d8d793c6-7000-4cb5-9808-f318ebb543da))
|
||||
(fp_line (start 0.1 -0.6) (end 0.1 0.6) (layer "F.Fab") (width 0.07) (tstamp e2fa0db0-ddb8-41a9-93e0-8aa90030f56f))
|
||||
(pad "1" smd rect locked (at -2 0 90) (size 2.2 2.8) (layers "F.Cu" "F.Paste" "F.Mask")
|
||||
(net 10 "Net-(C28-Pad1)") (pintype "passive") (tstamp da710f9d-5646-4d10-b982-08ce7f8a5a98))
|
||||
(pad "2" smd rect locked (at 2 0 90) (size 2.2 2.8) (layers "F.Cu" "F.Paste" "F.Mask")
|
||||
(net 9 "Net-(C27-Pad1)") (pintype "passive") (tstamp 4fca3028-c5d0-4de0-b6fe-98edbb026a3d))
|
||||
(model "${KICAD6_USER_LIBRARY_3D}/discrete/Crystal_SMD_5032_2pin_5x3mm.stp"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz -90 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(footprint "0IBF_RCL:C_1206_3216Metric" (layer "F.Cu")
|
||||
(tedit 60FD2F22) (tstamp 5bf3f5fe-f86e-498f-acd9-70912b60481f)
|
||||
(at 104.47 -82.38 180)
|
||||
(descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
|
||||
(tags "capacitor")
|
||||
(property "Alternative" "")
|
||||
(property "Bemerkung" "")
|
||||
(property "Farnell" "")
|
||||
(property "MF" "")
|
||||
(property "MPN" "")
|
||||
(property "RS" "")
|
||||
(property "Sheetfile" "controller.kicad_sch")
|
||||
(property "Sheetname" "Controller")
|
||||
(property "digikey" "")
|
||||
(property "mouser" "")
|
||||
(path "/21ecf582-2fe5-40fc-9946-89f54de57e7c/8bab4fd9-c19a-40d4-a8f5-10dd898a0374")
|
||||
(attr smd)
|
||||
(fp_text reference "C24" (at 0 -1.85) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 8bee4d0e-2e50-4bfe-9074-b019f09f38a0)
|
||||
)
|
||||
(fp_text value "100nF" (at 0 1.85) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 3acc2d27-25b6-49e0-b17a-d4a93a83d63d)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.12)))
|
||||
(tstamp ca47df6a-677e-436e-883b-b1f2a15e1a9f)
|
||||
)
|
||||
(fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer "F.SilkS") (width 0.12) (tstamp 191bbb0c-ad8b-443a-9878-1deada5e1242))
|
||||
(fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer "F.SilkS") (width 0.12) (tstamp ad1d4a96-4ed0-437a-b49c-87fe2fca1ea1))
|
||||
(fp_rect (start -2.3 -1) (end 2.3 1) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 4dfcc27e-1317-4b75-aadc-d616bae9ca01))
|
||||
(fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 8c836167-9e65-475d-9a08-899d99608fc1))
|
||||
(fp_line (start 1.6 0.8) (end -1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp 95812da0-380e-4d9d-852b-7abc215baeb2))
|
||||
(fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 9f1bf3b9-1b9b-4e15-b572-94629150a7da))
|
||||
(fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp ef8f0823-2ec6-4501-b18f-17fe59cdafb7))
|
||||
(fp_rect (start -1.95 -0.7) (end -1.65 0.7) (layer "F.Fab") (width 0.01) (fill solid) (tstamp 26befa1e-139e-4fa8-bb61-48b2cd2f4e3a))
|
||||
(fp_rect (start 1.6 -0.7) (end 1.9 0.7) (layer "F.Fab") (width 0.01) (fill solid) (tstamp 56197b27-39c0-46ff-97f6-e5a8266c8d56))
|
||||
(pad "1" smd roundrect locked (at -1.475 0 180) (size 1.15 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.217391)
|
||||
(net 8 "~{RESET}") (pintype "passive") (tstamp 79f161af-b2ee-444e-b6ea-90702bbd06a6))
|
||||
(pad "2" smd roundrect locked (at 1.475 0 180) (size 1.15 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.217391)
|
||||
(net 1 "GND") (pintype "passive") (tstamp 297c662b-9710-4f76-b1a4-745eb9b402bc))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(footprint "Package_QFP:LQFP-48_7x7mm_P0.5mm" (layer "F.Cu")
|
||||
(tedit 5D9F72AF) (tstamp 833c05b7-f4dc-44b2-abd8-71e8d4f553c0)
|
||||
(at 115.6 -85.1)
|
||||
(descr "LQFP, 48 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2358-16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
|
||||
(tags "LQFP QFP")
|
||||
(property "Alternative" "")
|
||||
(property "Bemerkung" "")
|
||||
(property "Farnell" "3648858")
|
||||
(property "MF" "ST")
|
||||
(property "MPN" "STM32G491CET6")
|
||||
(property "RS" "215-0839 / 215-0838")
|
||||
(property "Sheetfile" "controller.kicad_sch")
|
||||
(property "Sheetname" "Controller")
|
||||
(property "digikey" "497-STM32G491CET6-ND")
|
||||
(property "mouser" "511-STM32G491CET6")
|
||||
(path "/21ecf582-2fe5-40fc-9946-89f54de57e7c/e0722ab8-d89c-469b-9058-cb19d719e3c3")
|
||||
(attr smd)
|
||||
(fp_text reference "IC2" (at 0 -5.85) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp d5dd8c55-2f3d-45cd-975b-f4d1c199d065)
|
||||
)
|
||||
(fp_text value "STM32G491CET6" (at 0 5.85) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp d5b2bab8-9af0-427a-aa9b-86c5cb322947)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp ff37f4f6-3abf-4d5f-a83b-18dc759240a4)
|
||||
)
|
||||
(fp_line (start -3.61 -3.16) (end -4.9 -3.16) (layer "F.SilkS") (width 0.12) (tstamp 0db906d9-03bb-49e5-9d80-729b6ee9fedd))
|
||||
(fp_line (start 3.61 3.61) (end 3.61 3.16) (layer "F.SilkS") (width 0.12) (tstamp 1f5ce3e5-adf2-492d-ad2f-41ec787e1622))
|
||||
(fp_line (start 3.16 3.61) (end 3.61 3.61) (layer "F.SilkS") (width 0.12) (tstamp 220ef310-c9b6-423c-b7fe-825f1931baf1))
|
||||
(fp_line (start -3.61 3.61) (end -3.61 3.16) (layer "F.SilkS") (width 0.12) (tstamp 3ba9cd1a-65bb-4614-b341-667ac08356a8))
|
||||
(fp_line (start -3.61 -3.61) (end -3.61 -3.16) (layer "F.SilkS") (width 0.12) (tstamp 7089790e-7314-4851-9938-f9f9e4f7fce7))
|
||||
(fp_line (start 3.16 -3.61) (end 3.61 -3.61) (layer "F.SilkS") (width 0.12) (tstamp 9fda3c38-0565-4c93-9e16-71411c9c0af0))
|
||||
(fp_line (start -3.16 3.61) (end -3.61 3.61) (layer "F.SilkS") (width 0.12) (tstamp a09f1f34-3261-4016-bea2-d5bf8fbe5f15))
|
||||
(fp_line (start 3.61 -3.61) (end 3.61 -3.16) (layer "F.SilkS") (width 0.12) (tstamp c38dcaa0-dbc6-490b-9051-ab47f12dcef6))
|
||||
(fp_line (start -3.16 -3.61) (end -3.61 -3.61) (layer "F.SilkS") (width 0.12) (tstamp c59256f0-600d-4199-8b6e-ed4994afb9a0))
|
||||
(fp_line (start 3.15 -5.15) (end 3.15 -3.75) (layer "F.CrtYd") (width 0.05) (tstamp 012fa6ca-4897-4c7e-9e7c-f6a4fdf5837a))
|
||||
(fp_line (start -3.75 3.75) (end -3.75 3.15) (layer "F.CrtYd") (width 0.05) (tstamp 1149d8b1-dad0-4749-9e3c-53f3718f8384))
|
||||
(fp_line (start 5.15 -3.15) (end 5.15 0) (layer "F.CrtYd") (width 0.05) (tstamp 1317bb3d-69e7-484a-8293-cb5063f0e326))
|
||||
(fp_line (start 0 -5.15) (end -3.15 -5.15) (layer "F.CrtYd") (width 0.05) (tstamp 1ac8a3b1-aecf-4e57-a09f-aba989a27bad))
|
||||
(fp_line (start -3.75 3.15) (end -5.15 3.15) (layer "F.CrtYd") (width 0.05) (tstamp 299fe656-54f5-490c-95e5-039d00b48dfb))
|
||||
(fp_line (start 3.15 3.75) (end 3.75 3.75) (layer "F.CrtYd") (width 0.05) (tstamp 30f98e32-c13b-428f-a0c2-fae2cf663a2d))
|
||||
(fp_line (start 5.15 3.15) (end 5.15 0) (layer "F.CrtYd") (width 0.05) (tstamp 36a2caac-f810-4f89-80a3-aab70388c16d))
|
||||
(fp_line (start 0 -5.15) (end 3.15 -5.15) (layer "F.CrtYd") (width 0.05) (tstamp 46deab9f-236a-40ed-9543-5272a528f1b3))
|
||||
(fp_line (start 3.15 5.15) (end 3.15 3.75) (layer "F.CrtYd") (width 0.05) (tstamp 4acdd1bb-344f-4aea-be28-2a7a396c4b27))
|
||||
(fp_line (start 3.75 -3.75) (end 3.75 -3.15) (layer "F.CrtYd") (width 0.05) (tstamp 6c220254-8b7d-443c-9ddc-fa4ce7b751da))
|
||||
(fp_line (start -3.75 -3.15) (end -5.15 -3.15) (layer "F.CrtYd") (width 0.05) (tstamp 7d43b51b-418a-47e8-8fb0-8ea76c8c6556))
|
||||
(fp_line (start 3.75 3.75) (end 3.75 3.15) (layer "F.CrtYd") (width 0.05) (tstamp 7e4c8177-d37e-4b5e-9ef6-2b8ca64f35e1))
|
||||
(fp_line (start 3.75 3.15) (end 5.15 3.15) (layer "F.CrtYd") (width 0.05) (tstamp 7ebdebad-08ae-4ef7-8399-7482fee68f45))
|
||||
(fp_line (start -3.15 -5.15) (end -3.15 -3.75) (layer "F.CrtYd") (width 0.05) (tstamp 87896831-5d8c-4521-8724-bd7e758bc5f0))
|
||||
(fp_line (start 0 5.15) (end -3.15 5.15) (layer "F.CrtYd") (width 0.05) (tstamp 9490bef3-623e-4df3-98e4-1ba4877a9f5f))
|
||||
(fp_line (start 3.15 -3.75) (end 3.75 -3.75) (layer "F.CrtYd") (width 0.05) (tstamp 9a7efbbe-cef6-4a16-94cc-24b9c923f135))
|
||||
(fp_line (start 0 5.15) (end 3.15 5.15) (layer "F.CrtYd") (width 0.05) (tstamp ab1e36d7-dea4-41d9-9336-36d4512db9e9))
|
||||
(fp_line (start -3.15 -3.75) (end -3.75 -3.75) (layer "F.CrtYd") (width 0.05) (tstamp c454684a-9f60-4d46-8bf5-00f2cf2c78a7))
|
||||
(fp_line (start -3.75 -3.75) (end -3.75 -3.15) (layer "F.CrtYd") (width 0.05) (tstamp c79bd622-cd92-4a96-846f-4a8e1e806975))
|
||||
(fp_line (start -3.15 5.15) (end -3.15 3.75) (layer "F.CrtYd") (width 0.05) (tstamp d715a65f-32ed-4968-9170-aeaaffcba3a6))
|
||||
(fp_line (start 3.75 -3.15) (end 5.15 -3.15) (layer "F.CrtYd") (width 0.05) (tstamp da669de5-264f-478f-807b-b32b7cdc4490))
|
||||
(fp_line (start -5.15 -3.15) (end -5.15 0) (layer "F.CrtYd") (width 0.05) (tstamp e1806ad6-cb3f-4c1d-91ad-d20268040d85))
|
||||
(fp_line (start -3.15 3.75) (end -3.75 3.75) (layer "F.CrtYd") (width 0.05) (tstamp eea2c37f-9e65-46e4-8cd1-613a33eb97ef))
|
||||
(fp_line (start -5.15 3.15) (end -5.15 0) (layer "F.CrtYd") (width 0.05) (tstamp fb60249e-6a41-4a29-9ca5-75b6ecade8c4))
|
||||
(fp_line (start -3.5 3.5) (end -3.5 -2.5) (layer "F.Fab") (width 0.1) (tstamp 03ea9bfd-77ae-4ae0-be1a-ee0cd6120f15))
|
||||
(fp_line (start 3.5 3.5) (end -3.5 3.5) (layer "F.Fab") (width 0.1) (tstamp 646ee076-8221-4d17-8880-7fd365a872f2))
|
||||
(fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer "F.Fab") (width 0.1) (tstamp 7a11f02a-5924-47b3-a142-67c316d3a351))
|
||||
(fp_line (start -3.5 -2.5) (end -2.5 -3.5) (layer "F.Fab") (width 0.1) (tstamp 892b195e-b8bc-4357-8433-51de0fb58e1f))
|
||||
(fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer "F.Fab") (width 0.1) (tstamp eabfab10-ac5b-4298-873d-ddd2f54ded57))
|
||||
(pad "1" smd roundrect locked (at -4.1625 -2.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 3 "+3V3") (pinfunction "Vbat") (pintype "input") (tstamp 5bf1cfbf-338c-4d72-84cd-e522eb0a0b71))
|
||||
(pad "2" smd roundrect locked (at -4.1625 -2.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 14 "PC13_OUT_BTS723_MV") (pinfunction "PC13") (pintype "passive") (tstamp cfa3a19d-3ebd-486a-b124-73675d2745fa))
|
||||
(pad "3" smd roundrect locked (at -4.1625 -1.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 15 "PC14_OUT_BTS723_ALARM") (pinfunction "PC14_OSC32") (pintype "passive") (tstamp 2bbe60b5-6b41-44d3-9b6e-bd68ac851971))
|
||||
(pad "4" smd roundrect locked (at -4.1625 -1.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 13 "PC15_IN_PICKUP") (pinfunction "PC15_OSC32") (pintype "passive") (tstamp 1b969bde-7183-439b-8efd-71d27dfdd927))
|
||||
(pad "5" smd roundrect locked (at -4.1625 -0.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 9 "Net-(C27-Pad1)") (pinfunction "PF0_OSC") (pintype "passive") (tstamp 51b823a2-e195-423d-b339-de02810729a7))
|
||||
(pad "6" smd roundrect locked (at -4.1625 -0.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 10 "Net-(C28-Pad1)") (pinfunction "PF1_OSC") (pintype "passive") (tstamp 02f2ec88-5fe8-49db-b520-7f45aac0aa7e))
|
||||
(pad "7" smd roundrect locked (at -4.1625 0.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 8 "~{RESET}") (pinfunction "PG10_~{RES}") (pintype "passive") (tstamp 012c0e72-2733-4542-a5b3-fb6993eacc9f))
|
||||
(pad "8" smd roundrect locked (at -4.1625 0.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 16 "ADC12_IN1") (pinfunction "PA0") (pintype "passive") (tstamp b8415513-aee7-46f1-ac6c-03101461533f))
|
||||
(pad "9" smd roundrect locked (at -4.1625 1.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 18 "ADC12_IN2") (pinfunction "PA1") (pintype "passive") (tstamp ffcadddd-c0b1-48d7-8063-5dbf1cb73b8c))
|
||||
(pad "10" smd roundrect locked (at -4.1625 1.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 19 "USART2_TX") (pinfunction "PA2") (pintype "passive") (tstamp 0d6223d0-a15e-4270-ab41-cf45ff605869))
|
||||
(pad "11" smd roundrect locked (at -4.1625 2.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 20 "USART2_RX") (pinfunction "PA3") (pintype "passive") (tstamp 0ed37356-a5e6-48d9-8862-7334f24c052d))
|
||||
(pad "12" smd roundrect locked (at -4.1625 2.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 21 "SPI1_~{SS}") (pinfunction "PA4") (pintype "passive") (tstamp 29058b5d-ca3f-4dd7-8af2-8854ac26acd1))
|
||||
(pad "13" smd roundrect locked (at -2.75 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 22 "SPI1_SCK") (pinfunction "PA5") (pintype "passive") (tstamp e70a7607-ad5c-44c8-9616-036e8cf7f514))
|
||||
(pad "14" smd roundrect locked (at -2.25 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 23 "SPI1_MISO") (pinfunction "PA6") (pintype "passive") (tstamp 6e6fd987-e913-4037-8bc2-226f34363455))
|
||||
(pad "15" smd roundrect locked (at -1.75 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 24 "TIM1_CH1N") (pinfunction "PA7") (pintype "passive") (tstamp ce64664b-9f33-4bb9-bcb6-72bcf3e89e2f))
|
||||
(pad "16" smd roundrect locked (at -1.25 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 25 "PB0_OUT_SM_STEP") (pinfunction "PB0") (pintype "passive") (tstamp b5fa5132-6380-488b-be0c-e66514207da3))
|
||||
(pad "17" smd roundrect locked (at -0.75 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 26 "TIM8_CH3N") (pinfunction "PB1") (pintype "passive") (tstamp 7c5dd425-3131-4874-989a-4ee6b01dbf04))
|
||||
(pad "18" smd roundrect locked (at -0.25 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 7 "unconnected-(IC2-Pad18)") (pinfunction "PB2") (pintype "passive") (tstamp 707dbb48-8caf-4c08-9f33-880bdf6f89f8))
|
||||
(pad "19" smd roundrect locked (at 0.25 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 6 "unconnected-(IC2-Pad19)") (pinfunction "VSSA") (pintype "input") (tstamp f32bca8c-2f2d-43aa-97c3-41f1f2f20f05))
|
||||
(pad "20" smd roundrect locked (at 0.75 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 42 "Net-(IC2-Pad20)") (pinfunction "VRef+") (pintype "input") (tstamp 2374a396-bbac-4269-8287-b23cf7cb4fcd))
|
||||
(pad "21" smd roundrect locked (at 1.25 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 42 "Net-(IC2-Pad20)") (pinfunction "Vdda") (pintype "input") (tstamp 700f2081-1a4d-468f-b358-3b02275e6554))
|
||||
(pad "22" smd roundrect locked (at 1.75 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 11 "unconnected-(IC2-Pad22)") (pinfunction "PB10") (pintype "passive") (tstamp 1b216e9c-bb33-4418-aaf0-7f0c9793ee1f))
|
||||
(pad "23" smd roundrect locked (at 2.25 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 1 "GND") (pinfunction "VSS/GND") (pintype "input") (tstamp e32949db-2489-4c96-9722-3f6a012d5e66))
|
||||
(pad "24" smd roundrect locked (at 2.75 4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 3 "+3V3") (pinfunction "Vdd") (pintype "input") (tstamp b594f538-ed79-42cf-9c7f-01fe42485b77))
|
||||
(pad "25" smd roundrect locked (at 4.1625 2.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 2 "ADC12_IN14") (pinfunction "PB11") (pintype "passive") (tstamp 2c87519d-5eda-4990-81c7-773fe9e55862))
|
||||
(pad "26" smd roundrect locked (at 4.1625 2.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 27 "ADC1_IN11") (pinfunction "PB12") (pintype "passive") (tstamp aab999ad-ce93-489b-878b-177cbb1ea618))
|
||||
(pad "27" smd roundrect locked (at 4.1625 1.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 5 "ADC3_IN5") (pinfunction "PB13") (pintype "passive") (tstamp 196f1506-c627-4c52-b8e1-2cf2dcb6c720))
|
||||
(pad "28" smd roundrect locked (at 4.1625 1.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 28 "ADC1_IN5") (pinfunction "PB14") (pintype "passive") (tstamp 5b91a2ff-0ea5-4e16-9e05-afe2091e0b9a))
|
||||
(pad "29" smd roundrect locked (at 4.1625 0.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 4 "ADC2_IN15") (pinfunction "PB15") (pintype "passive") (tstamp 73633cb8-0eb2-433a-8452-dbf3758089bf))
|
||||
(pad "30" smd roundrect locked (at 4.1625 0.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 29 "TIM1_CH1") (pinfunction "PA8") (pintype "passive") (tstamp 1f1543f7-f39a-4a6b-96dd-09de60a49329))
|
||||
(pad "31" smd roundrect locked (at 4.1625 -0.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 30 "USART1_TX") (pinfunction "PA9") (pintype "passive") (tstamp dba97165-5dfa-44ac-bb77-1f218e8d451a))
|
||||
(pad "32" smd roundrect locked (at 4.1625 -0.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 31 "USART1_RX") (pinfunction "PA10") (pintype "passive") (tstamp 3755b813-6ef1-4064-8c43-cb3e1030baa4))
|
||||
(pad "33" smd roundrect locked (at 4.1625 -1.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 32 "CAN1_RX") (pinfunction "PA11") (pintype "passive") (tstamp e9b783a2-15fb-48a5-98db-a06a38874ca2))
|
||||
(pad "34" smd roundrect locked (at 4.1625 -1.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 33 "CAN1_TX") (pinfunction "PA12") (pintype "passive") (tstamp e5c7c980-6c3a-4373-978f-4476ed785cf9))
|
||||
(pad "35" smd roundrect locked (at 4.1625 -2.25) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 1 "GND") (pinfunction "VSS/GND") (pintype "input") (tstamp a6b20249-42fa-4fb7-a76f-9ebccf646c57))
|
||||
(pad "36" smd roundrect locked (at 4.1625 -2.75) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 3 "+3V3") (pinfunction "Vdd") (pintype "input") (tstamp 2427fbc4-dab5-41f3-8c14-a57477041f14))
|
||||
(pad "37" smd roundrect locked (at 2.75 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 34 "SWDIO") (pinfunction "SWDIO_PA13") (pintype "passive") (tstamp fdd17800-9245-402e-98bc-70ca258d1d5f))
|
||||
(pad "38" smd roundrect locked (at 2.25 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 35 "SWDCLK") (pinfunction "SWDCLK_PA14") (pintype "passive") (tstamp 3558f958-08a4-48fb-8949-b03a2b12b5b5))
|
||||
(pad "39" smd roundrect locked (at 1.75 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 12 "PA15_IN_DFM") (pinfunction "PA15") (pintype "passive") (tstamp 94abcd19-8f75-4408-a9a6-541351b19985))
|
||||
(pad "40" smd roundrect locked (at 1.25 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 17 "unconnected-(IC2-Pad40)") (pinfunction "SWO_PB3") (pintype "passive") (tstamp 842b5aec-9884-461a-8192-970f81bc21a5))
|
||||
(pad "41" smd roundrect locked (at 0.75 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 36 "SPI1_MOSI") (pinfunction "PB4") (pintype "passive") (tstamp 69d51732-0cd1-4424-8159-cdcff54d8d63))
|
||||
(pad "42" smd roundrect locked (at 0.25 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 37 "CAN2_RX") (pinfunction "PB5") (pintype "passive") (tstamp 43b2515d-40e1-4f18-8498-c2212bdee67c))
|
||||
(pad "43" smd roundrect locked (at -0.25 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 38 "CAN2_TX") (pinfunction "PB6") (pintype "passive") (tstamp 835ed08f-5346-4263-a1a0-a8a80928f96a))
|
||||
(pad "44" smd roundrect locked (at -0.75 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 39 "PB7_OUT_SM_~{ENABLE}") (pinfunction "PB7") (pintype "passive") (tstamp 26e8f4e7-9220-47f0-9ac9-56cb4bed2519))
|
||||
(pad "45" smd roundrect locked (at -1.25 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 40 "PB8_OUT__LED") (pinfunction "Boot0_PB8") (pintype "passive") (tstamp 2a31e86e-895d-49aa-be3f-b59761213409))
|
||||
(pad "46" smd roundrect locked (at -1.75 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 41 "TIM8_CH3") (pinfunction "PB9") (pintype "passive") (tstamp 4c8e0465-e0ce-4ed7-8297-1727ac343ba2))
|
||||
(pad "47" smd roundrect locked (at -2.25 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 1 "GND") (pinfunction "VSS/GND") (pintype "input") (tstamp 4b9748b3-8ebd-4c02-8852-11697ffb14a2))
|
||||
(pad "48" smd roundrect locked (at -2.75 -4.1625) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
|
||||
(net 3 "+3V3") (pinfunction "Vdd") (pintype "input") (tstamp b40bf359-7abf-434a-a4c8-2da42a1aaa8f))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Package_QFP.3dshapes/LQFP-48_7x7mm_P0.5mm.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(footprint "0IBF_RCL:C_1206_3216Metric" (layer "F.Cu")
|
||||
(tedit 60FD2F22) (tstamp d9428240-1e44-4605-82f0-03c995fa11d2)
|
||||
(at 101.67 -88.88 180)
|
||||
(descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
|
||||
(tags "capacitor")
|
||||
(property "Alternative" "")
|
||||
(property "Bemerkung" "")
|
||||
(property "Farnell" "")
|
||||
(property "MF" "")
|
||||
(property "MPN" "")
|
||||
(property "RS" "")
|
||||
(property "Sheetfile" "controller.kicad_sch")
|
||||
(property "Sheetname" "Controller")
|
||||
(property "digikey" "")
|
||||
(property "mouser" "")
|
||||
(path "/21ecf582-2fe5-40fc-9946-89f54de57e7c/0dce264e-9bca-40d6-9d61-9c4929a9100f")
|
||||
(attr smd)
|
||||
(fp_text reference "C27" (at 0 -1.85) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 8ff10208-cca1-4f72-92d3-e0696ffdcacf)
|
||||
)
|
||||
(fp_text value "18pF" (at 0 1.85) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 3918dfe7-8999-44bf-af7f-694fbf7031b8)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.12)))
|
||||
(tstamp 7f15ad17-07ba-48ba-b706-1381021bde77)
|
||||
)
|
||||
(fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer "F.SilkS") (width 0.12) (tstamp 11166f97-ed70-4cb7-81d7-7891e9e0b4eb))
|
||||
(fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer "F.SilkS") (width 0.12) (tstamp 56b791bd-4bd1-402a-add9-dd1b785e19c7))
|
||||
(fp_rect (start -2.3 -1) (end 2.3 1) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 88ad8fcc-9aae-40e2-838f-242cec68bd6a))
|
||||
(fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 03b29997-e6cf-4f95-ab2f-48a96c25713e))
|
||||
(fp_line (start 1.6 0.8) (end -1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp add057f3-9ba6-4d5e-bed8-38cfd7f58cad))
|
||||
(fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp c89209f8-f06d-4961-9460-9548a6d24554))
|
||||
(fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp d44c9923-c9da-4e68-b750-f730efb92518))
|
||||
(fp_rect (start -1.95 -0.7) (end -1.65 0.7) (layer "F.Fab") (width 0.01) (fill solid) (tstamp 61572252-55f2-4259-82cc-e7fa5e51537a))
|
||||
(fp_rect (start 1.6 -0.7) (end 1.9 0.7) (layer "F.Fab") (width 0.01) (fill solid) (tstamp ed86fa80-21c4-430e-9fee-b311dba83db4))
|
||||
(pad "1" smd roundrect locked (at -1.475 0 180) (size 1.15 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.217391)
|
||||
(net 9 "Net-(C27-Pad1)") (pintype "passive") (tstamp b4716f7e-720f-4a40-94df-9dab415c2e09))
|
||||
(pad "2" smd roundrect locked (at 1.475 0 180) (size 1.15 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.217391)
|
||||
(net 1 "GND") (pintype "passive") (tstamp 4ab41e96-3896-429b-845c-c8b841245667))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(footprint "0IBF_RCL:C_1206_3216Metric" (layer "F.Cu")
|
||||
(tedit 60FD2F22) (tstamp e5eb927b-ab9b-4dfa-a350-78194cc42294)
|
||||
(at 101.67 -86.38 180)
|
||||
(descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
|
||||
(tags "capacitor")
|
||||
(property "Alternative" "")
|
||||
(property "Bemerkung" "")
|
||||
(property "Farnell" "")
|
||||
(property "MF" "")
|
||||
(property "MPN" "")
|
||||
(property "RS" "")
|
||||
(property "Sheetfile" "controller.kicad_sch")
|
||||
(property "Sheetname" "Controller")
|
||||
(property "digikey" "")
|
||||
(property "mouser" "")
|
||||
(path "/21ecf582-2fe5-40fc-9946-89f54de57e7c/dceb99f1-0f35-4081-8010-aaf5d778581f")
|
||||
(attr smd)
|
||||
(fp_text reference "C28" (at 0 -1.85) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp e82dbd21-dd36-466f-8f06-703f80ab95c6)
|
||||
)
|
||||
(fp_text value "18pF" (at 0 1.85) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 03d07f58-edb7-4e39-a342-f7dca32af450)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.12)))
|
||||
(tstamp 5d0c1f5c-af2f-41b1-affe-4bac5f6e5128)
|
||||
)
|
||||
(fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer "F.SilkS") (width 0.12) (tstamp 4cf32712-d495-4992-aaf7-1cbd990dc530))
|
||||
(fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer "F.SilkS") (width 0.12) (tstamp 667681d2-df09-41b5-a700-b0de6b24a524))
|
||||
(fp_rect (start -2.3 -1) (end 2.3 1) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp be2f800a-3ed6-4e0a-912d-a110cfdf6b4b))
|
||||
(fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 12cf333d-1f68-4ae6-b553-70ba2f5f693e))
|
||||
(fp_line (start 1.6 0.8) (end -1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp 306456f9-bce2-4cb0-ac6f-558637713ef6))
|
||||
(fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 3dc97e70-7e3a-4f78-9ff0-cd8142ad6b00))
|
||||
(fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp 46aa8dc6-7b8c-407f-856b-2760fb8dbfb4))
|
||||
(fp_rect (start 1.6 -0.7) (end 1.9 0.7) (layer "F.Fab") (width 0.01) (fill solid) (tstamp 5f49b3a8-a993-4520-ac7c-a3fce5822c61))
|
||||
(fp_rect (start -1.95 -0.7) (end -1.65 0.7) (layer "F.Fab") (width 0.01) (fill solid) (tstamp 60f0f474-6042-463f-9249-121adf9d7e7d))
|
||||
(pad "1" smd roundrect locked (at -1.475 0 180) (size 1.15 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.217391)
|
||||
(net 10 "Net-(C28-Pad1)") (pintype "passive") (tstamp dc885587-42ea-477f-b5a8-2ca9965e1b83))
|
||||
(pad "2" smd roundrect locked (at 1.475 0 180) (size 1.15 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.217391)
|
||||
(net 1 "GND") (pintype "passive") (tstamp 767a6593-1530-48ff-8f15-972e43ca7829))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(gr_poly
|
||||
(pts
|
||||
(xy 0 0)
|
||||
(xy 0 -100)
|
||||
(xy 150.7 -100)
|
||||
(xy 150.7 0)
|
||||
) (layer "Edge.Cuts") (width 0.1) (fill none) (tstamp 8ce1d4b0-7fa5-46e0-adc9-cd5be18c10e9))
|
||||
|
||||
(segment (start 111.4375 -87.85) (end 112.85 -89.2625) (width 0.2) (layer "F.Cu") (net 3) (tstamp 17b7dbb2-a831-4dea-b4e7-844bc97220de))
|
||||
(segment (start 112.395 -89.7175) (end 112.395 -93.38) (width 0.2) (layer "F.Cu") (net 3) (tstamp 1c6dd1df-dd62-4608-8d17-a93c33de3441))
|
||||
(segment (start 112.375 -93.4) (end 112.395 -93.38) (width 0.4) (layer "F.Cu") (net 3) (tstamp 4397afb6-b5ea-41b0-b807-1eb5b8bd07e5))
|
||||
(segment (start 112.85 -89.2625) (end 112.395 -89.7175) (width 0.2) (layer "F.Cu") (net 3) (tstamp ec95af03-6d36-42a0-b85e-09736135ea4b))
|
||||
(segment (start 119.7625 -84.35) (end 121.681337 -84.35) (width 0.2) (layer "F.Cu") (net 4) (tstamp 3873bce8-1765-4683-88fe-f282a2e046f8))
|
||||
(segment (start 121.681337 -84.35) (end 122.821555 -85.490218) (width 0.2) (layer "F.Cu") (net 4) (tstamp 70ecde91-2108-487b-9c92-184fbca2ff8a))
|
||||
(segment (start 122.821555 -85.490218) (end 122.821555 -85.646555) (width 0.2) (layer "F.Cu") (net 4) (tstamp acb536a5-b484-4ae7-9fb6-143a115cc3d8))
|
||||
(segment (start 104.73 -82.38) (end 104.7 -82.35) (width 0.2) (layer "F.Cu") (net 8) (tstamp 0274d653-1f7e-424e-800e-1a11a5d101ef))
|
||||
(segment (start 109.039022 -84.85) (end 106.569022 -82.38) (width 0.2) (layer "F.Cu") (net 8) (tstamp 1fbbefdb-0bfc-4131-bef7-59d7e3b32aeb))
|
||||
(segment (start 105.945 -82.38) (end 104.73 -82.38) (width 0.2) (layer "F.Cu") (net 8) (tstamp 3318ac82-3e51-4e49-80c5-aaae0671a1d7))
|
||||
(segment (start 111.4375 -84.85) (end 109.039022 -84.85) (width 0.2) (layer "F.Cu") (net 8) (tstamp 444f4ff4-45ae-46ad-83c3-c86b67250533))
|
||||
(segment (start 106.569022 -82.38) (end 105.945 -82.38) (width 0.2) (layer "F.Cu") (net 8) (tstamp b74cd295-71ed-4aaf-9c9f-6bc756bbe74f))
|
||||
(segment (start 107.22 -88.88) (end 106.07 -88.88) (width 0.2) (layer "F.Cu") (net 9) (tstamp 0093020a-49dd-421e-b9ba-e754c8e48002))
|
||||
(segment (start 103.145 -88.88) (end 106.07 -88.88) (width 0.2) (layer "F.Cu") (net 9) (tstamp 4b3735f5-4bc4-4ca5-8da5-a4d025ea0d37))
|
||||
(segment (start 111.4375 -85.85) (end 110.25 -85.85) (width 0.2) (layer "F.Cu") (net 9) (tstamp 6a1e7aae-88e8-4a5a-a259-e8ad9bb6bf0a))
|
||||
(segment (start 110.25 -85.85) (end 107.22 -88.88) (width 0.2) (layer "F.Cu") (net 9) (tstamp 918714e7-254e-49f8-95d7-2fbc42ee45fa))
|
||||
(segment (start 104.645 -84.88) (end 106.07 -84.88) (width 0.2) (layer "F.Cu") (net 10) (tstamp 21478b50-ec5c-4252-9065-9ab52dc1d215))
|
||||
(segment (start 111.4375 -85.35) (end 106.54 -85.35) (width 0.2) (layer "F.Cu") (net 10) (tstamp 6fdc8151-f8d3-4751-8651-6d7dd94ef438))
|
||||
(segment (start 106.54 -85.35) (end 106.07 -84.88) (width 0.2) (layer "F.Cu") (net 10) (tstamp b0ef9842-3a07-4bc7-92f1-e51d797e26bb))
|
||||
(segment (start 103.145 -86.38) (end 104.645 -84.88) (width 0.2) (layer "F.Cu") (net 10) (tstamp ff1fe589-f890-42d3-96d7-e0f4a39aa094))
|
||||
(segment (start 111.4375 -86.35) (end 112.175 -86.35) (width 0.2) (layer "F.Cu") (net 13) (tstamp 93905cf4-26f4-4adb-91d0-8eba4c43452b))
|
||||
(segment (start 110.5 -87.35) (end 110 -87.85) (width 0.2) (layer "F.Cu") (net 14) (tstamp 1e3be38e-7011-4661-81e8-bffb71d6b9e4))
|
||||
(segment (start 110 -87.85) (end 109.95 -87.9) (width 0.2) (layer "F.Cu") (net 14) (tstamp 9282658c-bc67-4c17-bed1-9557fa6ba9cd))
|
||||
(segment (start 111.4375 -87.35) (end 110.5 -87.35) (width 0.2) (layer "F.Cu") (net 14) (tstamp d4d78e80-ec6f-473e-b19c-a5b09c56ef66))
|
||||
(segment (start 109.95 -87.9) (end 109.95 -90.6005) (width 0.2) (layer "F.Cu") (net 14) (tstamp f3380420-beac-4952-aa3d-41d7fe9e0cdb))
|
||||
(via (at 109.95 -90.6005) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 14) (tstamp e5b3e736-ef16-4a48-b59f-7e97b69123e6))
|
||||
(segment (start 109.95 -90.75) (end 109.89952 -90.80048) (width 0.2) (layer "B.Cu") (net 14) (tstamp 5774fe3b-4f3f-4e4a-ac7f-379aaed3b41c))
|
||||
(segment (start 109.95 -90.6005) (end 109.95 -90.75) (width 0.2) (layer "B.Cu") (net 14) (tstamp ef8ea2e9-ead7-4023-a133-6e8575585adb))
|
||||
(segment (start 111.4375 -83.35) (end 110.7 -83.35) (width 0.2) (layer "F.Cu") (net 19) (tstamp 47ead742-42bf-4320-bb0f-438c75cff963))
|
||||
(segment (start 111.4375 -82.85) (end 110.7 -82.85) (width 0.2) (layer "F.Cu") (net 20) (tstamp 0efe3f7c-54c6-445e-b949-b22dc44a4303))
|
||||
(segment (start 109.3 -81.45) (end 109.3 -72.65) (width 0.2) (layer "F.Cu") (net 20) (tstamp 795b7d46-c389-4cdb-8eac-cf2e9ffe99b3))
|
||||
(segment (start 109.3 -72.65) (end 109.25 -72.6) (width 0.2) (layer "F.Cu") (net 20) (tstamp bc6118ec-4137-4856-8e1f-93f839210fbb))
|
||||
(segment (start 110.7 -82.85) (end 109.3 -81.45) (width 0.2) (layer "F.Cu") (net 20) (tstamp c79c41fe-7fbc-4fe6-b542-a517a2c25d22))
|
||||
(segment (start 109.8495 -80.762) (end 109.8495 -75.934832) (width 0.2) (layer "F.Cu") (net 21) (tstamp 85ede48d-2a1e-4c30-8101-4f77ac925674))
|
||||
(segment (start 111.4375 -82.35) (end 109.8495 -80.762) (width 0.2) (layer "F.Cu") (net 21) (tstamp 92e92b5a-d5b1-4c5f-af3b-26f27138e119))
|
||||
(via (at 109.8495 -75.934832) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 21) (tstamp 7c0f2b25-35b7-4875-9287-b6e3327af513))
|
||||
(segment (start 109.783332 -76.001) (end 109.8495 -75.934832) (width 0.2) (layer "B.Cu") (net 21) (tstamp 3dfb4965-d749-4a08-ac0f-c499420acb23))
|
||||
(segment (start 95.349 -76.001) (end 109.783332 -76.001) (width 0.2) (layer "B.Cu") (net 21) (tstamp c2347614-ddb8-412e-900a-9454ff0e3076))
|
||||
(segment (start 95.301 -76.001) (end 95.3 -76) (width 0.2) (layer "B.Cu") (net 21) (tstamp fad86278-e752-4050-a99e-ae442c50b3d5))
|
||||
(segment (start 112.85 -80.9375) (end 112.85 -79.35) (width 0.2) (layer "F.Cu") (net 22) (tstamp bf8993a8-267e-4a88-aaf7-43a916bc9b78))
|
||||
(segment (start 112.85 -79.35) (end 112.4 -78.9) (width 0.2) (layer "F.Cu") (net 22) (tstamp c9ca226e-9c9d-4ad6-83fe-a8d1e7fefac6))
|
||||
(via (at 112.4 -78.9) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 22) (tstamp 878ab63f-5cbe-4cb7-85b2-6dc45fcaa5c9))
|
||||
(segment (start 112.4 -78.9) (end 112.35 -78.85) (width 0.2) (layer "B.Cu") (net 22) (tstamp e1151690-cc80-4490-993c-d2d3f9a9deb0))
|
||||
(segment (start 113.35 -80.9375) (end 113.35 -80.241042) (width 0.2) (layer "F.Cu") (net 23) (tstamp 2cfcc0dc-4710-415d-abd2-23d1bddaecd9))
|
||||
(segment (start 113.553999 -79.7) (end 113.553999 -78.782576) (width 0.2) (layer "F.Cu") (net 24) (tstamp 5b5a6a35-41db-47c7-992e-d69b71c5c3a2))
|
||||
(segment (start 112.447799 -77.676376) (end 111.084251 -77.676376) (width 0.2) (layer "F.Cu") (net 24) (tstamp b39627ab-4f80-4579-a2fb-c9b2740726cb))
|
||||
(segment (start 113.553999 -78.782576) (end 112.447799 -77.676376) (width 0.2) (layer "F.Cu") (net 24) (tstamp b78d0291-5d5c-4e58-b537-6b296efb406a))
|
||||
(segment (start 113.85 -80.9375) (end 113.85 -79.996001) (width 0.2) (layer "F.Cu") (net 24) (tstamp d4f0a7f1-bbc6-49be-acf8-df2c902beee3))
|
||||
(segment (start 113.85 -79.996001) (end 113.553999 -79.7) (width 0.2) (layer "F.Cu") (net 24) (tstamp de3c173e-5ea6-48aa-af89-7a58d65dd859))
|
||||
(via (at 111.084251 -77.676376) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 24) (tstamp 2aeb9dbf-5e66-4b17-802a-fa0e16384958))
|
||||
(segment (start 96.923624 -77.676376) (end 96.9 -77.7) (width 0.2) (layer "B.Cu") (net 24) (tstamp 1e90f58d-6f36-48c2-a7b5-66ef4d8af4cf))
|
||||
(segment (start 111.084251 -77.676376) (end 96.923624 -77.676376) (width 0.2) (layer "B.Cu") (net 24) (tstamp a4c9c39f-7446-4e87-8670-15e211408330))
|
||||
(segment (start 112.6 -77.1) (end 111.731575 -77.1) (width 0.2) (layer "F.Cu") (net 25) (tstamp be041ff0-fc9f-4024-8b9b-7ee27227924b))
|
||||
(segment (start 114.35 -78.85) (end 112.6 -77.1) (width 0.2) (layer "F.Cu") (net 25) (tstamp c6e3042f-b41b-4cb9-8d31-3a6fe16b81bf))
|
||||
(segment (start 114.35 -80.9375) (end 114.35 -78.85) (width 0.2) (layer "F.Cu") (net 25) (tstamp ccc2f9c1-e2f7-4a65-a1ec-86cc5405b676))
|
||||
(segment (start 111.731575 -77.1) (end 111.704699 -77.126876) (width 0.2) (layer "F.Cu") (net 25) (tstamp f8ef742c-32dd-4d87-9b27-283e4bb106e5))
|
||||
(via (at 111.704699 -77.126876) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 25) (tstamp 94fd927c-5cba-40d7-b272-7163c37cd6c5))
|
||||
(segment (start 97.073124 -77.126876) (end 97 -77.2) (width 0.2) (layer "B.Cu") (net 25) (tstamp ed9f6e87-4b74-4372-878a-803ae31e61b7))
|
||||
(segment (start 111.704699 -77.126876) (end 97.073124 -77.126876) (width 0.2) (layer "B.Cu") (net 25) (tstamp ffa859cc-11c9-4bcb-9db6-0f0786afce7e))
|
||||
(segment (start 121.1 -84.85) (end 121.15 -84.9) (width 0.2) (layer "F.Cu") (net 29) (tstamp 95a687bf-2ded-45be-ac1d-d34df0df64b4))
|
||||
(segment (start 119.7625 -84.85) (end 121.1 -84.85) (width 0.2) (layer "F.Cu") (net 29) (tstamp 9f845ad7-4de4-4d3a-b411-34636302bed6))
|
||||
(segment (start 119.7625 -85.35) (end 119.862001 -85.449501) (width 0.2) (layer "F.Cu") (net 30) (tstamp f7c5e2ab-7d80-45ff-b56c-42253409aca7))
|
||||
(segment (start 121.627113 -85.85) (end 122.34634 -86.569227) (width 0.2) (layer "F.Cu") (net 31) (tstamp 53674539-2d8a-409e-aa2f-e53e91568d52))
|
||||
(segment (start 122.34634 -86.569227) (end 122.34634 -86.650999) (width 0.2) (layer "F.Cu") (net 31) (tstamp c26da0fa-b0f9-4537-9fd7-e438176f27fe))
|
||||
(segment (start 119.7625 -85.85) (end 121.627113 -85.85) (width 0.2) (layer "F.Cu") (net 31) (tstamp f87c16e4-9039-441e-b6fd-e87ea70d6aad))
|
||||
(via (at 122.34634 -86.650999) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 31) (tstamp aeeaf173-7068-406d-9683-46ded40476c6))
|
||||
(segment (start 124.922385 -86.749012) (end 125.020398 -86.650999) (width 0.2) (layer "B.Cu") (net 31) (tstamp 48f019c8-b7f0-47c5-8dc9-063e7878736f))
|
||||
(segment (start 122.444353 -86.749012) (end 124.922385 -86.749012) (width 0.2) (layer "B.Cu") (net 31) (tstamp 900920a5-8ef0-4baf-9b88-4098a94d231f))
|
||||
(segment (start 122.34634 -86.650999) (end 122.444353 -86.749012) (width 0.2) (layer "B.Cu") (net 31) (tstamp f4809eec-3416-466b-a626-a977c4aa4d14))
|
||||
(segment (start 119.7625 -86.35) (end 121.35 -86.35) (width 0.2) (layer "F.Cu") (net 32) (tstamp 4d7ae790-1d37-43a3-8ac3-a68006e38765))
|
||||
(segment (start 121.35 -86.35) (end 121.55 -86.55) (width 0.2) (layer "F.Cu") (net 32) (tstamp c3e02b29-bd93-422c-92f7-0bf197f3610d))
|
||||
(via (at 121.55 -86.55) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 32) (tstamp 643dc246-af22-474c-8fe2-476ee1d4316b))
|
||||
(segment (start 121.55 -86.55) (end 121.55 -86.7) (width 0.2) (layer "B.Cu") (net 32) (tstamp e149c6bb-9643-406f-a9ed-9336bd589f24))
|
||||
(segment (start 117.85 -89.2625) (end 117.85 -90) (width 0.2) (layer "F.Cu") (net 35) (tstamp 04dbe7ae-42d9-4eff-89ee-6ff462927d9b))
|
||||
(segment (start 118.9 -91.05) (end 119.05 -91.05) (width 0.2) (layer "F.Cu") (net 35) (tstamp 30c11fa2-4bc6-4b85-b4cb-f4ffacad1958))
|
||||
(segment (start 117.85 -90) (end 118.9 -91.05) (width 0.2) (layer "F.Cu") (net 35) (tstamp ce1f28a2-6de0-4185-ae31-da920f0815ca))
|
||||
(via (at 119.05 -91.05) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 35) (tstamp 6faa2a89-f526-41d3-9ecf-f4e660f719be))
|
||||
(segment (start 119.05 -91.05) (end 119.149501 -91.149501) (width 0.2) (layer "B.Cu") (net 35) (tstamp 0ef2acf4-3ebc-4541-8630-799b090476c8))
|
||||
(segment (start 115.85 -89.2625) (end 115.85 -90.55) (width 0.2) (layer "F.Cu") (net 37) (tstamp 406956e8-49de-4237-8754-53408b826c1c))
|
||||
(segment (start 115.85 -90.55) (end 117.4 -92.1) (width 0.2) (layer "F.Cu") (net 37) (tstamp 59845a05-5a0a-4e41-ada6-38f88df52505))
|
||||
(via (at 117.4 -92.1) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 37) (tstamp a7e3f801-b254-48e4-94cc-c47f0e9aa322))
|
||||
(segment (start 117.4 -92.1) (end 117.449501 -92.149501) (width 0.2) (layer "B.Cu") (net 37) (tstamp 1cbc4c6c-8611-4ec3-a25d-982cc792947a))
|
||||
(segment (start 115.35 -90.85) (end 117.311041 -92.811041) (width 0.2) (layer "F.Cu") (net 38) (tstamp 09a89bec-6ec2-43e7-9825-2404e6dc0548))
|
||||
(segment (start 117.311041 -92.811041) (end 117.637014 -92.811041) (width 0.2) (layer "F.Cu") (net 38) (tstamp b70ce0d2-230c-4b93-8735-747e4483e781))
|
||||
(segment (start 115.35 -89.2625) (end 115.35 -90.85) (width 0.2) (layer "F.Cu") (net 38) (tstamp f5c8cd32-a35c-47d8-b106-06783c17840f))
|
||||
(via (at 117.637014 -92.811041) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 38) (tstamp 5d076d64-d551-4c37-9b35-e9867cf8dc56))
|
||||
(segment (start 117.748055 -92.7) (end 117.637014 -92.811041) (width 0.2) (layer "B.Cu") (net 38) (tstamp 37c33c07-e877-4285-b6c6-6fcfa7407a9b))
|
||||
(segment (start 114.35 -89.2625) (end 114.35 -90) (width 0.2) (layer "F.Cu") (net 40) (tstamp 269f9c9f-9eb1-4b4c-a309-66bd4d06beb1))
|
||||
(segment (start 113.85 -89.2625) (end 113.85 -91.596123) (width 0.2) (layer "F.Cu") (net 41) (tstamp 2a221f03-e175-4502-8a60-2a8fdc2b61d8))
|
||||
(segment (start 113.85 -91.596123) (end 113.746623 -91.6995) (width 0.2) (layer "F.Cu") (net 41) (tstamp c49a402b-8eab-40de-8cb3-dfaefdda2f41))
|
||||
(via (at 113.746623 -91.6995) (size 0.6) (drill 0.2) (layers "F.Cu" "B.Cu") (net 41) (tstamp 5771defb-7327-4f6a-bf33-b18ce08c1582))
|
||||
(segment (start 113.597123 -91.55) (end 113.746623 -91.6995) (width 0.2) (layer "B.Cu") (net 41) (tstamp 0eba5db0-811a-4c95-9e75-e1dba2df2f46))
|
||||
(segment (start 116.35 -80.9375) (end 116.85 -80.9375) (width 0.2) (layer "F.Cu") (net 42) (tstamp a12e3bc0-22a2-434c-8ba7-f59e24c78c21))
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,537 @@
|
|||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.09999999999999999,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.15,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.0,
|
||||
"height": 1.8,
|
||||
"width": 1.15
|
||||
},
|
||||
"silk_line_width": 0.15,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": true,
|
||||
"min_clearance": 0.39999999999999997
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [
|
||||
{
|
||||
"gap": 0.0,
|
||||
"via_gap": 0.0,
|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "ignore",
|
||||
"silk_overlap": "ignore",
|
||||
"skew_out_of_range": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.15,
|
||||
"min_copper_edge_clearance": 0.19999999999999998,
|
||||
"min_hole_clearance": 0.19999999999999998,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.19999999999999998,
|
||||
"min_track_width": 0.15,
|
||||
"min_via_annular_width": 0.15,
|
||||
"min_via_diameter": 0.5,
|
||||
"solder_mask_clearance": 0.0,
|
||||
"solder_mask_min_width": 0.0,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.15,
|
||||
0.2,
|
||||
0.3,
|
||||
0.4,
|
||||
0.5,
|
||||
0.6,
|
||||
0.8,
|
||||
1.0
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.6,
|
||||
"drill": 0.2
|
||||
},
|
||||
{
|
||||
"diameter": 0.7,
|
||||
"drill": 0.3
|
||||
},
|
||||
{
|
||||
"diameter": 0.8,
|
||||
"drill": 0.4
|
||||
},
|
||||
{
|
||||
"diameter": 0.9,
|
||||
"drill": 0.5
|
||||
},
|
||||
{
|
||||
"diameter": 1.0,
|
||||
"drill": 0.6
|
||||
},
|
||||
{
|
||||
"diameter": 1.2,
|
||||
"drill": 0.8
|
||||
},
|
||||
{
|
||||
"diameter": 1.5,
|
||||
"drill": 1.0
|
||||
},
|
||||
{
|
||||
"diameter": 1.8,
|
||||
"drill": 1.2
|
||||
},
|
||||
{
|
||||
"diameter": 3.0,
|
||||
"drill": 2.0
|
||||
},
|
||||
{
|
||||
"diameter": 4.2,
|
||||
"drill": 3.2
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": [
|
||||
{
|
||||
"activeLayer": -2,
|
||||
"layers": [
|
||||
0,
|
||||
31,
|
||||
36,
|
||||
37,
|
||||
40,
|
||||
41,
|
||||
42,
|
||||
44,
|
||||
45,
|
||||
46,
|
||||
47
|
||||
],
|
||||
"name": "standard_ohne_namen",
|
||||
"renderLayers": [
|
||||
125,
|
||||
126,
|
||||
127,
|
||||
128,
|
||||
129,
|
||||
131,
|
||||
133,
|
||||
134,
|
||||
135,
|
||||
136,
|
||||
137,
|
||||
138,
|
||||
139,
|
||||
140,
|
||||
141,
|
||||
144,
|
||||
145,
|
||||
146,
|
||||
147,
|
||||
148,
|
||||
149,
|
||||
150,
|
||||
151,
|
||||
152,
|
||||
153,
|
||||
154,
|
||||
155,
|
||||
157,
|
||||
158,
|
||||
159,
|
||||
160,
|
||||
161
|
||||
]
|
||||
}
|
||||
]
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "ignore",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "error",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "Pumpenmodul_Kicad.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 6.0,
|
||||
"clearance": 0.15,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.15,
|
||||
"via_diameter": 0.5,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": "C:/Gewerbe/02_CAD/07_KiCAD/drc_rules_color_layersets/Zeichnungsblatt_kreuz_cross.kicad_wks"
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_bus_thickness": 12.0,
|
||||
"default_junction_size": 36.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"default_wire_thickness": 6.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.3
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"net_format_name": "",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"9c65c6c4-f8a1-4869-9ee5-38624b40fdf6",
|
||||
""
|
||||
],
|
||||
[
|
||||
"21ecf582-2fe5-40fc-9946-89f54de57e7c",
|
||||
"Controller"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,172 @@
|
|||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.0
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.01,
|
||||
"min_hole_clearance": 0.0,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [],
|
||||
"via_dimensions": [],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "issue8909.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": []
|
||||
},
|
||||
"sheets": [],
|
||||
"text_variables": {}
|
||||
}
|
||||
|
|
@ -37,6 +37,7 @@ set( QA_PCBNEW_SRCS
|
|||
test_lset.cpp
|
||||
test_pad_naming.cpp
|
||||
test_libeval_compiler.cpp
|
||||
test_tracks_cleaner.cpp
|
||||
test_zone_filler.cpp
|
||||
|
||||
drc/test_drc_courtyard_invalid.cpp
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* This program source code file is part of KiCad, a free EDA CAD application.
|
||||
*
|
||||
* Copyright (C) 2019 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
* Copyright (C) 2019-2021 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
|
@ -23,17 +23,24 @@
|
|||
|
||||
#include "board_test_utils.h"
|
||||
|
||||
#include <wx/filename.h>
|
||||
#include <board.h>
|
||||
#include <board_design_settings.h>
|
||||
#include <settings/settings_manager.h>
|
||||
#include <pcbnew_utils/board_file_utils.h>
|
||||
#include <tool/tool_manager.h>
|
||||
#include <zone_filler.h>
|
||||
|
||||
// For the temp directory logic: can be std::filesystem in C++17
|
||||
#include <boost/filesystem.hpp>
|
||||
#include <boost/test/unit_test.hpp>
|
||||
|
||||
#include <board_commit.h>
|
||||
|
||||
namespace KI_TEST
|
||||
{
|
||||
|
||||
BOARD_DUMPER::BOARD_DUMPER() : m_dump_boards( std::getenv( "KICAD_TEST_DUMP_BOARD_FILES" ) )
|
||||
BOARD_DUMPER::BOARD_DUMPER() :
|
||||
m_dump_boards( std::getenv( "KICAD_TEST_DUMP_BOARD_FILES" ) )
|
||||
{
|
||||
}
|
||||
|
||||
|
|
@ -50,4 +57,60 @@ void BOARD_DUMPER::DumpBoardToFile( BOARD& aBoard, const std::string& aName ) co
|
|||
::KI_TEST::DumpBoardToFile( aBoard, path.string() );
|
||||
}
|
||||
|
||||
|
||||
void LoadBoard( SETTINGS_MANAGER& aSettingsManager, const wxString& aRelPath,
|
||||
std::unique_ptr<BOARD>& aBoard )
|
||||
{
|
||||
if( aBoard )
|
||||
{
|
||||
aBoard->SetProject( nullptr );
|
||||
aBoard = nullptr;
|
||||
}
|
||||
|
||||
std::string absPath = GetPcbnewTestDataDir() + aRelPath.ToStdString();
|
||||
wxFileName projectFile( absPath + ".kicad_pro" );
|
||||
wxFileName legacyProject( absPath + ".pro" );
|
||||
std::string boardPath = absPath + ".kicad_pcb";
|
||||
wxFileName rulesFile( absPath + ".kicad_dru" );
|
||||
|
||||
if( projectFile.Exists() )
|
||||
aSettingsManager.LoadProject( projectFile.GetFullPath() );
|
||||
else if( legacyProject.Exists() )
|
||||
aSettingsManager.LoadProject( legacyProject.GetFullPath() );
|
||||
|
||||
aBoard = ReadBoardFromFileOrStream( boardPath );
|
||||
|
||||
if( projectFile.Exists() || legacyProject.Exists() )
|
||||
aBoard->SetProject( &aSettingsManager.Prj() );
|
||||
|
||||
auto m_DRCEngine = std::make_shared<DRC_ENGINE>( aBoard.get(), &aBoard->GetDesignSettings() );
|
||||
|
||||
if( rulesFile.Exists() )
|
||||
m_DRCEngine->InitEngine( rulesFile );
|
||||
else
|
||||
m_DRCEngine->InitEngine( wxFileName() );
|
||||
|
||||
aBoard->GetDesignSettings().m_DRCEngine = m_DRCEngine;
|
||||
}
|
||||
|
||||
|
||||
void FillZones( BOARD* m_board, int aFillVersion )
|
||||
{
|
||||
TOOL_MANAGER toolMgr;
|
||||
toolMgr.SetEnvironment( m_board, nullptr, nullptr, nullptr, nullptr );
|
||||
|
||||
BOARD_COMMIT commit( &toolMgr );
|
||||
ZONE_FILLER filler( m_board, &commit );
|
||||
std::vector<ZONE*> toFill;
|
||||
|
||||
m_board->GetDesignSettings().m_ZoneFillVersion = aFillVersion;
|
||||
|
||||
for( ZONE* zone : m_board->Zones() )
|
||||
toFill.push_back( zone );
|
||||
|
||||
if( filler.Fill( toFill, false, nullptr ) )
|
||||
commit.Push( _( "Fill Zone(s)" ), false, false );
|
||||
}
|
||||
|
||||
|
||||
} // namespace KI_TEST
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* This program source code file is part of KiCad, a free EDA CAD application.
|
||||
*
|
||||
* Copyright (C) 2019 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
* Copyright (C) 2019-2021 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
|
@ -21,18 +21,16 @@
|
|||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board_test_utils.h
|
||||
* General utilities for PCB tests
|
||||
*/
|
||||
|
||||
#ifndef QA_PCBNEW_BOARD_TEST_UTILS__H
|
||||
#define QA_PCBNEW_BOARD_TEST_UTILS__H
|
||||
|
||||
#include <string>
|
||||
#include <wx/string.h>
|
||||
|
||||
class BOARD;
|
||||
class BOARD_ITEM;
|
||||
class SETTINGS_MANAGER;
|
||||
|
||||
|
||||
namespace KI_TEST
|
||||
|
|
@ -58,6 +56,13 @@ public:
|
|||
const bool m_dump_boards;
|
||||
};
|
||||
|
||||
|
||||
void LoadBoard( SETTINGS_MANAGER& aSettingsManager, const wxString& aRelPath,
|
||||
std::unique_ptr<BOARD>& aBoard );
|
||||
|
||||
void FillZones( BOARD* m_board, int aFillVersion );
|
||||
|
||||
|
||||
} // namespace KI_TEST
|
||||
|
||||
#endif // QA_PCBNEW_BOARD_TEST_UTILS__H
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* This program source code file is part of KiCad, a free EDA CAD application.
|
||||
*
|
||||
* Copyright (C) 201 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
* Copyright (C) 2021 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
|
@ -21,12 +21,8 @@
|
|||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
#include <string>
|
||||
|
||||
#include <wx/toplevel.h>
|
||||
|
||||
#include <qa_utils/wx_utils/unit_test_utils.h>
|
||||
#include <pcbnew_utils/board_file_utils.h>
|
||||
#include <qa/pcbnew/board_test_utils.h>
|
||||
#include <board.h>
|
||||
#include <board_design_settings.h>
|
||||
#include <pad.h>
|
||||
|
|
@ -34,80 +30,20 @@
|
|||
#include <footprint.h>
|
||||
#include <drc/drc_item.h>
|
||||
#include <drc/drc_engine.h>
|
||||
#include <zone_filler.h>
|
||||
#include <board_commit.h>
|
||||
#include <tool/tool_manager.h>
|
||||
#include <zone_filler_tool.h>
|
||||
#include <settings/settings_manager.h>
|
||||
|
||||
|
||||
struct DRC_REGRESSION_TEST_FIXTURE
|
||||
{
|
||||
DRC_REGRESSION_TEST_FIXTURE() :
|
||||
m_settingsManager( true /* headless */ )
|
||||
{
|
||||
}
|
||||
{ }
|
||||
|
||||
void loadBoard( const wxString& relPath )
|
||||
{
|
||||
if( m_board )
|
||||
{
|
||||
m_board->SetProject( nullptr );
|
||||
m_board = nullptr;
|
||||
}
|
||||
|
||||
std::string absPath = KI_TEST::GetPcbnewTestDataDir() + relPath.ToStdString();
|
||||
wxFileName projectFile( absPath + ".kicad_pro" );
|
||||
std::string boardPath = absPath + ".kicad_pcb";
|
||||
wxFileName rulesFile( absPath + ".kicad_dru" );
|
||||
|
||||
if( projectFile.Exists() )
|
||||
m_settingsManager.LoadProject( projectFile.GetFullPath() );
|
||||
|
||||
m_board = KI_TEST::ReadBoardFromFileOrStream( boardPath );
|
||||
|
||||
if( projectFile.Exists() )
|
||||
m_board->SetProject( &m_settingsManager.Prj() );
|
||||
|
||||
m_DRCEngine = std::make_shared<DRC_ENGINE>( m_board.get(), &m_board->GetDesignSettings() );
|
||||
|
||||
if( rulesFile.Exists() )
|
||||
m_DRCEngine->InitEngine( rulesFile );
|
||||
else
|
||||
m_DRCEngine->InitEngine( wxFileName() );
|
||||
|
||||
m_board->GetDesignSettings().m_DRCEngine = m_DRCEngine;
|
||||
|
||||
m_toolMgr = std::make_unique<TOOL_MANAGER>();
|
||||
m_toolMgr->SetEnvironment( m_board.get(), nullptr, nullptr, nullptr, nullptr );
|
||||
}
|
||||
|
||||
void fillZones( int aFillVersion )
|
||||
{
|
||||
BOARD_COMMIT commit( m_toolMgr.get() );
|
||||
ZONE_FILLER filler( m_board.get(), &commit );
|
||||
std::vector<ZONE*> toFill;
|
||||
|
||||
m_board->GetDesignSettings().m_ZoneFillVersion = aFillVersion;
|
||||
|
||||
for( ZONE* zone : m_board->Zones() )
|
||||
toFill.push_back( zone );
|
||||
|
||||
if( filler.Fill( toFill, false, nullptr ) )
|
||||
commit.Push( _( "Fill Zone(s)" ), false, false );
|
||||
}
|
||||
|
||||
SETTINGS_MANAGER m_settingsManager;
|
||||
|
||||
std::unique_ptr<BOARD> m_board;
|
||||
std::unique_ptr<TOOL_MANAGER> m_toolMgr;
|
||||
std::shared_ptr<DRC_ENGINE> m_DRCEngine;
|
||||
SETTINGS_MANAGER m_settingsManager;
|
||||
std::unique_ptr<BOARD> m_board;
|
||||
};
|
||||
|
||||
|
||||
|
||||
constexpr int delta = KiROUND( 0.006 * IU_PER_MM );
|
||||
|
||||
|
||||
BOOST_FIXTURE_TEST_CASE( DRCFalsePositiveRegressions, DRC_REGRESSION_TEST_FIXTURE )
|
||||
{
|
||||
// These documents at one time flagged DRC errors that they shouldn't have.
|
||||
|
|
@ -123,8 +59,8 @@ BOOST_FIXTURE_TEST_CASE( DRCFalsePositiveRegressions, DRC_REGRESSION_TEST_FIXTUR
|
|||
|
||||
for( const wxString& relPath : tests )
|
||||
{
|
||||
loadBoard( relPath );
|
||||
fillZones( 6 );
|
||||
KI_TEST::LoadBoard( m_settingsManager, relPath, m_board );
|
||||
KI_TEST::FillZones( m_board.get(), 6 );
|
||||
|
||||
std::vector<DRC_ITEM> violations;
|
||||
BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
|
||||
|
|
@ -132,17 +68,18 @@ BOOST_FIXTURE_TEST_CASE( DRCFalsePositiveRegressions, DRC_REGRESSION_TEST_FIXTUR
|
|||
bds.m_DRCSeverities[ DRCE_INVALID_OUTLINE ] = SEVERITY::RPT_SEVERITY_IGNORE;
|
||||
bds.m_DRCSeverities[ DRCE_UNCONNECTED_ITEMS ] = SEVERITY::RPT_SEVERITY_IGNORE;
|
||||
|
||||
m_DRCEngine->SetViolationHandler(
|
||||
bds.m_DRCEngine->SetViolationHandler(
|
||||
[&]( const std::shared_ptr<DRC_ITEM>& aItem, wxPoint aPos )
|
||||
{
|
||||
if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR )
|
||||
violations.push_back( *aItem );
|
||||
} );
|
||||
|
||||
m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
|
||||
if( violations.empty() )
|
||||
{
|
||||
BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
|
||||
BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", relPath ) );
|
||||
}
|
||||
else
|
||||
|
|
@ -179,22 +116,23 @@ BOOST_FIXTURE_TEST_CASE( DRCFalseNegativeRegressions, DRC_REGRESSION_TEST_FIXTUR
|
|||
|
||||
for( const std::pair<wxString, int>& entry : tests )
|
||||
{
|
||||
loadBoard( entry.first );
|
||||
fillZones( 6 );
|
||||
KI_TEST::LoadBoard( m_settingsManager, entry.first, m_board );
|
||||
KI_TEST::FillZones( m_board.get(), 6 );
|
||||
|
||||
std::vector<DRC_ITEM> violations;
|
||||
BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
|
||||
|
||||
m_DRCEngine->SetViolationHandler(
|
||||
bds.m_DRCEngine->SetViolationHandler(
|
||||
[&]( const std::shared_ptr<DRC_ITEM>& aItem, wxPoint aPos )
|
||||
{
|
||||
violations.push_back( *aItem );
|
||||
} );
|
||||
|
||||
m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
|
||||
if( violations.size() == entry.second )
|
||||
{
|
||||
BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
|
||||
BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", entry.first ) );
|
||||
}
|
||||
else
|
||||
|
|
|
|||
|
|
@ -0,0 +1,204 @@
|
|||
/*
|
||||
* This program source code file is part of KiCad, a free EDA CAD application.
|
||||
*
|
||||
* Copyright (C) 2021 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, you may find one here:
|
||||
* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
|
||||
* or you may search the http://www.gnu.org website for the version 2 license,
|
||||
* or you may write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
#include <qa_utils/wx_utils/unit_test_utils.h>
|
||||
#include <qa/pcbnew/board_test_utils.h>
|
||||
#include <board.h>
|
||||
#include <board_commit.h>
|
||||
#include <board_design_settings.h>
|
||||
#include <connectivity/connectivity_data.h>
|
||||
#include <tracks_cleaner.h>
|
||||
#include <cleanup_item.h>
|
||||
#include <drc/drc_item.h>
|
||||
#include <drc/drc_engine.h>
|
||||
#include <settings/settings_manager.h>
|
||||
#include <tool/tool_manager.h>
|
||||
|
||||
struct TRACK_CLEANER_TEST_FIXTURE
|
||||
{
|
||||
TRACK_CLEANER_TEST_FIXTURE() :
|
||||
m_settingsManager( true /* headless */ )
|
||||
{ }
|
||||
|
||||
SETTINGS_MANAGER m_settingsManager;
|
||||
std::unique_ptr<BOARD> m_board;
|
||||
};
|
||||
|
||||
|
||||
struct TEST_DESCRIPTION
|
||||
{
|
||||
wxString m_File;
|
||||
bool m_Shorts;
|
||||
bool m_RedundantVias;
|
||||
bool m_RedundantTracks;
|
||||
bool m_DanglingTracks;
|
||||
bool m_TracksInPads;
|
||||
bool m_DanglingVias;
|
||||
int m_Expected;
|
||||
};
|
||||
|
||||
|
||||
BOOST_FIXTURE_TEST_CASE( FailedToCleanRegressionTests, TRACK_CLEANER_TEST_FIXTURE )
|
||||
{
|
||||
/*
|
||||
* This one ensures that certain cleanup items are indeed found and marked for cleanup.
|
||||
*/
|
||||
std::vector<TEST_DESCRIPTION> tests =
|
||||
{
|
||||
// short redundant redundant dangling tracks dangling
|
||||
// circuits vias tracks tracks in pads vias expected
|
||||
{ "issue2904", false, false, false, true, false, false, 6 },
|
||||
{ "issue5093", false, false, false, false, true, false, 118 },
|
||||
{ "issue7004", false, true, false, false, false, true, 25 },
|
||||
{ "issue8883", true, true, true, true, false, true, 80 }
|
||||
};
|
||||
|
||||
for( const TEST_DESCRIPTION& entry : tests )
|
||||
{
|
||||
KI_TEST::LoadBoard( m_settingsManager, entry.m_File, m_board );
|
||||
KI_TEST::FillZones( m_board.get(), 6 );
|
||||
m_board->GetConnectivity()->RecalculateRatsnest();
|
||||
|
||||
TOOL_MANAGER toolMgr;
|
||||
toolMgr.SetEnvironment( m_board.get(), nullptr, nullptr, nullptr, nullptr );
|
||||
|
||||
BOARD_COMMIT commit( &toolMgr );
|
||||
TRACKS_CLEANER cleaner( m_board.get(), commit );
|
||||
std::vector< std::shared_ptr<CLEANUP_ITEM> > dryRunItems;
|
||||
std::vector< std::shared_ptr<CLEANUP_ITEM> > realRunItems;
|
||||
|
||||
cleaner.CleanupBoard( true, &dryRunItems, entry.m_Shorts,
|
||||
entry.m_RedundantVias,
|
||||
entry.m_RedundantTracks,
|
||||
entry.m_DanglingTracks,
|
||||
entry.m_TracksInPads,
|
||||
entry.m_DanglingVias );
|
||||
|
||||
cleaner.CleanupBoard( true, &realRunItems, entry.m_Shorts,
|
||||
entry.m_RedundantVias,
|
||||
entry.m_RedundantTracks,
|
||||
entry.m_DanglingTracks,
|
||||
entry.m_TracksInPads,
|
||||
entry.m_DanglingVias );
|
||||
|
||||
if( dryRunItems.size() == entry.m_Expected && realRunItems.size() == entry.m_Expected )
|
||||
{
|
||||
BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
|
||||
BOOST_TEST_MESSAGE( wxString::Format( "Track cleaner regression: %s, passed",
|
||||
entry.m_File ) );
|
||||
}
|
||||
else
|
||||
{
|
||||
BOOST_CHECK_EQUAL( dryRunItems.size(), entry.m_Expected );
|
||||
BOOST_CHECK_EQUAL( realRunItems.size(), entry.m_Expected );
|
||||
|
||||
std::map<KIID, EDA_ITEM*> itemMap;
|
||||
m_board->FillItemMap( itemMap );
|
||||
|
||||
for( const std::shared_ptr<CLEANUP_ITEM>& item : realRunItems )
|
||||
{
|
||||
BOOST_TEST_MESSAGE( item->ShowReport( EDA_UNITS::INCHES, RPT_SEVERITY_ERROR,
|
||||
itemMap ) );
|
||||
}
|
||||
|
||||
BOOST_ERROR( wxString::Format( "Track cleaner regression: %s, failed",
|
||||
entry.m_File ) );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
BOOST_FIXTURE_TEST_CASE( TrackCleanerRegressionTests, TRACK_CLEANER_TEST_FIXTURE )
|
||||
{
|
||||
/*
|
||||
* This one just makes sure that the dry-run counts agree with the "real" counts, and that
|
||||
* the cleaning doesn't produce any connectivity changes.
|
||||
*/
|
||||
std::vector<wxString> tests = { "issue832",
|
||||
"issue4257",
|
||||
"issue8909" };
|
||||
|
||||
for( const wxString& relPath : tests )
|
||||
{
|
||||
KI_TEST::LoadBoard( m_settingsManager, relPath, m_board );
|
||||
KI_TEST::FillZones( m_board.get(), 6 );
|
||||
m_board->GetConnectivity()->RecalculateRatsnest();
|
||||
|
||||
TOOL_MANAGER toolMgr;
|
||||
toolMgr.SetEnvironment( m_board.get(), nullptr, nullptr, nullptr, nullptr );
|
||||
|
||||
BOARD_COMMIT commit( &toolMgr );
|
||||
TRACKS_CLEANER cleaner( m_board.get(), commit );
|
||||
std::vector< std::shared_ptr<CLEANUP_ITEM> > dryRunItems;
|
||||
std::vector< std::shared_ptr<CLEANUP_ITEM> > realRunItems;
|
||||
|
||||
cleaner.CleanupBoard( true, &dryRunItems, true, // short circuits
|
||||
true, // redundant vias
|
||||
true, // redundant tracks
|
||||
true, // dangling tracks
|
||||
true, // tracks in pads
|
||||
true ); // dangling vias
|
||||
|
||||
cleaner.CleanupBoard( true, &realRunItems, true, // short circuits
|
||||
true, // redundant vias
|
||||
true, // redundant tracks
|
||||
true, // dangling tracks
|
||||
true, // tracks in pads
|
||||
true ); // dangling vias
|
||||
|
||||
BOOST_CHECK_EQUAL( dryRunItems.size(), realRunItems.size() );
|
||||
|
||||
std::vector<DRC_ITEM> violations;
|
||||
BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
|
||||
|
||||
bds.m_DRCEngine->SetViolationHandler(
|
||||
[&]( const std::shared_ptr<DRC_ITEM>& aItem, wxPoint aPos )
|
||||
{
|
||||
if( aItem->GetErrorCode() == DRCE_UNCONNECTED_ITEMS )
|
||||
violations.push_back( *aItem );
|
||||
} );
|
||||
|
||||
bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
|
||||
if( violations.empty() )
|
||||
{
|
||||
BOOST_TEST_MESSAGE( wxString::Format( "Track cleaner regression: %s, passed",
|
||||
relPath ) );
|
||||
}
|
||||
else
|
||||
{
|
||||
std::map<KIID, EDA_ITEM*> itemMap;
|
||||
m_board->FillItemMap( itemMap );
|
||||
|
||||
for( const DRC_ITEM& item : violations )
|
||||
{
|
||||
BOOST_TEST_MESSAGE( item.ShowReport( EDA_UNITS::INCHES, RPT_SEVERITY_ERROR,
|
||||
itemMap ) );
|
||||
}
|
||||
|
||||
BOOST_ERROR( wxString::Format( "Track cleaner regression: %s, failed",
|
||||
relPath ) );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* This program source code file is part of KiCad, a free EDA CAD application.
|
||||
*
|
||||
* Copyright (C) 201 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
* Copyright (C) 2021 KiCad Developers, see AUTHORS.txt for contributors.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
|
@ -21,86 +21,27 @@
|
|||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
#include <string>
|
||||
|
||||
#include <wx/toplevel.h>
|
||||
|
||||
#include <qa_utils/wx_utils/unit_test_utils.h>
|
||||
#include <pcbnew_utils/board_file_utils.h>
|
||||
#include <qa/pcbnew/board_test_utils.h>
|
||||
#include <board.h>
|
||||
#include <board_design_settings.h>
|
||||
#include <pad.h>
|
||||
#include <pcb_track.h>
|
||||
#include <footprint.h>
|
||||
#include <zone.h>
|
||||
#include <drc/drc_item.h>
|
||||
#include <drc/drc_engine.h>
|
||||
#include <zone_filler.h>
|
||||
#include <board_commit.h>
|
||||
#include <tool/tool_manager.h>
|
||||
#include <zone_filler_tool.h>
|
||||
#include <settings/settings_manager.h>
|
||||
|
||||
|
||||
struct ZONE_FILL_TEST_FIXTURE
|
||||
{
|
||||
ZONE_FILL_TEST_FIXTURE() :
|
||||
m_settingsManager( true /* headless */ )
|
||||
{
|
||||
}
|
||||
{ }
|
||||
|
||||
void loadBoard( const wxString& relPath )
|
||||
{
|
||||
if( m_board )
|
||||
{
|
||||
m_board->SetProject( nullptr );
|
||||
m_board = nullptr;
|
||||
}
|
||||
|
||||
std::string absPath = KI_TEST::GetPcbnewTestDataDir() + relPath.ToStdString();
|
||||
wxFileName projectFile( absPath + ".kicad_pro" );
|
||||
std::string boardPath = absPath + ".kicad_pcb";
|
||||
wxFileName rulesFile( absPath + ".kicad_dru" );
|
||||
|
||||
if( projectFile.Exists() )
|
||||
m_settingsManager.LoadProject( projectFile.GetFullPath() );
|
||||
|
||||
m_board = KI_TEST::ReadBoardFromFileOrStream( boardPath );
|
||||
|
||||
if( projectFile.Exists() )
|
||||
m_board->SetProject( &m_settingsManager.Prj() );
|
||||
|
||||
m_DRCEngine = std::make_shared<DRC_ENGINE>( m_board.get(), &m_board->GetDesignSettings() );
|
||||
|
||||
if( rulesFile.Exists() )
|
||||
m_DRCEngine->InitEngine( rulesFile );
|
||||
else
|
||||
m_DRCEngine->InitEngine( wxFileName() );
|
||||
|
||||
m_board->GetDesignSettings().m_DRCEngine = m_DRCEngine;
|
||||
|
||||
m_toolMgr = std::make_unique<TOOL_MANAGER>();
|
||||
m_toolMgr->SetEnvironment( m_board.get(), nullptr, nullptr, nullptr, nullptr );
|
||||
}
|
||||
|
||||
void fillZones( int aFillVersion )
|
||||
{
|
||||
BOARD_COMMIT commit( m_toolMgr.get() );
|
||||
ZONE_FILLER filler( m_board.get(), &commit );
|
||||
std::vector<ZONE*> toFill;
|
||||
|
||||
m_board->GetDesignSettings().m_ZoneFillVersion = aFillVersion;
|
||||
|
||||
for( ZONE* zone : m_board->Zones() )
|
||||
toFill.push_back( zone );
|
||||
|
||||
if( filler.Fill( toFill, false, nullptr ) )
|
||||
commit.Push( _( "Fill Zone(s)" ), false, false );
|
||||
}
|
||||
|
||||
SETTINGS_MANAGER m_settingsManager;
|
||||
|
||||
std::unique_ptr<BOARD> m_board;
|
||||
std::unique_ptr<TOOL_MANAGER> m_toolMgr;
|
||||
std::shared_ptr<DRC_ENGINE> m_DRCEngine;
|
||||
SETTINGS_MANAGER m_settingsManager;
|
||||
std::unique_ptr<BOARD> m_board;
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -109,9 +50,11 @@ constexpr int delta = KiROUND( 0.006 * IU_PER_MM );
|
|||
|
||||
BOOST_FIXTURE_TEST_CASE( BasicZoneFills, ZONE_FILL_TEST_FIXTURE )
|
||||
{
|
||||
loadBoard( "zone_filler" );
|
||||
KI_TEST::LoadBoard( m_settingsManager, "zone_filler", m_board );
|
||||
|
||||
fillZones( 6 );
|
||||
BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
|
||||
|
||||
KI_TEST::FillZones( m_board.get(), 6 );
|
||||
|
||||
// Now that the zones are filled we're going to increase the size of -some- pads and
|
||||
// tracks so that they generate DRC errors. The test then makes sure that those errors
|
||||
|
|
@ -153,9 +96,9 @@ BOOST_FIXTURE_TEST_CASE( BasicZoneFills, ZONE_FILL_TEST_FIXTURE )
|
|||
bool foundArc12Error = false;
|
||||
bool foundOtherError = false;
|
||||
|
||||
m_DRCEngine->InitEngine( wxFileName() ); // Just to be sure to be sure
|
||||
bds.m_DRCEngine->InitEngine( wxFileName() ); // Just to be sure to be sure
|
||||
|
||||
m_DRCEngine->SetViolationHandler(
|
||||
bds.m_DRCEngine->SetViolationHandler(
|
||||
[&]( const std::shared_ptr<DRC_ITEM>& aItem, wxPoint aPos )
|
||||
{
|
||||
if( aItem->GetErrorCode() == DRCE_CLEARANCE )
|
||||
|
|
@ -182,7 +125,7 @@ BOOST_FIXTURE_TEST_CASE( BasicZoneFills, ZONE_FILL_TEST_FIXTURE )
|
|||
}
|
||||
} );
|
||||
|
||||
m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
|
||||
BOOST_CHECK_EQUAL( foundPad2Error, true );
|
||||
BOOST_CHECK_EQUAL( foundPad4Error, true );
|
||||
|
|
@ -195,7 +138,7 @@ BOOST_FIXTURE_TEST_CASE( BasicZoneFills, ZONE_FILL_TEST_FIXTURE )
|
|||
|
||||
BOOST_FIXTURE_TEST_CASE( NotchedZones, ZONE_FILL_TEST_FIXTURE )
|
||||
{
|
||||
loadBoard( "notched_zones" );
|
||||
KI_TEST::LoadBoard( m_settingsManager, "notched_zones", m_board );
|
||||
|
||||
// Older algorithms had trouble where the filleted zones intersected and left notches.
|
||||
// See:
|
||||
|
|
@ -217,7 +160,8 @@ BOOST_FIXTURE_TEST_CASE( NotchedZones, ZONE_FILL_TEST_FIXTURE )
|
|||
BOOST_CHECK_GT( frontCopper.OutlineCount(), 2 );
|
||||
|
||||
// Now re-fill and make sure the holes are gone.
|
||||
fillZones( 6 );
|
||||
KI_TEST::FillZones( m_board.get(), 6 );
|
||||
|
||||
frontCopper = SHAPE_POLY_SET();
|
||||
|
||||
for( ZONE* zone : m_board->Zones() )
|
||||
|
|
@ -250,25 +194,28 @@ BOOST_FIXTURE_TEST_CASE( RegressionZoneFillTests, ZONE_FILL_TEST_FIXTURE )
|
|||
|
||||
for( const wxString& relPath : tests )
|
||||
{
|
||||
loadBoard( relPath );
|
||||
KI_TEST::LoadBoard( m_settingsManager, relPath, m_board );
|
||||
|
||||
BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
|
||||
|
||||
for( int fillVersion : { 5, 6 } )
|
||||
{
|
||||
fillZones( fillVersion );
|
||||
KI_TEST::FillZones( m_board.get(), fillVersion );
|
||||
|
||||
std::vector<DRC_ITEM> violations;
|
||||
|
||||
m_DRCEngine->SetViolationHandler(
|
||||
bds.m_DRCEngine->SetViolationHandler(
|
||||
[&]( const std::shared_ptr<DRC_ITEM>& aItem, wxPoint aPos )
|
||||
{
|
||||
if( aItem->GetErrorCode() == DRCE_CLEARANCE )
|
||||
violations.push_back( *aItem );
|
||||
} );
|
||||
|
||||
m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||
|
||||
if( violations.empty() )
|
||||
{
|
||||
BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
|
||||
BOOST_TEST_MESSAGE( wxString::Format( "Zone fill regression: %s, V%d algo passed",
|
||||
relPath,
|
||||
fillVersion ) );
|
||||
|
|
|
|||
Loading…
Reference in New Issue