Improve length calculation for vias.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/10690

pcbnew/drc/drc_length_report.h

@@ -1,7 +1,7 @@
 /*
  * This program source code file is part of KiCad, a free EDA CAD application.
  *
- * Copyright (C) 2004-2020 KiCad Developers.
+ * Copyright (C) 2004-2023 KiCad Developers.
  *
  * This program is free software: you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by the
@@ -38,10 +38,10 @@ public:
         wxString                        to;
         std::set<BOARD_CONNECTED_ITEM*> items;
         int                             viaCount;
-        int                             totalRoute;
+        double                          totalRoute;
         int                             totalVia;
         int                             totalPadToDie;
-        int                             total;
+        double                          total;
     };
 
     DRC_LENGTH_REPORT()

pcbnew/drc/drc_test_provider.cpp

@@ -1,7 +1,7 @@
 /*
  * This program source code file is part of KiCad, a free EDA CAD application.
  *
- * Copyright (C) 2020-2022 KiCad Developers, see AUTHORS.txt for contributors.
+ * Copyright (C) 2020-2023 KiCad Developers, see AUTHORS.txt for contributors.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -352,7 +352,7 @@ bool DRC_TEST_PROVIDER::isInvisibleText( const BOARD_ITEM* aItem ) const
 
 
 wxString DRC_TEST_PROVIDER::formatMsg( const wxString& aFormatString, const wxString& aSource,
-                                       int aConstraint, int aActual )
+                                       double aConstraint, double aActual )
 {
     wxString constraint_str = MessageTextFromValue( aConstraint );
     wxString actual_str = MessageTextFromValue( aActual );

pcbnew/drc/drc_test_provider.h

@@ -119,8 +119,8 @@ protected:
 
     bool isInvisibleText( const BOARD_ITEM* aItem ) const;
 
-    wxString formatMsg( const wxString& aFormatString, const wxString& aSource, int aConstraint,
+    wxString formatMsg( const wxString& aFormatString, const wxString& aSource, double aConstraint,
-                        int aActual );
+                        double aActual );
 
     // List of basic (ie: non-compound) geometry items
     static std::vector<KICAD_T> s_allBasicItems;

pcbnew/drc/drc_test_provider_matched_length.cpp

@@ -1,7 +1,7 @@
 /*
  * This program source code file is part of KiCad, a free EDA CAD application.
  *
- * Copyright (C) 2004-2022 KiCad Developers.
+ * Copyright (C) 2004-2023 KiCad Developers.
  *
  * This program is free software: you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by the
@@ -31,7 +31,6 @@
 #include <connectivity/connectivity_data.h>
 #include <connectivity/from_to_cache.h>
 
-#include <pcbexpr_evaluator.h>
 
 /*
     Single-ended matched length + skew + via count test.
@@ -66,8 +65,6 @@ public:
         return wxT( "Tests matched track lengths." );
     }
 
-    DRC_LENGTH_REPORT BuildLengthReport() const;
-
 private:
 
     bool runInternal( bool aDelayReportMode = false );
@@ -81,7 +78,8 @@ private:
     void checkViaCounts( const DRC_CONSTRAINT& aConstraint,
                          const std::vector<CONNECTION>& aMatchedConnections );
 
-    BOARD* m_board;
+private:
+    BOARD*            m_board;
     DRC_LENGTH_REPORT m_report;
 };
 
@@ -142,16 +140,16 @@ void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkLengths( const DRC_CONSTRAINT& aCons
 void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkews( const DRC_CONSTRAINT& aConstraint,
                                                    const std::vector<CONNECTION>& aMatchedConnections )
 {
-    int avgLength = 0;
+    double avgLength = 0;
 
     for( const DRC_LENGTH_REPORT::ENTRY& ent : aMatchedConnections )
         avgLength += ent.total;
 
-    avgLength /= aMatchedConnections.size();
+    avgLength /= (double) aMatchedConnections.size();
 
     for( const auto& ent : aMatchedConnections )
     {
-        int skew = ent.total - avgLength;
+        int skew = KiROUND( ent.total - avgLength );
         if( aConstraint.GetValue().HasMax() && abs( skew ) > aConstraint.GetValue().Max() )
         {
             std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SKEW_OUT_OF_RANGE );
@@ -302,8 +300,13 @@ bool DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode )
                     if( bds.m_UseHeightForLengthCalcs )
                     {
                         const PCB_VIA* v = static_cast<PCB_VIA*>( citem );
+                        PCB_LAYER_ID   topmost;
+                        PCB_LAYER_ID   bottommost;
 
-                        ent.totalVia += stackup.GetLayerDistance( v->TopLayer(), v->BottomLayer() );
+                        v->GetOutermostConnectedLayers( &topmost, &bottommost );
+
+                        if( topmost != UNDEFINED_LAYER && topmost != bottommost )
+                            ent.totalVia += stackup.GetLayerDistance( topmost, bottommost );
                     }
                 }
                 else if( citem->Type() == PCB_TRACE_T )

pcbnew/drc/drc_test_provider_silk_clearance.cpp

@@ -1,7 +1,7 @@
 /*
  * This program source code file is part of KiCad, a free EDA CAD application.
  *
- * Copyright (C) 2004-2022 KiCad Developers.
+ * Copyright (C) 2004-2023 KiCad Developers.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -26,7 +26,6 @@
 #include <footprint.h>
 #include <pcb_shape.h>
 #include <pcb_track.h>
-#include <pad.h>
 #include <geometry/shape_segment.h>
 #include <geometry/seg.h>
 #include <drc/drc_engine.h>

pcbnew/pcb_track.cpp

@@ -808,6 +808,36 @@ bool PCB_VIA::FlashLayer( int aLayer ) const
 }
 
 
+void PCB_VIA::GetOutermostConnectedLayers( PCB_LAYER_ID* aTopmost,
+                                           PCB_LAYER_ID* aBottommost ) const
+{
+    *aTopmost = UNDEFINED_LAYER;
+    *aBottommost = UNDEFINED_LAYER;
+
+    static std::initializer_list<KICAD_T> connectedTypes = { PCB_TRACE_T, PCB_ARC_T, PCB_VIA_T,
+                                                             PCB_PAD_T };
+
+    for( int layer = TopLayer(); layer <= BottomLayer(); ++layer )
+    {
+        bool connected = false;
+
+        if( m_zoneLayerOverrides[ layer ] == ZLO_FORCE_FLASHED )
+            connected = true;
+        else if( GetBoard()->GetConnectivity()->IsConnectedOnLayer( this, layer, connectedTypes ) )
+            connected = true;
+
+        if( connected )
+        {
+            if( *aTopmost == UNDEFINED_LAYER )
+                *aTopmost = ToLAYER_ID( layer );
+
+            *aBottommost = ToLAYER_ID( layer );
+        }
+    }
+
+}
+
+
 void PCB_TRACK::ViewGetLayers( int aLayers[], int& aCount ) const
 {
     // Show the track and its netname on different layers

pcbnew/pcb_track.h

@@ -533,6 +533,14 @@ public:
      */
     bool FlashLayer( LSET aLayers ) const;
 
+    /**
+     * Return the top-most and bottom-most connected layers.
+     * @param aTopmost
+     * @param aBottommost
+     */
+    void GetOutermostConnectedLayers( PCB_LAYER_ID* aTopmost,
+                             PCB_LAYER_ID* aBottommost ) const;
+
     /**
      * Set the drill value for vias.
      *